include/configs/ls1028ardb.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __LS1028A_RDB_H
   7 #define __LS1028A_RDB_H
   8
   9 #include "ls1028a_common.h"
  10
  11 #define CONFIG_SYS_CLK_FREQ             100000000
  12 #define CONFIG_DDR_CLK_FREQ             100000000
  13 #define COUNTER_FREQUENCY_REAL          (CONFIG_SYS_CLK_FREQ / 4)
  14
  15 #define CONFIG_SYS_RTC_BUS_NUM         0
  16
  17 /* Store environment at top of flash */
  18
  19 #define CONFIG_DIMM_SLOTS_PER_CTLR          1
  20
  21 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  22
  23 #define CONFIG_QIXIS_I2C_ACCESS
  24
  25 /*
  26  * QIXIS Definitions
  27  */
  28 #define CONFIG_FSL_QIXIS
  29
  30 #ifdef CONFIG_FSL_QIXIS
  31 #define QIXIS_BASE                      0x7fb00000
  32 #define QIXIS_BASE_PHYS                 QIXIS_BASE
  33 #define CONFIG_SYS_I2C_FPGA_ADDR        0x66
  34 #define QIXIS_LBMAP_SWITCH              2
  35 #define QIXIS_LBMAP_MASK                0xe0
  36 #define QIXIS_LBMAP_SHIFT               0x5
  37 #define QIXIS_LBMAP_DFLTBANK            0x00
  38 #define QIXIS_LBMAP_ALTBANK             0x00
  39 #define QIXIS_LBMAP_SD                  0x00
  40 #define QIXIS_LBMAP_EMMC                0x00
  41 #define QIXIS_LBMAP_QSPI                0x00
  42 #define QIXIS_RCW_SRC_SD                0xf8
  43 #define QIXIS_RCW_SRC_EMMC              0xf9
  44 #define QIXIS_RCW_SRC_QSPI              0xff
  45 #define QIXIS_RST_CTL_RESET             0x31
  46 #define QIXIS_RCFG_CTL_RECONFIG_IDLE    0x10
  47 #define QIXIS_RCFG_CTL_RECONFIG_START   0x11
  48 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE   0x08
  49 #define QIXIS_RST_FORCE_MEM             0x01
  50
  51 #define CONFIG_SYS_FPGA_CSPR_EXT        (0x0)
  52 #define CONFIG_SYS_FPGA_CSPR            (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
  53                                         CSPR_PORT_SIZE_8 | \
  54                                         CSPR_MSEL_GPCM | \
  55                                         CSPR_V)
  56 #define CONFIG_SYS_FPGA_CSOR            (CSOR_NOR_ADM_SHIFT(4) | \
  57                                         CSOR_NOR_NOR_MODE_AVD_NOR | \
  58                                         CSOR_NOR_TRHZ_80)
  59 #endif
  60
  61 /* SATA */
  62 #define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
  63 #define CONFIG_SYS_SCSI_MAX_LUN                 1
  64 #define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  65                                                 CONFIG_SYS_SCSI_MAX_LUN)
  66 #define SCSI_VEND_ID 0x1b4b
  67 #define SCSI_DEV_ID  0x9170
  68 #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
  69 #define CONFIG_SCSI_AHCI_PLAT
  70 #define CONFIG_SYS_SATA1                        AHCI_BASE_ADDR1
  71
  72 /* Initial environment variables */
  73 #ifndef SPL_NO_ENV
  74 #undef CONFIG_EXTRA_ENV_SETTINGS
  75 #define CONFIG_EXTRA_ENV_SETTINGS               \
  76         "board=ls1028ardb\0"                    \
  77         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
  78         "ramdisk_addr=0x800000\0"               \
  79         "ramdisk_size=0x2000000\0"              \
  80         "bootm_size=0x10000000\0"               \
  81         "fdt_addr=0x00f00000\0"                 \
  82         "kernel_addr=0x01000000\0"              \
  83         "scriptaddr=0x80000000\0"               \
  84         "scripthdraddr=0x80080000\0"            \
  85         "fdtheader_addr_r=0x80100000\0"         \
  86         "kernelheader_addr_r=0x80200000\0"      \
  87         "load_addr=0xa0000000\0"            \
  88         "kernel_addr_r=0x81000000\0"            \
  89         "fdt_addr_r=0x90000000\0"               \
  90         "ramdisk_addr_r=0xa0000000\0"           \
  91         "kernel_start=0x1000000\0"              \
  92         "kernelheader_start=0x600000\0"         \
  93         "kernel_load=0xa0000000\0"              \
  94         "kernel_size=0x2800000\0"               \
  95         "kernelheader_size=0x40000\0"           \
  96         "kernel_addr_sd=0x8000\0"               \
  97         "kernel_size_sd=0x14000\0"              \
  98         "kernelhdr_addr_sd=0x3000\0"            \
  99         "kernelhdr_size_sd=0x20\0"              \
 100         "console=ttyS0,115200\0"                \
 101         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"        \
 102         BOOTENV                                 \
 103         "boot_scripts=ls1028ardb_boot.scr\0"    \
 104         "boot_script_hdr=hdr_ls1028ardb_bs.out\0"       \
 105         "scan_dev_for_boot_part="               \
 106                 "part list ${devtype} ${devnum} devplist; "   \
 107                 "env exists devplist || setenv devplist 1; "  \
 108                 "for distro_bootpart in ${devplist}; do "     \
 109                   "if fstype ${devtype} "                  \
 110                         "${devnum}:${distro_bootpart} "      \
 111                         "bootfstype; then "                  \
 112                         "run scan_dev_for_boot; "            \
 113                   "fi; "                                   \
 114                 "done\0"                                   \
 115         "scan_dev_for_boot="                              \
 116                 "echo Scanning ${devtype} "               \
 117                                 "${devnum}:${distro_bootpart}...; "  \
 118                 "for prefix in ${boot_prefixes}; do "     \
 119                         "run scan_dev_for_scripts; "      \
 120                 "done;"                                   \
 121                 "\0"                                      \
 122         "boot_a_script="                                  \
 123                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
 124                         "${scriptaddr} ${prefix}${script}; "    \
 125                 "env exists secureboot && load ${devtype} "     \
 126                         "${devnum}:${distro_bootpart} "         \
 127                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
 128                         "&& esbc_validate ${scripthdraddr};"    \
 129                 "source ${scriptaddr}\0"          \
 130         "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
 131                 "sf probe 0:0 && sf read $load_addr " \
 132                 "$kernel_start $kernel_size ; env exists secureboot &&" \
 133                 "sf read $kernelheader_addr_r $kernelheader_start " \
 134                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
 135                 " bootm $load_addr#$board\0" \
 136         "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
 137                 "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
 138                 "&& hdp load $load_addr 0x2000\0"                       \
 139         "sd_bootcmd=echo Trying load from SD ...;" \
 140                 "mmc dev 0;mmcinfo; mmc read $load_addr "               \
 141                 "$kernel_addr_sd $kernel_size_sd && "   \
 142                 "env exists secureboot && mmc read $kernelheader_addr_r " \
 143                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 144                 " && esbc_validate ${kernelheader_addr_r};"     \
 145                 "bootm $load_addr#$board\0"             \
 146         "sd_hdploadcmd=echo Trying load HDP firmware from SD..;"        \
 147                 "mmc dev 0;mmcinfo;mmc read $load_addr 0x4a00 0x200 "   \
 148                 "&& hdp load $load_addr 0x2000\0"       \
 149         "emmc_bootcmd=echo Trying load from EMMC ..;"   \
 150                 "mmc dev 1;mmcinfo; mmc read $load_addr "               \
 151                 "$kernel_addr_sd $kernel_size_sd && "   \
 152                 "env exists secureboot && mmc read $kernelheader_addr_r " \
 153                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 154                 " && esbc_validate ${kernelheader_addr_r};"     \
 155                 "bootm $load_addr#$board\0"                     \
 156         "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;"      \
 157                 "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 "   \
 158                 "&& hdp load $load_addr 0x2000\0"
 159 #endif
 160 #endif /* __LS1028A_RDB_H */