Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
[oweals/u-boot.git] / include / configs / ls1028aqds.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2019-2020 NXP
4  */
5
6 #ifndef __LS1028A_QDS_H
7 #define __LS1028A_QDS_H
8
9 #include "ls1028a_common.h"
10
11 #define CONFIG_SYS_CLK_FREQ             100000000
12 #define CONFIG_DDR_CLK_FREQ             100000000
13 #define COUNTER_FREQUENCY_REAL          (CONFIG_SYS_CLK_FREQ / 4)
14
15 /* DDR */
16 #define CONFIG_DIMM_SLOTS_PER_CTLR              2
17
18 #define CONFIG_QIXIS_I2C_ACCESS
19
20 /*
21  * QIXIS Definitions
22  */
23 #define CONFIG_FSL_QIXIS
24
25 #ifdef CONFIG_FSL_QIXIS
26 #define QIXIS_BASE                      0x7fb00000
27 #define QIXIS_BASE_PHYS                 QIXIS_BASE
28 #define CONFIG_SYS_I2C_FPGA_ADDR        0x66
29 #define QIXIS_LBMAP_SWITCH              1
30 #define QIXIS_LBMAP_MASK                0x0f
31 #define QIXIS_LBMAP_SHIFT               5
32 #define QIXIS_LBMAP_DFLTBANK            0x00
33 #define QIXIS_LBMAP_ALTBANK             0x00
34 #define QIXIS_LBMAP_SD                  0x00
35 #define QIXIS_LBMAP_EMMC                0x00
36 #define QIXIS_LBMAP_QSPI                0x00
37 #define QIXIS_RCW_SRC_SD                0x8
38 #define QIXIS_RCW_SRC_EMMC              0x9
39 #define QIXIS_RCW_SRC_QSPI              0xf
40 #define QIXIS_RST_CTL_RESET             0x31
41 #define QIXIS_RCFG_CTL_RECONFIG_IDLE    0x20
42 #define QIXIS_RCFG_CTL_RECONFIG_START   0x21
43 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE   0x08
44 #define QIXIS_RST_FORCE_MEM             0x01
45
46 #define CONFIG_SYS_FPGA_CSPR_EXT        (0x0)
47 #define CONFIG_SYS_FPGA_CSPR            (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
48                                         CSPR_PORT_SIZE_8 | \
49                                         CSPR_MSEL_GPCM | \
50                                         CSPR_V)
51 #define CONFIG_SYS_FPGA_AMASK           IFC_AMASK(64 * 1024)
52 #define CONFIG_SYS_FPGA_CSOR            (CSOR_NOR_ADM_SHIFT(4) | \
53                                         CSOR_NOR_NOR_MODE_AVD_NOR | \
54                                         CSOR_NOR_TRHZ_80)
55 #endif
56
57 /* RTC */
58 #define CONFIG_SYS_RTC_BUS_NUM         1
59 #define I2C_MUX_CH_RTC                 0xB
60
61 /* Store environment at top of flash */
62
63 #ifdef CONFIG_SPL_BUILD
64 #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
65 #else
66 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
67 #endif
68
69 /* LPUART */
70 #ifdef CONFIG_LPUART
71 #define CONFIG_LPUART_32B_REG
72 #define CFG_LPUART_MUX_MASK     0xf0
73 #define CFG_LPUART_EN           0xf0
74 #endif
75
76 /* SATA */
77 #define CONFIG_SCSI_AHCI_PLAT
78
79 #define CONFIG_SYS_SATA1                        AHCI_BASE_ADDR1
80 #ifndef CONFIG_CMD_EXT2
81 #define CONFIG_CMD_EXT2
82 #endif
83 #define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
84 #define CONFIG_SYS_SCSI_MAX_LUN                 1
85 #define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
86                                                 CONFIG_SYS_SCSI_MAX_LUN)
87 /* DSPI */
88 #ifdef CONFIG_FSL_DSPI
89 #define CONFIG_SPI_FLASH_SST
90 #define CONFIG_SPI_FLASH_EON
91 #endif
92
93 #ifndef SPL_NO_ENV
94 #undef CONFIG_EXTRA_ENV_SETTINGS
95 #define CONFIG_EXTRA_ENV_SETTINGS \
96         "board=ls1028aqds\0" \
97         "hwconfig=fsl_ddr:bank_intlv=auto\0" \
98         "ramdisk_addr=0x800000\0" \
99         "ramdisk_size=0x2000000\0" \
100         "fdt_addr=0x00f00000\0" \
101         "kernel_addr=0x01000000\0" \
102         "scriptaddr=0x80000000\0" \
103         "scripthdraddr=0x80080000\0" \
104         "fdtheader_addr_r=0x80100000\0" \
105         "kernelheader_addr_r=0x80200000\0" \
106         "load_addr=0xa0000000\0" \
107         "kernel_addr_r=0x81000000\0" \
108         "fdt_addr_r=0x90000000\0" \
109         "fdt2_addr_r=0x90010000\0" \
110         "ramdisk_addr_r=0xa0000000\0" \
111         "kernel_start=0x1000000\0" \
112         "kernelheader_start=0x600000\0" \
113         "kernel_load=0xa0000000\0" \
114         "kernel_size=0x2800000\0" \
115         "kernelheader_size=0x40000\0" \
116         "kernel_addr_sd=0x8000\0" \
117         "kernel_size_sd=0x14000\0" \
118         "kernelhdr_addr_sd=0x3000\0" \
119         "kernelhdr_size_sd=0x10\0" \
120         "console=ttyS0,115200\0" \
121         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
122         BOOTENV \
123         "boot_scripts=ls1028aqds_boot.scr\0" \
124         "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \
125         "scan_dev_for_boot_part=" \
126                 "part list ${devtype} ${devnum} devplist; " \
127                 "env exists devplist || setenv devplist 1; " \
128                 "for distro_bootpart in ${devplist}; do " \
129                   "if fstype ${devtype} " \
130                         "${devnum}:${distro_bootpart} " \
131                         "bootfstype; then " \
132                         "run scan_dev_for_boot; " \
133                   "fi; " \
134                 "done\0" \
135         "scan_dev_for_boot=" \
136                 "echo Scanning ${devtype} " \
137                                 "${devnum}:${distro_bootpart}...; " \
138                 "for prefix in ${boot_prefixes}; do " \
139                         "run scan_dev_for_scripts; " \
140                 "done;" \
141                 "\0" \
142         "boot_a_script=" \
143                 "load ${devtype} ${devnum}:${distro_bootpart} " \
144                         "${scriptaddr} ${prefix}${script}; " \
145                 "env exists secureboot && load ${devtype} " \
146                         "${devnum}:${distro_bootpart} " \
147                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
148                         "&& esbc_validate ${scripthdraddr};" \
149                 "source ${scriptaddr}\0" \
150         "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
151                 "sf probe 0:0 && sf read $load_addr " \
152                 "$kernel_start $kernel_size ; env exists secureboot &&" \
153                 "sf read $kernelheader_addr_r $kernelheader_start " \
154                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
155                 " bootm $load_addr#$board\0" \
156         "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
157                 "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
158                 "&& hdp load $load_addr 0x2000\0"                       \
159         "sd_bootcmd=echo Trying load from SD ...;" \
160                 "mmc dev 0; mmcinfo; mmc read $load_addr "              \
161                 "$kernel_addr_sd $kernel_size_sd && "   \
162                 "env exists secureboot && mmc read $kernelheader_addr_r " \
163                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
164                 " && esbc_validate ${kernelheader_addr_r};"     \
165                 "bootm $load_addr#$board\0"             \
166         "sd_hdploadcmd=echo Trying load HDP firmware from SD..;"        \
167                 "mmc dev 0;mmcinfo; mmc read $load_addr 0x4a00 0x200 "  \
168                 "&& hdp load $load_addr 0x2000\0"       \
169         "emmc_bootcmd=echo Trying load from EMMC ..;"   \
170                 "mmc dev 1; mmcinfo; mmc read $load_addr "              \
171                 "$kernel_addr_sd $kernel_size_sd && "   \
172                 "env exists secureboot && mmc read $kernelheader_addr_r " \
173                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
174                 " && esbc_validate ${kernelheader_addr_r};"     \
175                 "bootm $load_addr#$board\0"                     \
176         "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;"      \
177                 "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 "   \
178                 "&& hdp load $load_addr 0x2000\0"
179
180 #endif
181 #endif /* __LS1028A_QDS_H */