include/configs/kmvect1.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2006 Freescale Semiconductor, Inc.
   4  *                    Dave Liu <daveliu@freescale.com>
   5  *
   6  * Copyright (C) 2007 Logic Product Development, Inc.
   7  *                    Peter Barada <peterb@logicpd.com>
   8  *
   9  * Copyright (C) 2007 MontaVista Software, Inc.
  10  *                    Anton Vorontsov <avorontsov@ru.mvista.com>
  11  *
  12  * (C) Copyright 2010
  13  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  14  */
  15
  16 #ifndef __CONFIG_H
  17 #define __CONFIG_H
  18
  19 /*
  20  * High Level Configuration Options
  21  */
  22
  23 #define CONFIG_HOSTNAME         "kmvect1"
  24 #define CONFIG_KM_BOARD_NAME   "kmvect1"
  25 /* at end of uboot partition, before env */
  26 #define CONFIG_SYS_QE_FW_ADDR   0xF00B0000
  27
  28 /* include common defines/options for all Keymile boards */
  29 #include "km/keymile-common.h"
  30 #include "km/km-powerpc.h"
  31 #include "km/km-mpc83xx.h"
  32 #include "km/km-mpc8309.h"
  33
  34 #define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
  35                          0x0000c000 | \
  36                          MxMR_WLFx_2X)
  37 /*
  38  * QE UEC ethernet configuration
  39  */
  40 #define CONFIG_MV88E6352_SWITCH
  41 #define CONFIG_KM_MVEXTSW_ADDR          0x10
  42
  43 /* ethernet port connected to simple switch 88e6122 (UEC0) */
  44 #define CONFIG_UEC_ETH1
  45 #define CONFIG_SYS_UEC1_UCC_NUM         0       /* UCC1 */
  46 #define CONFIG_SYS_UEC1_RX_CLK          QE_CLK9
  47 #define CONFIG_SYS_UEC1_TX_CLK          QE_CLK10
  48
  49 #define CONFIG_FIXED_PHY                0xFFFFFFFF
  50 #define CONFIG_SYS_FIXED_PHY_ADDR       0x1E    /* unused address */
  51 #define CONFIG_SYS_FIXED_PHY_PORT(devnum, speed, duplex) \
  52                 {devnum, speed, duplex}
  53 #define CONFIG_SYS_FIXED_PHY_PORTS \
  54                 CONFIG_SYS_FIXED_PHY_PORT("UEC0", SPEED_100, DUPLEX_FULL)
  55
  56 #define CONFIG_SYS_UEC1_ETH_TYPE        FAST_ETH
  57 #define CONFIG_SYS_UEC1_PHY_ADDR        CONFIG_SYS_FIXED_PHY_ADDR
  58 #define CONFIG_SYS_UEC1_INTERFACE_TYPE  PHY_INTERFACE_MODE_MII
  59 #define CONFIG_SYS_UEC1_INTERFACE_SPEED 100
  60
  61 #endif /* __CONFIG_H */