Merge git://git.denx.de/u-boot-spi
[oweals/u-boot.git] / include / configs / cm_fx6.h
1 /*
2  * Config file for Compulab CM-FX6 board
3  *
4  * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
5  *
6  * Author: Nikita Kiryanov <nikita@compulab.co.il>
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 #ifndef __CONFIG_CM_FX6_H
12 #define __CONFIG_CM_FX6_H
13
14 #include "mx6_common.h"
15
16 /* Machine config */
17 #define CONFIG_SYS_LITTLE_ENDIAN
18 #define CONFIG_MACH_TYPE                4273
19
20 /* MMC */
21 #define CONFIG_SYS_FSL_USDHC_NUM        3
22 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC2_BASE_ADDR
23
24 /* RAM */
25 #define PHYS_SDRAM_1                    MMDC0_ARB_BASE_ADDR
26 #define PHYS_SDRAM_2                    MMDC1_ARB_BASE_ADDR
27 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
28 #define CONFIG_NR_DRAM_BANKS            2
29 #define CONFIG_SYS_MEMTEST_START        0x10000000
30 #define CONFIG_SYS_MEMTEST_END          0x10010000
31 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
32 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
33 #define CONFIG_SYS_INIT_SP_OFFSET \
34         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
35 #define CONFIG_SYS_INIT_SP_ADDR \
36         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
37
38 /* Serial console */
39 #define CONFIG_MXC_UART
40 #define CONFIG_MXC_UART_BASE            UART4_BASE
41 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200}
42
43 /* SPI flash */
44 #define CONFIG_SF_DEFAULT_BUS           0
45 #define CONFIG_SF_DEFAULT_CS            0
46 #define CONFIG_SF_DEFAULT_SPEED         25000000
47 #define CONFIG_SF_DEFAULT_MODE          (SPI_MODE_0)
48
49 /* MTD support */
50 #ifndef CONFIG_SPL_BUILD
51 #define CONFIG_MTD_DEVICE
52 #define CONFIG_MTD_PARTITIONS
53 #define CONFIG_SPI_FLASH_MTD
54 #endif
55
56 /* Environment */
57 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
58 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
59 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
60 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
61 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
62 #define CONFIG_ENV_SIZE                 (8 * 1024)
63 #define CONFIG_ENV_OFFSET               (768 * 1024)
64
65 #define CONFIG_EXTRA_ENV_SETTINGS \
66         "stdin=serial,usbkbd\0" \
67         "stdout=serial,vga\0" \
68         "stderr=serial,vga\0" \
69         "panel=HDMI\0" \
70         "autoload=no\0" \
71         "uImage=uImage-cm-fx6\0" \
72         "zImage=zImage-cm-fx6\0" \
73         "kernel=uImage-cm-fx6\0" \
74         "script=boot.scr\0" \
75         "dtb=cm-fx6.dtb\0" \
76         "bootm_low=18000000\0" \
77         "loadaddr=0x10800000\0" \
78         "fdtaddr=0x11000000\0" \
79         "console=ttymxc3,115200\0" \
80         "ethprime=FEC0\0" \
81         "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
82         "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
83         "doboot=bootm ${loadaddr}\0" \
84         "doloadfdt=false\0" \
85         "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
86         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
87         "setboottypez=setenv kernel ${zImage};" \
88                 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
89                 "setenv doloadfdt true;\0" \
90         "setboottypem=setenv kernel ${uImage};" \
91                 "setenv doboot bootm ${loadaddr};" \
92                 "setenv doloadfdt false;\0"\
93         "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
94         "sataroot=/dev/sda2 rw rootwait\0" \
95         "nandroot=/dev/mtdblock4 rw\0" \
96         "nandrootfstype=ubifs\0" \
97         "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
98                 "${video} ${extrabootargs}\0" \
99         "sataargs=setenv bootargs console=${console} root=${sataroot} " \
100                 "${video} ${extrabootargs}\0" \
101         "nandargs=setenv bootargs console=${console} " \
102                 "root=${nandroot} " \
103                 "rootfstype=${nandrootfstype} " \
104                 "${video} ${extrabootargs}\0" \
105         "nandboot=if run nandloadkernel; then " \
106                         "run nandloadfdt;" \
107                         "run setboottypem;" \
108                         "run storagebootcmd;" \
109                         "run setboottypez;" \
110                         "run storagebootcmd;" \
111                 "fi;\0" \
112         "run_eboot=echo Starting EBOOT ...; "\
113                 "mmc dev 2 && " \
114                 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
115         "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
116         "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
117         "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
118         "bootscript=echo Running bootscript from ${storagetype} ...;" \
119                    "source ${loadaddr};\0" \
120         "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
121         "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
122         "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
123         "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
124         "setupnandboot=setenv storagetype nand;\0" \
125         "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
126         "storagebootcmd=echo Booting from ${storagetype} ...;" \
127                         "run ${storagetype}args; run doboot;\0" \
128         "trybootk=if run loadkernel; then " \
129                 "if ${doloadfdt}; then " \
130                         "run loadfdt;" \
131                 "fi;" \
132                 "run storagebootcmd;" \
133                 "fi;\0" \
134         "trybootsmz=if run loadscript; then " \
135                         "run bootscript;" \
136                 "fi;" \
137                 "run setboottypem;" \
138                 "run trybootk;" \
139                 "run setboottypez;" \
140                 "run trybootk;\0"
141
142 #define CONFIG_BOOTCOMMAND \
143         "run setupmmcboot;" \
144         "mmc dev ${storagedev};" \
145         "if mmc rescan; then " \
146                 "run trybootsmz;" \
147         "fi;" \
148         "run setupusbboot;" \
149         "if usb start; then "\
150                 "if run loadscript; then " \
151                         "run bootscript;" \
152                 "fi;" \
153         "fi;" \
154         "run setupsataboot;" \
155         "if sata init; then " \
156                 "run trybootsmz;" \
157         "fi;" \
158         "run setupnandboot;" \
159         "run nandboot;"
160
161 #define CONFIG_PREBOOT          "usb start;sf probe"
162
163 /* SPI */
164 #define CONFIG_SPI
165 #define CONFIG_MXC_SPI
166
167 /* NAND */
168 #ifndef CONFIG_SPL_BUILD
169 #define CONFIG_SYS_NAND_BASE            0x40000000
170 #define CONFIG_SYS_NAND_MAX_CHIPS       1
171 #define CONFIG_SYS_MAX_NAND_DEVICE      1
172 #define CONFIG_NAND_MXS
173 #define CONFIG_SYS_NAND_ONFI_DETECTION
174 /* APBH DMA is required for NAND support */
175 #define CONFIG_APBH_DMA
176 #define CONFIG_APBH_DMA_BURST
177 #define CONFIG_APBH_DMA_BURST8
178 #endif
179
180 /* Ethernet */
181 #define CONFIG_FEC_MXC
182 #define CONFIG_FEC_MXC_PHYADDR          0
183 #define CONFIG_FEC_XCV_TYPE             RGMII
184 #define IMX_FEC_BASE                    ENET_BASE_ADDR
185 #define CONFIG_PHY_ATHEROS
186 #define CONFIG_MII
187 #define CONFIG_ETHPRIME                 "FEC0"
188 #define CONFIG_ARP_TIMEOUT              200UL
189 #define CONFIG_NET_RETRY_COUNT          5
190
191 /* USB */
192 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
193 #define CONFIG_MXC_USB_FLAGS            0
194 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
195 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET        /* For OTG port */
196
197 /* I2C */
198 #define CONFIG_SYS_I2C
199 #define CONFIG_SYS_I2C_MXC
200 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
201 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
202 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
203 #define CONFIG_SYS_I2C_SPEED            100000
204 #define CONFIG_SYS_MXC_I2C3_SPEED       400000
205
206 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
207 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
208 #define CONFIG_SYS_I2C_EEPROM_BUS       2
209
210 /* SATA */
211 #define CONFIG_SYS_SATA_MAX_DEVICE      1
212 #define CONFIG_LBA48
213 #define CONFIG_DWC_AHSATA_PORT_ID       0
214 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
215
216 /* Boot */
217 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
218 #define CONFIG_SERIAL_TAG
219
220 /* misc */
221 #define CONFIG_SYS_MALLOC_LEN                   (10 * 1024 * 1024)
222 #define CONFIG_MISC_INIT_R
223
224 /* SPL */
225 #include "imx6_spl.h"
226 #define CONFIG_SYS_SPI_U_BOOT_OFFS      (64 * 1024)
227 #define CONFIG_SPL_SPI_LOAD
228
229 /* Display */
230 #define CONFIG_VIDEO_IPUV3
231 #define CONFIG_IMX_HDMI
232
233 #define CONFIG_SPLASH_SCREEN
234 #define CONFIG_SPLASH_SOURCE
235 #define CONFIG_VIDEO_BMP_RLE8
236
237 #define CONFIG_VIDEO_LOGO
238 #define CONFIG_VIDEO_BMP_LOGO
239
240 /* EEPROM */
241 #define CONFIG_ENV_EEPROM_IS_ON_I2C
242 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
243 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
244 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
245 #define CONFIG_SYS_EEPROM_SIZE                  256
246
247 #endif  /* __CONFIG_CM_FX6_H */