2 * Config file for Compulab CM-FX6 board
4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
6 * Author: Nikita Kiryanov <nikita@compulab.co.il>
8 * SPDX-License-Identifier: GPL-2.0+
11 #ifndef __CONFIG_CM_FX6_H
12 #define __CONFIG_CM_FX6_H
14 #include "mx6_common.h"
17 #define CONFIG_SYS_LITTLE_ENDIAN
18 #define CONFIG_MACH_TYPE 4273
21 #define CONFIG_SYS_FSL_USDHC_NUM 3
22 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
25 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
26 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
27 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
28 #define CONFIG_NR_DRAM_BANKS 2
29 #define CONFIG_SYS_MEMTEST_START 0x10000000
30 #define CONFIG_SYS_MEMTEST_END 0x10010000
31 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
32 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
33 #define CONFIG_SYS_INIT_SP_OFFSET \
34 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
35 #define CONFIG_SYS_INIT_SP_ADDR \
36 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
39 #define CONFIG_MXC_UART
40 #define CONFIG_MXC_UART_BASE UART4_BASE
41 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
44 #define CONFIG_SF_DEFAULT_BUS 0
45 #define CONFIG_SF_DEFAULT_CS 0
46 #define CONFIG_SF_DEFAULT_SPEED 25000000
47 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
50 #ifndef CONFIG_SPL_BUILD
51 #define CONFIG_MTD_DEVICE
52 #define CONFIG_MTD_PARTITIONS
53 #define CONFIG_SPI_FLASH_MTD
57 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
58 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
59 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
60 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
61 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
62 #define CONFIG_ENV_SIZE (8 * 1024)
63 #define CONFIG_ENV_OFFSET (768 * 1024)
65 #define CONFIG_EXTRA_ENV_SETTINGS \
66 "fdt_high=0xffffffff\0" \
67 "initrd_high=0xffffffff\0" \
68 "fdt_addr_r=0x18000000\0" \
69 "ramdisk_addr_r=0x13000000\0" \
70 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
71 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
72 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
73 "stdin=serial,usbkbd\0" \
74 "stdout=serial,vga\0" \
75 "stderr=serial,vga\0" \
78 "uImage=uImage-cm-fx6\0" \
79 "zImage=zImage-cm-fx6\0" \
80 "kernel=uImage-cm-fx6\0" \
83 "console=ttymxc3,115200\0" \
85 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
86 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
87 "doboot=bootm ${kernel_addr_r}\0" \
89 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
90 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
91 "setboottypez=setenv kernel ${zImage};" \
92 "setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \
93 "setenv doloadfdt true;\0" \
94 "setboottypem=setenv kernel ${uImage};" \
95 "setenv doboot bootm ${kernel_addr_r};" \
96 "setenv doloadfdt false;\0"\
97 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
98 "sataroot=/dev/sda2 rw rootwait\0" \
99 "nandroot=/dev/mtdblock4 rw\0" \
100 "nandrootfstype=ubifs\0" \
101 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
102 "${video} ${extrabootargs}\0" \
103 "sataargs=setenv bootargs console=${console} root=${sataroot} " \
104 "${video} ${extrabootargs}\0" \
105 "nandargs=setenv bootargs console=${console} " \
106 "root=${nandroot} " \
107 "rootfstype=${nandrootfstype} " \
108 "${video} ${extrabootargs}\0" \
109 "nandboot=if run nandloadkernel; then " \
111 "run setboottypem;" \
112 "run storagebootcmd;" \
113 "run setboottypez;" \
114 "run storagebootcmd;" \
116 "run_eboot=echo Starting EBOOT ...; "\
118 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
119 "loadscript=load ${storagetype} ${storagedev} ${scriptaddr} ${script};\0"\
120 "loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\
121 "loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \
122 "bootscript=echo Running bootscript from ${storagetype} ...;" \
123 "source ${scriptaddr};\0" \
124 "nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \
125 "nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \
126 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
127 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
128 "setupnandboot=setenv storagetype nand;\0" \
129 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
130 "storagebootcmd=echo Booting from ${storagetype} ...;" \
131 "run ${storagetype}args; run doboot;\0" \
132 "trybootk=if run loadkernel; then " \
133 "if ${doloadfdt}; then " \
136 "run storagebootcmd;" \
138 "trybootsmz=if run loadscript; then " \
141 "run setboottypem;" \
143 "run setboottypez;" \
146 #define CONFIG_BOOTCOMMAND \
147 "run setupmmcboot;" \
148 "mmc dev ${storagedev};" \
149 "if mmc rescan; then " \
152 "run setupusbboot;" \
153 "if usb start; then "\
154 "if run loadscript; then " \
158 "run setupsataboot;" \
159 "if sata init; then " \
162 "run setupnandboot;" \
165 #define CONFIG_PREBOOT "usb start;sf probe"
169 #define CONFIG_MXC_SPI
172 #ifndef CONFIG_SPL_BUILD
173 #define CONFIG_SYS_NAND_BASE 0x40000000
174 #define CONFIG_SYS_NAND_MAX_CHIPS 1
175 #define CONFIG_SYS_MAX_NAND_DEVICE 1
176 #define CONFIG_NAND_MXS
177 #define CONFIG_SYS_NAND_ONFI_DETECTION
178 /* APBH DMA is required for NAND support */
179 #define CONFIG_APBH_DMA
180 #define CONFIG_APBH_DMA_BURST
181 #define CONFIG_APBH_DMA_BURST8
185 #define CONFIG_FEC_MXC
186 #define CONFIG_FEC_MXC_PHYADDR 0
187 #define CONFIG_FEC_XCV_TYPE RGMII
188 #define IMX_FEC_BASE ENET_BASE_ADDR
189 #define CONFIG_PHY_ATHEROS
191 #define CONFIG_ETHPRIME "FEC0"
192 #define CONFIG_ARP_TIMEOUT 200UL
193 #define CONFIG_NET_RETRY_COUNT 5
196 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
197 #define CONFIG_MXC_USB_FLAGS 0
198 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
199 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
202 #define CONFIG_SYS_I2C
203 #define CONFIG_SYS_I2C_MXC
204 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
205 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
206 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
207 #define CONFIG_SYS_I2C_SPEED 100000
208 #define CONFIG_SYS_MXC_I2C3_SPEED 400000
210 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
211 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
212 #define CONFIG_SYS_I2C_EEPROM_BUS 2
215 #define CONFIG_SYS_SATA_MAX_DEVICE 1
217 #define CONFIG_DWC_AHSATA_PORT_ID 0
218 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
221 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
222 #define CONFIG_SERIAL_TAG
225 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
226 #define CONFIG_MISC_INIT_R
229 #include "imx6_spl.h"
230 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
231 #define CONFIG_SPL_SPI_LOAD
234 #define CONFIG_VIDEO_IPUV3
235 #define CONFIG_IMX_HDMI
237 #define CONFIG_SPLASH_SCREEN
238 #define CONFIG_SPLASH_SOURCE
239 #define CONFIG_VIDEO_BMP_RLE8
241 #define CONFIG_VIDEO_LOGO
242 #define CONFIG_VIDEO_BMP_LOGO
245 #define CONFIG_ENV_EEPROM_IS_ON_I2C
246 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
247 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
248 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
249 #define CONFIG_SYS_EEPROM_SIZE 256
251 #endif /* __CONFIG_CM_FX6_H */