include/configs/cm_fx6.h

   1 /*
   2  * Config file for Compulab CM-FX6 board
   3  *
   4  * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
   5  *
   6  * Author: Nikita Kiryanov <nikita@compulab.co.il>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_CM_FX6_H
  12 #define __CONFIG_CM_FX6_H
  13
  14 #include "mx6_common.h"
  15
  16 #ifndef CONFIG_SPL_BUILD
  17 #include <config_distro_defaults.h>
  18 #endif
  19
  20 /* Machine config */
  21 #define CONFIG_SYS_LITTLE_ENDIAN
  22 #define CONFIG_MACH_TYPE                4273
  23
  24 /* MMC */
  25 #define CONFIG_SYS_FSL_USDHC_NUM        3
  26 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC2_BASE_ADDR
  27
  28 /* RAM */
  29 #define PHYS_SDRAM_1                    MMDC0_ARB_BASE_ADDR
  30 #define PHYS_SDRAM_2                    MMDC1_ARB_BASE_ADDR
  31 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
  32 #define CONFIG_NR_DRAM_BANKS            2
  33 #define CONFIG_SYS_MEMTEST_START        0x10000000
  34 #define CONFIG_SYS_MEMTEST_END          0x10010000
  35 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  36 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
  37 #define CONFIG_SYS_INIT_SP_OFFSET \
  38         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  39 #define CONFIG_SYS_INIT_SP_ADDR \
  40         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  41
  42 /* Serial console */
  43 #define CONFIG_MXC_UART
  44 #define CONFIG_MXC_UART_BASE            UART4_BASE
  45 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200}
  46
  47 /* SPI flash */
  48 #define CONFIG_SF_DEFAULT_BUS           0
  49 #define CONFIG_SF_DEFAULT_CS            0
  50 #define CONFIG_SF_DEFAULT_SPEED         25000000
  51 #define CONFIG_SF_DEFAULT_MODE          (SPI_MODE_0)
  52
  53 /* MTD support */
  54 #ifndef CONFIG_SPL_BUILD
  55 #define CONFIG_MTD_DEVICE
  56 #define CONFIG_MTD_PARTITIONS
  57 #define CONFIG_SPI_FLASH_MTD
  58 #endif
  59
  60 /* Environment */
  61 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
  62 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
  63 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
  64 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
  65 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
  66 #define CONFIG_ENV_SIZE                 (8 * 1024)
  67 #define CONFIG_ENV_OFFSET               (768 * 1024)
  68
  69 #ifndef CONFIG_SPL_BUILD
  70 #define CONFIG_EXTRA_ENV_SETTINGS \
  71         "fdt_high=0xffffffff\0" \
  72         "initrd_high=0xffffffff\0" \
  73         "fdt_addr_r=0x18000000\0" \
  74         "ramdisk_addr_r=0x13000000\0" \
  75         "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
  76         "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
  77         "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
  78         "stdin=serial,usbkbd\0" \
  79         "stdout=serial,vga\0" \
  80         "stderr=serial,vga\0" \
  81         "panel=HDMI\0" \
  82         "autoload=no\0" \
  83         "uImage=uImage-cm-fx6\0" \
  84         "zImage=zImage-cm-fx6\0" \
  85         "kernel=uImage-cm-fx6\0" \
  86         "dtb=cm-fx6.dtb\0" \
  87         "console=ttymxc3,115200\0" \
  88         "ethprime=FEC0\0" \
  89         "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
  90         "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
  91         "doboot=bootm ${kernel_addr_r}\0" \
  92         "doloadfdt=false\0" \
  93         "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
  94         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
  95         "setboottypez=setenv kernel ${zImage};" \
  96                 "setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \
  97                 "setenv doloadfdt true;\0" \
  98         "setboottypem=setenv kernel ${uImage};" \
  99                 "setenv doboot bootm ${kernel_addr_r};" \
 100                 "setenv doloadfdt false;\0"\
 101         "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
 102         "sataroot=/dev/sda2 rw rootwait\0" \
 103         "nandroot=/dev/mtdblock4 rw\0" \
 104         "nandrootfstype=ubifs\0" \
 105         "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
 106                 "${video} ${extrabootargs}\0" \
 107         "sataargs=setenv bootargs console=${console} root=${sataroot} " \
 108                 "${video} ${extrabootargs}\0" \
 109         "nandargs=setenv bootargs console=${console} " \
 110                 "root=${nandroot} " \
 111                 "rootfstype=${nandrootfstype} " \
 112                 "${video} ${extrabootargs}\0" \
 113         "nandboot=if run nandloadkernel; then " \
 114                         "run nandloadfdt;" \
 115                         "run setboottypem;" \
 116                         "run storagebootcmd;" \
 117                         "run setboottypez;" \
 118                         "run storagebootcmd;" \
 119                 "fi;\0" \
 120         "run_eboot=echo Starting EBOOT ...; "\
 121                 "mmc dev 2 && " \
 122                 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
 123         "loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\
 124         "loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \
 125         "nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \
 126         "nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \
 127         "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
 128         "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
 129         "setupnandboot=setenv storagetype nand;\0" \
 130         "storagebootcmd=echo Booting from ${storagetype} ...;" \
 131                         "run ${storagetype}args; run doboot;\0" \
 132         "trybootk=if run loadkernel; then " \
 133                 "if ${doloadfdt}; then " \
 134                         "run loadfdt;" \
 135                 "fi;" \
 136                 "run storagebootcmd;" \
 137                 "fi;\0" \
 138         "trybootsmz=" \
 139                 "run setboottypem;" \
 140                 "run trybootk;" \
 141                 "run setboottypez;" \
 142                 "run trybootk;\0" \
 143         "legacy_bootcmd=" \
 144                 "run setupmmcboot;" \
 145                 "mmc dev ${storagedev};" \
 146                 "if mmc rescan; then " \
 147                         "run trybootsmz;" \
 148                 "fi;" \
 149                 "run setupsataboot;" \
 150                 "if sata init; then " \
 151                         "run trybootsmz;" \
 152                 "fi;" \
 153                 "run setupnandboot;" \
 154                 "run nandboot;\0" \
 155         BOOTENV
 156
 157 #define CONFIG_PREBOOT          "usb start;sf probe"
 158
 159 #define BOOT_TARGET_DEVICES(func) \
 160         func(USB, usb, 0) \
 161         func(MMC, mmc, 2) \
 162         func(SATA, sata, 0)
 163
 164 #include <config_distro_bootcmd.h>
 165 #else
 166 #define CONFIG_EXTRA_ENV_SETTINGS
 167 #endif
 168
 169 /* SPI */
 170 #define CONFIG_SPI
 171 #define CONFIG_MXC_SPI
 172
 173 /* NAND */
 174 #ifndef CONFIG_SPL_BUILD
 175 #define CONFIG_SYS_NAND_BASE            0x40000000
 176 #define CONFIG_SYS_NAND_MAX_CHIPS       1
 177 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 178 #define CONFIG_NAND_MXS
 179 #define CONFIG_SYS_NAND_ONFI_DETECTION
 180 /* APBH DMA is required for NAND support */
 181 #define CONFIG_APBH_DMA
 182 #define CONFIG_APBH_DMA_BURST
 183 #define CONFIG_APBH_DMA_BURST8
 184 #endif
 185
 186 /* Ethernet */
 187 #define CONFIG_FEC_MXC
 188 #define CONFIG_FEC_MXC_PHYADDR          0
 189 #define CONFIG_FEC_XCV_TYPE             RGMII
 190 #define IMX_FEC_BASE                    ENET_BASE_ADDR
 191 #define CONFIG_PHY_ATHEROS
 192 #define CONFIG_MII
 193 #define CONFIG_ETHPRIME                 "FEC0"
 194 #define CONFIG_ARP_TIMEOUT              200UL
 195 #define CONFIG_NET_RETRY_COUNT          5
 196
 197 /* USB */
 198 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 199 #define CONFIG_MXC_USB_FLAGS            0
 200 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 201 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET        /* For OTG port */
 202
 203 /* I2C */
 204 #define CONFIG_SYS_I2C
 205 #define CONFIG_SYS_I2C_MXC
 206 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
 207 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
 208 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
 209 #define CONFIG_SYS_I2C_SPEED            100000
 210 #define CONFIG_SYS_MXC_I2C3_SPEED       400000
 211
 212 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 213 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
 214 #define CONFIG_SYS_I2C_EEPROM_BUS       2
 215
 216 /* SATA */
 217 #define CONFIG_SYS_SATA_MAX_DEVICE      1
 218 #define CONFIG_LBA48
 219 #define CONFIG_DWC_AHSATA_PORT_ID       0
 220 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
 221
 222 /* Boot */
 223 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
 224 #define CONFIG_SERIAL_TAG
 225
 226 /* misc */
 227 #define CONFIG_SYS_MALLOC_LEN                   (10 * 1024 * 1024)
 228 #define CONFIG_MISC_INIT_R
 229
 230 /* SPL */
 231 #include "imx6_spl.h"
 232 #define CONFIG_SYS_SPI_U_BOOT_OFFS      (64 * 1024)
 233 #define CONFIG_SPL_SPI_LOAD
 234
 235 /* Display */
 236 #define CONFIG_VIDEO_IPUV3
 237 #define CONFIG_IMX_HDMI
 238
 239 #define CONFIG_SPLASH_SCREEN
 240 #define CONFIG_SPLASH_SOURCE
 241 #define CONFIG_VIDEO_BMP_RLE8
 242
 243 #define CONFIG_VIDEO_LOGO
 244 #define CONFIG_VIDEO_BMP_LOGO
 245
 246 /* EEPROM */
 247 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 248 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 249 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
 250 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
 251 #define CONFIG_SYS_EEPROM_SIZE                  256
 252
 253 #endif  /* __CONFIG_CM_FX6_H */