Merge git://git.denx.de/u-boot-fsl-qoriq
[oweals/u-boot.git] / include / configs / UCP1020.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2013-2015 Arcturus Networks, Inc.
4  *           http://www.arcturusnetworks.com/products/ucp1020/
5  * based on include/configs/p1_p2_rdb_pc.h
6  * original copyright follows:
7  * Copyright 2009-2011 Freescale Semiconductor, Inc.
8  */
9
10 /*
11  * QorIQ uCP1020-xx boards configuration file
12  */
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
17 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
18 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
19 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
20 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
21 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
22
23 #if defined(CONFIG_TARTGET_UCP1020T1)
24
25 #define CONFIG_UCP1020_REV_1_3
26
27 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
28
29 #define CONFIG_TSEC1
30 #define CONFIG_TSEC3
31 #define CONFIG_HAS_ETH0
32 #define CONFIG_HAS_ETH1
33 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
34 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
35 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
36 #define CONFIG_IPADDR           10.80.41.229
37 #define CONFIG_SERVERIP         10.80.41.227
38 #define CONFIG_NETMASK          255.255.252.0
39 #define CONFIG_ETHPRIME         "eTSEC3"
40
41 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
42
43 #define CONFIG_SYS_L2_SIZE      (256 << 10)
44
45 #endif
46
47 #if defined(CONFIG_TARGET_UCP1020)
48
49 #define CONFIG_UCP1020
50 #define CONFIG_UCP1020_REV_1_3
51
52 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
53
54 #define CONFIG_TSEC1
55 #define CONFIG_TSEC2
56 #define CONFIG_TSEC3
57 #define CONFIG_HAS_ETH0
58 #define CONFIG_HAS_ETH1
59 #define CONFIG_HAS_ETH2
60 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
61 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
62 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
63 #define CONFIG_IPADDR           192.168.1.81
64 #define CONFIG_IPADDR1          192.168.1.82
65 #define CONFIG_IPADDR2          192.168.1.83
66 #define CONFIG_SERVERIP         192.168.1.80
67 #define CONFIG_GATEWAYIP        102.168.1.1
68 #define CONFIG_NETMASK          255.255.255.0
69 #define CONFIG_ETHPRIME         "eTSEC1"
70
71 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
72
73 #define CONFIG_SYS_L2_SIZE      (256 << 10)
74
75 #endif
76
77 #ifdef CONFIG_SDCARD
78 #define CONFIG_RAMBOOT_SDCARD
79 #define CONFIG_SYS_RAMBOOT
80 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
81 #endif
82
83 #ifdef CONFIG_SPIFLASH
84 #define CONFIG_RAMBOOT_SPIFLASH
85 #define CONFIG_SYS_RAMBOOT
86 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
87 #endif
88
89 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
90
91 #ifndef CONFIG_RESET_VECTOR_ADDRESS
92 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
93 #endif
94
95 #ifndef CONFIG_SYS_MONITOR_BASE
96 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
97 #endif
98
99 #define CONFIG_ENV_OVERWRITE
100
101 #define CONFIG_SYS_SATA_MAX_DEVICE      2
102 #define CONFIG_LBA48
103
104 #define CONFIG_SYS_CLK_FREQ     66666666
105 #define CONFIG_DDR_CLK_FREQ     66666666
106
107 #define CONFIG_HWCONFIG
108
109 /*
110  * These can be toggled for performance analysis, otherwise use default.
111  */
112 #define CONFIG_L2_CACHE
113 #define CONFIG_BTB
114
115 #define CONFIG_ENABLE_36BIT_PHYS
116
117 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
118 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
119
120 #define CONFIG_SYS_CCSRBAR              0xffe00000
121 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
122
123 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
124        SPL code*/
125 #ifdef CONFIG_SPL_BUILD
126 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
127 #endif
128
129 /* DDR Setup */
130 #define CONFIG_DDR_ECC_ENABLE
131 #ifndef CONFIG_DDR_ECC_ENABLE
132 #define CONFIG_SYS_DDR_RAW_TIMING
133 #define CONFIG_DDR_SPD
134 #endif
135 #define CONFIG_SYS_SPD_BUS_NUM 1
136
137 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
138 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
139 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
140 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
141 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
142
143 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
144
145 /* Default settings for DDR3 */
146 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
147 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
148 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
149 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
150 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
151 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
152
153 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
154 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
155 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
156 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
157
158 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
159 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
160 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
161 #define CONFIG_SYS_DDR_RCW_1            0x00000000
162 #define CONFIG_SYS_DDR_RCW_2            0x00000000
163 #ifdef CONFIG_DDR_ECC_ENABLE
164 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
165 #else
166 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
167 #endif
168 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
169 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
170 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
171
172 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
173 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
174 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
175 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
176 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
177 #define CONFIG_SYS_DDR_MODE_1           0x40461520
178 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
179 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
180
181 #undef CONFIG_CLOCKS_IN_MHZ
182
183 /*
184  * Memory map
185  *
186  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
187  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
188  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
189  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
190  *   (early boot only)
191  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
192  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
193  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
194  */
195
196 /*
197  * Local Bus Definitions
198  */
199 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
200 #define CONFIG_SYS_FLASH_BASE           0xec000000
201
202 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
203
204 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
205         | BR_PS_16 | BR_V)
206
207 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
208
209 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
210 #define CONFIG_SYS_FLASH_QUIET_TEST
211 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
212
213 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
214
215 #undef CONFIG_SYS_FLASH_CHECKSUM
216 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
217 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
218
219 #define CONFIG_SYS_FLASH_EMPTY_INFO
220
221 #define CONFIG_SYS_INIT_RAM_LOCK
222 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
223 /* Initial L1 address */
224 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
225 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
226 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
227 /* Size of used area in RAM */
228 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
229
230 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
231                                         GENERATED_GBL_DATA_SIZE)
232 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
233
234 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
235 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
236
237 #define CONFIG_SYS_PMC_BASE     0xff980000
238 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
239 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
240                                         BR_PS_8 | BR_V)
241 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
242                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
243                                  OR_GPCM_EAD)
244
245 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
246 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
247 #ifdef CONFIG_NAND_FSL_ELBC
248 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
249 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
250 #endif
251
252 /* Serial Port - controlled on board with jumper J8
253  * open - index 2
254  * shorted - index 1
255  */
256 #undef CONFIG_SERIAL_SOFTWARE_FIFO
257 #define CONFIG_SYS_NS16550_SERIAL
258 #define CONFIG_SYS_NS16550_REG_SIZE     1
259 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
260 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
261 #define CONFIG_NS16550_MIN_FUNCTIONS
262 #endif
263
264 #define CONFIG_SYS_BAUDRATE_TABLE       \
265         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
266
267 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
268 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
269
270 /* I2C */
271 #define CONFIG_SYS_I2C
272 #define CONFIG_SYS_I2C_FSL
273 #define CONFIG_SYS_FSL_I2C_SPEED        400000
274 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
275 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
276 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
277 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
278 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
279 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
280 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
281
282 #define CONFIG_RTC_DS1337
283 #define CONFIG_RTC_DS1337_NOOSC
284 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
285 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
286 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
287 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
288
289 #define CONFIG_SF_DEFAULT_SPEED         10000000
290 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
291
292 #if defined(CONFIG_PCI)
293 /*
294  * General PCI
295  * Memory space is mapped 1-1, but I/O space must start from 0.
296  */
297
298 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
299 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
300 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
301 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
302 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
303 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
304 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
305 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
306 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
307 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
308
309 /* controller 1, Slot 2, tgtid 1, Base address a000 */
310 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
311 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
312 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
313 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
314 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
315 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
316 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
317 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
318 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
319
320 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
321 #endif /* CONFIG_PCI */
322
323 /*
324  * Environment
325  */
326 #ifdef CONFIG_ENV_FIT_UCBOOT
327
328 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
329 #define CONFIG_ENV_SIZE         0x20000
330 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
331
332 #else
333
334 #define CONFIG_ENV_SPI_BUS      0
335 #define CONFIG_ENV_SPI_CS       0
336 #define CONFIG_ENV_SPI_MAX_HZ   10000000
337 #define CONFIG_ENV_SPI_MODE     0
338
339 #ifdef CONFIG_RAMBOOT_SPIFLASH
340
341 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
342 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
343 #define CONFIG_ENV_SECT_SIZE    0x1000
344
345 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
346 /* Address and size of Redundant Environment Sector     */
347 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
348 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
349 #endif
350
351 #elif defined(CONFIG_RAMBOOT_SDCARD)
352 #define CONFIG_FSL_FIXED_MMC_LOCATION
353 #define CONFIG_ENV_SIZE         0x2000
354 #define CONFIG_SYS_MMC_ENV_DEV  0
355
356 #elif defined(CONFIG_SYS_RAMBOOT)
357 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
358 #define CONFIG_ENV_SIZE         0x2000
359
360 #else
361 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
362 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
363 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
364 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
365 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
366 /* Address and size of Redundant Environment Sector     */
367 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
368 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
369 #endif
370
371 #endif
372
373 #endif  /* CONFIG_ENV_FIT_UCBOOT */
374
375 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
376 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
377
378 /*
379  * USB
380  */
381 #define CONFIG_HAS_FSL_DR_USB
382
383 #if defined(CONFIG_HAS_FSL_DR_USB)
384 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
385
386 #ifdef CONFIG_USB_EHCI_HCD
387 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
388 #define CONFIG_USB_EHCI_FSL
389 #endif
390 #endif
391
392 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
393
394 #ifdef CONFIG_MMC
395 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
396 #define CONFIG_MMC_SPI
397 #endif
398
399 /* Misc Extra Settings */
400 #undef CONFIG_WATCHDOG  /* watchdog disabled */
401
402 /*
403  * Miscellaneous configurable options
404  */
405 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
406 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
407
408 /*
409  * For booting Linux, the board info and command line data
410  * have to be in the first 64 MB of memory, since this is
411  * the maximum mapped by the Linux kernel during initialization.
412  */
413 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
414 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
415
416 #if defined(CONFIG_CMD_KGDB)
417 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
418 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
419 #endif
420
421 /*
422  * Environment Configuration
423  */
424
425 #if defined(CONFIG_TSEC_ENET)
426
427 #if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
428 #else
429 #error "UCP1020 module revision is not defined !!!"
430 #endif
431
432 #define CONFIG_BOOTP_SERVERIP
433
434 #define CONFIG_TSEC1_NAME       "eTSEC1"
435 #define CONFIG_TSEC2_NAME       "eTSEC2"
436 #define CONFIG_TSEC3_NAME       "eTSEC3"
437
438 #define TSEC1_PHY_ADDR  4
439 #define TSEC2_PHY_ADDR  0
440 #define TSEC2_PHY_ADDR_SGMII    0x00
441 #define TSEC3_PHY_ADDR  6
442
443 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
444 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
445 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
446
447 #define TSEC1_PHYIDX    0
448 #define TSEC2_PHYIDX    0
449 #define TSEC3_PHYIDX    0
450
451 #endif
452
453 #define CONFIG_HOSTNAME         "UCP1020"
454 #define CONFIG_ROOTPATH         "/opt/nfsroot"
455 #define CONFIG_BOOTFILE         "uImage"
456 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
457
458 /* default location for tftp and bootm */
459 #define CONFIG_LOADADDR         1000000
460
461 #if defined(CONFIG_DONGLE)
462
463 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
464 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
465 "bootfile=uImage\0"                                                     \
466 "consoledev=ttyS0\0"                                                    \
467 "cramfsfile=image.cramfs\0"                                             \
468 "dtbaddr=0x00c00000\0"                                                  \
469 "dtbfile=image.dtb\0"                                                   \
470 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
471 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
472 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
473 "fileaddr=0x01000000\0"                                                 \
474 "filesize=0x00080000\0"                                                 \
475 "flashmbr=sf probe 0; "                                                 \
476         "tftp $loadaddr $mbr; "                                         \
477         "sf erase $mbr_offset +$filesize; "                             \
478         "sf write $loadaddr $mbr_offset $filesize\0"                    \
479 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
480         "protect off $nor_recoveryaddr +$filesize; "                    \
481         "erase $nor_recoveryaddr +$filesize; "                          \
482         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
483         "protect on $nor_recoveryaddr +$filesize\0 "                    \
484 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
485         "protect off $nor_ubootaddr +$filesize; "                       \
486         "erase $nor_ubootaddr +$filesize; "                             \
487         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
488         "protect on $nor_ubootaddr +$filesize\0 "                       \
489 "flashworking=tftp $workingaddr $cramfsfile; "                          \
490         "protect off $nor_workingaddr +$filesize; "                     \
491         "erase $nor_workingaddr +$filesize; "                           \
492         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
493         "protect on $nor_workingaddr +$filesize\0 "                     \
494 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
495 "kerneladdr=0x01100000\0"                                               \
496 "kernelfile=uImage\0"                                                   \
497 "loadaddr=0x01000000\0"                                                 \
498 "mbr=uCP1020d.mbr\0"                                                    \
499 "mbr_offset=0x00000000\0"                                               \
500 "mmbr=uCP1020Quiet.mbr\0"                                               \
501 "mmcpart=0:2\0"                                                         \
502 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
503         "mmc erase 1 1; "                                               \
504         "mmc write $loadaddr 1 1\0"                                     \
505 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
506         "mmc erase 0x40 0x400; "                                        \
507         "mmc write $loadaddr 0x40 0x400\0"                              \
508 "netdev=eth0\0"                                                         \
509 "nor_recoveryaddr=0xEC0A0000\0"                                         \
510 "nor_ubootaddr=0xEFF80000\0"                                            \
511 "nor_workingaddr=0xECFA0000\0"                                          \
512 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
513         " console=$consoledev,$baudrate $othbootargs; "                 \
514         "run norloadrecovery; "                                         \
515         "bootm $kerneladdr - $dtbaddr\0"                                \
516 "norbootworking=setenv bootargs $workingbootargs"                       \
517         " console=$consoledev,$baudrate $othbootargs; "                 \
518         "run norloadworking; "                                          \
519         "bootm $kerneladdr - $dtbaddr\0"                                \
520 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
521         "setenv cramfsaddr $nor_recoveryaddr; "                         \
522         "cramfsload $dtbaddr $dtbfile; "                                \
523         "cramfsload $kerneladdr $kernelfile\0"                          \
524 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
525         "setenv cramfsaddr $nor_workingaddr; "                          \
526         "cramfsload $dtbaddr $dtbfile; "                                \
527         "cramfsload $kerneladdr $kernelfile\0"                          \
528 "prog_spi_mbr=run spi__mbr\0"                                           \
529 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
530 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
531         "run spi__cramfs\0"                                             \
532 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
533         " console=$consoledev,$baudrate $othbootargs; "                 \
534         "tftp $rootfsaddr $rootfsfile; "                                \
535         "tftp $loadaddr $kernelfile; "                                  \
536         "tftp $dtbaddr $dtbfile; "                                      \
537         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
538 "ramdisk_size=120000\0"                                                 \
539 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
540 "recoveryaddr=0x02F00000\0"                                             \
541 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
542 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
543         "mw.l 0xffe0f008 0x00400000\0"                                  \
544 "rootfsaddr=0x02F00000\0"                                               \
545 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
546 "rootpath=/opt/nfsroot\0"                                               \
547 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
548         "protect off 0xeC000000 +$filesize; "                           \
549         "erase 0xEC000000 +$filesize; "                                 \
550         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
551         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
552         "protect on 0xeC000000 +$filesize\0"                            \
553 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
554         "protect off 0xeFF80000 +$filesize; "                           \
555         "erase 0xEFF80000 +$filesize; "                                 \
556         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
557         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
558         "protect on 0xeFF80000 +$filesize\0"                            \
559 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
560         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
561         "sf write $loadaddr 0x8000 $filesize\0"                         \
562 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
563         "protect off 0xec0a0000 +$filesize; "                           \
564         "erase 0xeC0A0000 +$filesize; "                                 \
565         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
566         "protect on 0xec0a0000 +$filesize\0"                            \
567 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
568         "sf probe 1; sf erase 0 +$filesize; "                           \
569         "sf write $loadaddr 0 $filesize\0"                              \
570 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
571         "sf probe 0; sf erase 0 +$filesize; "                           \
572         "sf write $loadaddr 0 $filesize\0"                              \
573 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
574         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
575         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
576         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
577         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
578         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
579 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
580 "ubootaddr=0x01000000\0"                                                \
581 "ubootfile=u-boot.bin\0"                                                \
582 "ubootd=u-boot4dongle.bin\0"                                            \
583 "upgrade=run flashworking\0"                                            \
584 "usb_phy_type=ulpi\0 "                                                  \
585 "workingaddr=0x02F00000\0"                                              \
586 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
587
588 #else
589
590 #if defined(CONFIG_UCP1020T1)
591
592 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
593 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
594 "bootfile=uImage\0"                                                     \
595 "consoledev=ttyS0\0"                                                    \
596 "cramfsfile=image.cramfs\0"                                             \
597 "dtbaddr=0x00c00000\0"                                                  \
598 "dtbfile=image.dtb\0"                                                   \
599 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
600 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
601 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
602 "fileaddr=0x01000000\0"                                                 \
603 "filesize=0x00080000\0"                                                 \
604 "flashmbr=sf probe 0; "                                                 \
605         "tftp $loadaddr $mbr; "                                         \
606         "sf erase $mbr_offset +$filesize; "                             \
607         "sf write $loadaddr $mbr_offset $filesize\0"                    \
608 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
609         "protect off $nor_recoveryaddr +$filesize; "                    \
610         "erase $nor_recoveryaddr +$filesize; "                          \
611         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
612         "protect on $nor_recoveryaddr +$filesize\0 "                    \
613 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
614         "protect off $nor_ubootaddr +$filesize; "                       \
615         "erase $nor_ubootaddr +$filesize; "                             \
616         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
617         "protect on $nor_ubootaddr +$filesize\0 "                       \
618 "flashworking=tftp $workingaddr $cramfsfile; "                          \
619         "protect off $nor_workingaddr +$filesize; "                     \
620         "erase $nor_workingaddr +$filesize; "                           \
621         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
622         "protect on $nor_workingaddr +$filesize\0 "                     \
623 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
624 "kerneladdr=0x01100000\0"                                               \
625 "kernelfile=uImage\0"                                                   \
626 "loadaddr=0x01000000\0"                                                 \
627 "mbr=uCP1020.mbr\0"                                                     \
628 "mbr_offset=0x00000000\0"                                               \
629 "netdev=eth0\0"                                                         \
630 "nor_recoveryaddr=0xEC0A0000\0"                                         \
631 "nor_ubootaddr=0xEFF80000\0"                                            \
632 "nor_workingaddr=0xECFA0000\0"                                          \
633 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
634         " console=$consoledev,$baudrate $othbootargs; "                 \
635         "run norloadrecovery; "                                         \
636         "bootm $kerneladdr - $dtbaddr\0"                                \
637 "norbootworking=setenv bootargs $workingbootargs"                       \
638         " console=$consoledev,$baudrate $othbootargs; "                 \
639         "run norloadworking; "                                          \
640         "bootm $kerneladdr - $dtbaddr\0"                                \
641 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
642         "setenv cramfsaddr $nor_recoveryaddr; "                         \
643         "cramfsload $dtbaddr $dtbfile; "                                \
644         "cramfsload $kerneladdr $kernelfile\0"                          \
645 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
646         "setenv cramfsaddr $nor_workingaddr; "                          \
647         "cramfsload $dtbaddr $dtbfile; "                                \
648         "cramfsload $kerneladdr $kernelfile\0"                          \
649 "othbootargs=quiet\0"                                                   \
650 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
651         " console=$consoledev,$baudrate $othbootargs; "                 \
652         "tftp $rootfsaddr $rootfsfile; "                                \
653         "tftp $loadaddr $kernelfile; "                                  \
654         "tftp $dtbaddr $dtbfile; "                                      \
655         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
656 "ramdisk_size=120000\0"                                                 \
657 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
658 "recoveryaddr=0x02F00000\0"                                             \
659 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
660 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
661         "mw.l 0xffe0f008 0x00400000\0"                                  \
662 "rootfsaddr=0x02F00000\0"                                               \
663 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
664 "rootpath=/opt/nfsroot\0"                                               \
665 "silent=1\0"                                                            \
666 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
667         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
668         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
669         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
670         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
671         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
672 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
673 "ubootaddr=0x01000000\0"                                                \
674 "ubootfile=u-boot.bin\0"                                                \
675 "upgrade=run flashworking\0"                                            \
676 "workingaddr=0x02F00000\0"                                              \
677 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
678
679 #else /* For Arcturus Modules */
680
681 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
682 "bootcmd=run norkernel\0"                                               \
683 "bootfile=uImage\0"                                                     \
684 "consoledev=ttyS0\0"                                                    \
685 "dtbaddr=0x00c00000\0"                                                  \
686 "dtbfile=image.dtb\0"                                                   \
687 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
688 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
689 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
690 "fileaddr=0x01000000\0"                                                 \
691 "filesize=0x00080000\0"                                                 \
692 "flashmbr=sf probe 0; "                                                 \
693         "tftp $loadaddr $mbr; "                                         \
694         "sf erase $mbr_offset +$filesize; "                             \
695         "sf write $loadaddr $mbr_offset $filesize\0"                    \
696 "flashuboot=tftp $loadaddr $ubootfile; "                                \
697         "protect off $nor_ubootaddr0 +$filesize; "                      \
698         "erase $nor_ubootaddr0 +$filesize; "                            \
699         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
700         "protect on $nor_ubootaddr0 +$filesize; "                       \
701         "protect off $nor_ubootaddr1 +$filesize; "                      \
702         "erase $nor_ubootaddr1 +$filesize; "                            \
703         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
704         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
705 "format0=protect off $part0base +$part0size; "                          \
706         "erase $part0base +$part0size\0"                                \
707 "format1=protect off $part1base +$part1size; "                          \
708         "erase $part1base +$part1size\0"                                \
709 "format2=protect off $part2base +$part2size; "                          \
710         "erase $part2base +$part2size\0"                                \
711 "format3=protect off $part3base +$part3size; "                          \
712         "erase $part3base +$part3size\0"                                \
713 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
714 "kerneladdr=0x01100000\0"                                               \
715 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
716 "kernelfile=uImage\0"                                                   \
717 "loadaddr=0x01000000\0"                                                 \
718 "mbr=uCP1020.mbr\0"                                                     \
719 "mbr_offset=0x00000000\0"                                               \
720 "netdev=eth0\0"                                                         \
721 "nor_ubootaddr0=0xEC000000\0"                                           \
722 "nor_ubootaddr1=0xEFF80000\0"                                           \
723 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
724         "run norkernelload; "                                           \
725         "bootm $kerneladdr - $dtbaddr\0"                                \
726 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
727         "setenv cramfsaddr $part0base; "                                \
728         "cramfsload $dtbaddr $dtbfile; "                                \
729         "cramfsload $kerneladdr $kernelfile\0"                          \
730 "part0base=0xEC100000\0"                                                \
731 "part0size=0x00700000\0"                                                \
732 "part1base=0xEC800000\0"                                                \
733 "part1size=0x02000000\0"                                                \
734 "part2base=0xEE800000\0"                                                \
735 "part2size=0x00800000\0"                                                \
736 "part3base=0xEF000000\0"                                                \
737 "part3size=0x00F80000\0"                                                \
738 "partENVbase=0xEC080000\0"                                              \
739 "partENVsize=0x00080000\0"                                              \
740 "program0=tftp part0-000000.bin; "                                      \
741         "protect off $part0base +$filesize; "                           \
742         "erase $part0base +$filesize; "                                 \
743         "cp.b $loadaddr $part0base $filesize; "                         \
744         "echo Verifying...; "                                           \
745         "cmp.b $loadaddr $part0base $filesize\0"                        \
746 "program1=tftp part1-000000.bin; "                                      \
747         "protect off $part1base +$filesize; "                           \
748         "erase $part1base +$filesize; "                                 \
749         "cp.b $loadaddr $part1base $filesize; "                         \
750         "echo Verifying...; "                                           \
751         "cmp.b $loadaddr $part1base $filesize\0"                        \
752 "program2=tftp part2-000000.bin; "                                      \
753         "protect off $part2base +$filesize; "                           \
754         "erase $part2base +$filesize; "                                 \
755         "cp.b $loadaddr $part2base $filesize; "                         \
756         "echo Verifying...; "                                           \
757         "cmp.b $loadaddr $part2base $filesize\0"                        \
758 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
759         "  console=$consoledev,$baudrate $othbootargs; "                \
760         "tftp $rootfsaddr $rootfsfile; "                                \
761         "tftp $loadaddr $kernelfile; "                                  \
762         "tftp $dtbaddr $dtbfile; "                                      \
763         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
764 "ramdisk_size=120000\0"                                                 \
765 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
766 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
767         "mw.l 0xffe0f008 0x00400000\0"                                  \
768 "rootfsaddr=0x02F00000\0"                                               \
769 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
770 "rootpath=/opt/nfsroot\0"                                               \
771 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
772         "sf probe 0; sf erase 0 +$filesize; "                           \
773         "sf write $loadaddr 0 $filesize\0"                              \
774 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
775         "protect off 0xeC000000 +$filesize; "                           \
776         "erase 0xEC000000 +$filesize; "                                 \
777         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
778         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
779         "protect on 0xeC000000 +$filesize\0"                            \
780 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
781         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
782         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
783         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
784         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
785         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
786 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
787 "ubootfile=u-boot.bin\0"                                                \
788 "upgrade=run flashuboot\0"                                              \
789 "usb_phy_type=ulpi\0 "                                                  \
790 "boot_nfs= "                                                            \
791         "setenv bootargs root=/dev/nfs rw "                             \
792         "nfsroot=$serverip:$rootpath "                                  \
793         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
794         "console=$consoledev,$baudrate $othbootargs;"                   \
795         "tftp $loadaddr $bootfile;"                                     \
796         "tftp $fdtaddr $fdtfile;"                                       \
797         "bootm $loadaddr - $fdtaddr\0"                                  \
798 "boot_hd = "                                                            \
799         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
800         "console=$consoledev,$baudrate $othbootargs;"                   \
801         "usb start;"                                                    \
802         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
803         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
804         "bootm $loadaddr - $fdtaddr\0"                                  \
805 "boot_usb_fat = "                                                       \
806         "setenv bootargs root=/dev/ram rw "                             \
807         "console=$consoledev,$baudrate $othbootargs "                   \
808         "ramdisk_size=$ramdisk_size;"                                   \
809         "usb start;"                                                    \
810         "fatload usb 0:2 $loadaddr $bootfile;"                          \
811         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
812         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
813         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
814 "boot_usb_ext2 = "                                                      \
815         "setenv bootargs root=/dev/ram rw "                             \
816         "console=$consoledev,$baudrate $othbootargs "                   \
817         "ramdisk_size=$ramdisk_size;"                                   \
818         "usb start;"                                                    \
819         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
820         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
821         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
822         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
823 "boot_nor = "                                                           \
824         "setenv bootargs root=/dev/$jffs2nor rw "                       \
825         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
826         "bootm $norbootaddr - $norfdtaddr\0 "                           \
827 "boot_ram = "                                                           \
828         "setenv bootargs root=/dev/ram rw "                             \
829         "console=$consoledev,$baudrate $othbootargs "                   \
830         "ramdisk_size=$ramdisk_size;"                                   \
831         "tftp $ramdiskaddr $ramdiskfile;"                               \
832         "tftp $loadaddr $bootfile;"                                     \
833         "tftp $fdtaddr $fdtfile;"                                       \
834         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
835
836 #endif
837 #endif
838
839 #endif /* __CONFIG_H */