configs: Migrate CONFIG_SYS_TEXT_BASE
[oweals/u-boot.git] / include / configs / UCP1020.h
1 /*
2  * Copyright 2013-2015 Arcturus Networks, Inc.
3  *           http://www.arcturusnetworks.com/products/ucp1020/
4  * based on include/configs/p1_p2_rdb_pc.h
5  * original copyright follows:
6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 /*
12  * QorIQ uCP1020-xx boards configuration file
13  */
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16
17 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
18 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
19 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
20 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
21 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
22 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
23
24 #if defined(CONFIG_TARTGET_UCP1020T1)
25
26 #define CONFIG_UCP1020_REV_1_3
27
28 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
29
30 #define CONFIG_TSEC_ENET
31 #define CONFIG_TSEC1
32 #define CONFIG_TSEC3
33 #define CONFIG_HAS_ETH0
34 #define CONFIG_HAS_ETH1
35 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
36 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
37 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
38 #define CONFIG_IPADDR           10.80.41.229
39 #define CONFIG_SERVERIP         10.80.41.227
40 #define CONFIG_NETMASK          255.255.252.0
41 #define CONFIG_ETHPRIME         "eTSEC3"
42
43 #ifndef CONFIG_SPI_FLASH
44 #endif
45 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
46
47 #define CONFIG_SYS_L2_SIZE      (256 << 10)
48
49 #define CONFIG_LAST_STAGE_INIT
50
51 #endif
52
53 #if defined(CONFIG_TARGET_UCP1020)
54
55 #define CONFIG_UCP1020
56 #define CONFIG_UCP1020_REV_1_3
57
58 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
59
60 #define CONFIG_TSEC_ENET
61 #define CONFIG_TSEC1
62 #define CONFIG_TSEC2
63 #define CONFIG_TSEC3
64 #define CONFIG_HAS_ETH0
65 #define CONFIG_HAS_ETH1
66 #define CONFIG_HAS_ETH2
67 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
68 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
69 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
70 #define CONFIG_IPADDR           192.168.1.81
71 #define CONFIG_IPADDR1          192.168.1.82
72 #define CONFIG_IPADDR2          192.168.1.83
73 #define CONFIG_SERVERIP         192.168.1.80
74 #define CONFIG_GATEWAYIP        102.168.1.1
75 #define CONFIG_NETMASK          255.255.255.0
76 #define CONFIG_ETHPRIME         "eTSEC1"
77
78 #ifndef CONFIG_SPI_FLASH
79 #endif
80 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
81
82 #define CONFIG_SYS_L2_SIZE      (256 << 10)
83
84 #define CONFIG_LAST_STAGE_INIT
85
86 #endif
87
88 #ifdef CONFIG_SDCARD
89 #define CONFIG_RAMBOOT_SDCARD
90 #define CONFIG_SYS_RAMBOOT
91 #define CONFIG_SYS_EXTRA_ENV_RELOC
92 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
93 #endif
94
95 #ifdef CONFIG_SPIFLASH
96 #define CONFIG_RAMBOOT_SPIFLASH
97 #define CONFIG_SYS_RAMBOOT
98 #define CONFIG_SYS_EXTRA_ENV_RELOC
99 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
100 #endif
101
102 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
103
104 #ifndef CONFIG_RESET_VECTOR_ADDRESS
105 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
106 #endif
107
108 #ifndef CONFIG_SYS_MONITOR_BASE
109 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
110 #endif
111
112 #define CONFIG_MP
113
114 #define CONFIG_ENV_OVERWRITE
115
116 #define CONFIG_SYS_SATA_MAX_DEVICE      2
117 #define CONFIG_LBA48
118
119 #define CONFIG_SYS_CLK_FREQ     66666666
120 #define CONFIG_DDR_CLK_FREQ     66666666
121
122 #define CONFIG_HWCONFIG
123
124 /*
125  * These can be toggled for performance analysis, otherwise use default.
126  */
127 #define CONFIG_L2_CACHE
128 #define CONFIG_BTB
129
130 #define CONFIG_ENABLE_36BIT_PHYS
131
132 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
133 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
134
135 #define CONFIG_SYS_CCSRBAR              0xffe00000
136 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
137
138 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
139        SPL code*/
140 #ifdef CONFIG_SPL_BUILD
141 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
142 #endif
143
144 /* DDR Setup */
145 #define CONFIG_DDR_ECC_ENABLE
146 #ifndef CONFIG_DDR_ECC_ENABLE
147 #define CONFIG_SYS_DDR_RAW_TIMING
148 #define CONFIG_DDR_SPD
149 #endif
150 #define CONFIG_SYS_SPD_BUS_NUM 1
151 #undef CONFIG_FSL_DDR_INTERACTIVE
152
153 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
154 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
155 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
156 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
157 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
158
159 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
160
161 /* Default settings for DDR3 */
162 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
163 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
164 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
165 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
166 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
167 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
168
169 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
170 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
171 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
172 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
173
174 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
175 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
176 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
177 #define CONFIG_SYS_DDR_RCW_1            0x00000000
178 #define CONFIG_SYS_DDR_RCW_2            0x00000000
179 #ifdef CONFIG_DDR_ECC_ENABLE
180 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
181 #else
182 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
183 #endif
184 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
185 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
186 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
187
188 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
189 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
190 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
191 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
192 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
193 #define CONFIG_SYS_DDR_MODE_1           0x40461520
194 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
195 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
196
197 #undef CONFIG_CLOCKS_IN_MHZ
198
199 /*
200  * Memory map
201  *
202  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
203  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
204  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
205  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
206  *   (early boot only)
207  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
208  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
209  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
210  */
211
212 /*
213  * Local Bus Definitions
214  */
215 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
216 #define CONFIG_SYS_FLASH_BASE           0xec000000
217
218 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
219
220 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
221         | BR_PS_16 | BR_V)
222
223 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
224
225 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
226 #define CONFIG_SYS_FLASH_QUIET_TEST
227 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
228
229 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
230
231 #undef CONFIG_SYS_FLASH_CHECKSUM
232 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
233 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
234
235 #define CONFIG_FLASH_CFI_DRIVER
236 #define CONFIG_SYS_FLASH_CFI
237 #define CONFIG_SYS_FLASH_EMPTY_INFO
238 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
239
240 #define CONFIG_BOARD_EARLY_INIT_R       /* call board_early_init_r function */
241
242 #define CONFIG_SYS_INIT_RAM_LOCK
243 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
244 /* Initial L1 address */
245 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
246 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
247 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
248 /* Size of used area in RAM */
249 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
250
251 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
252                                         GENERATED_GBL_DATA_SIZE)
253 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
254
255 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
256 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
257
258 #define CONFIG_SYS_PMC_BASE     0xff980000
259 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
260 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
261                                         BR_PS_8 | BR_V)
262 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
263                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
264                                  OR_GPCM_EAD)
265
266 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
267 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
268 #ifdef CONFIG_NAND_FSL_ELBC
269 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
270 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
271 #endif
272
273 /* Serial Port - controlled on board with jumper J8
274  * open - index 2
275  * shorted - index 1
276  */
277 #define CONFIG_CONS_INDEX               1
278 #undef CONFIG_SERIAL_SOFTWARE_FIFO
279 #define CONFIG_SYS_NS16550_SERIAL
280 #define CONFIG_SYS_NS16550_REG_SIZE     1
281 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
282 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
283 #define CONFIG_NS16550_MIN_FUNCTIONS
284 #endif
285
286 #define CONFIG_SYS_BAUDRATE_TABLE       \
287         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
288
289 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
290 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
291
292 /* I2C */
293 #define CONFIG_SYS_I2C
294 #define CONFIG_SYS_I2C_FSL
295 #define CONFIG_SYS_FSL_I2C_SPEED        400000
296 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
297 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
298 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
299 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
300 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
301 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
302 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
303
304 #define CONFIG_RTC_DS1337
305 #define CONFIG_RTC_DS1337_NOOSC
306 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
307 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
308 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
309 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
310
311 /*
312  * eSPI - Enhanced SPI
313  */
314 #define CONFIG_HARD_SPI
315
316 #define CONFIG_SF_DEFAULT_SPEED         10000000
317 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
318
319 #if defined(CONFIG_PCI)
320 /*
321  * General PCI
322  * Memory space is mapped 1-1, but I/O space must start from 0.
323  */
324
325 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
326 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
327 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
328 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
329 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
330 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
331 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
332 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
333 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
334 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
335
336 /* controller 1, Slot 2, tgtid 1, Base address a000 */
337 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
338 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
339 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
340 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
341 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
342 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
343 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
344 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
345 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
346
347 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
348 #endif /* CONFIG_PCI */
349
350 /*
351  * Environment
352  */
353 #ifdef CONFIG_ENV_FIT_UCBOOT
354
355 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
356 #define CONFIG_ENV_SIZE         0x20000
357 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
358
359 #else
360
361 #define CONFIG_ENV_SPI_BUS      0
362 #define CONFIG_ENV_SPI_CS       0
363 #define CONFIG_ENV_SPI_MAX_HZ   10000000
364 #define CONFIG_ENV_SPI_MODE     0
365
366 #ifdef CONFIG_RAMBOOT_SPIFLASH
367
368 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
369 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
370 #define CONFIG_ENV_SECT_SIZE    0x1000
371
372 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
373 /* Address and size of Redundant Environment Sector     */
374 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
375 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
376 #endif
377
378 #elif defined(CONFIG_RAMBOOT_SDCARD)
379 #define CONFIG_FSL_FIXED_MMC_LOCATION
380 #define CONFIG_ENV_SIZE         0x2000
381 #define CONFIG_SYS_MMC_ENV_DEV  0
382
383 #elif defined(CONFIG_SYS_RAMBOOT)
384 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
385 #define CONFIG_ENV_SIZE         0x2000
386
387 #else
388 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
389 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
390 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
391 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
392 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
393 /* Address and size of Redundant Environment Sector     */
394 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
395 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
396 #endif
397
398 #endif
399
400 #endif  /* CONFIG_ENV_FIT_UCBOOT */
401
402 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
403 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
404
405 /*
406  * USB
407  */
408 #define CONFIG_HAS_FSL_DR_USB
409
410 #if defined(CONFIG_HAS_FSL_DR_USB)
411 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
412
413 #ifdef CONFIG_USB_EHCI_HCD
414 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
415 #define CONFIG_USB_EHCI_FSL
416 #endif
417 #endif
418
419 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
420
421 #ifdef CONFIG_MMC
422 #define CONFIG_FSL_ESDHC
423 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
424 #define CONFIG_MMC_SPI
425 #endif
426
427 /* Misc Extra Settings */
428 #undef CONFIG_WATCHDOG  /* watchdog disabled */
429
430 /*
431  * Miscellaneous configurable options
432  */
433 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
434 #define CONFIG_CMDLINE_EDITING                  /* Command-line editing */
435 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
436 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
437
438 /*
439  * For booting Linux, the board info and command line data
440  * have to be in the first 64 MB of memory, since this is
441  * the maximum mapped by the Linux kernel during initialization.
442  */
443 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
444 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
445
446 #if defined(CONFIG_CMD_KGDB)
447 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
448 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
449 #endif
450
451 /*
452  * Environment Configuration
453  */
454
455 #if defined(CONFIG_TSEC_ENET)
456
457 #if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
458 #else
459 #error "UCP1020 module revision is not defined !!!"
460 #endif
461
462 #define CONFIG_BOOTP_SERVERIP
463
464 #define CONFIG_MII              /* MII PHY management */
465 #define CONFIG_TSEC1_NAME       "eTSEC1"
466 #define CONFIG_TSEC2_NAME       "eTSEC2"
467 #define CONFIG_TSEC3_NAME       "eTSEC3"
468
469 #define TSEC1_PHY_ADDR  4
470 #define TSEC2_PHY_ADDR  0
471 #define TSEC2_PHY_ADDR_SGMII    0x00
472 #define TSEC3_PHY_ADDR  6
473
474 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
475 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
476 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
477
478 #define TSEC1_PHYIDX    0
479 #define TSEC2_PHYIDX    0
480 #define TSEC3_PHYIDX    0
481
482 #endif
483
484 #define CONFIG_HOSTNAME         UCP1020
485 #define CONFIG_ROOTPATH         "/opt/nfsroot"
486 #define CONFIG_BOOTFILE         "uImage"
487 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
488
489 /* default location for tftp and bootm */
490 #define CONFIG_LOADADDR         1000000
491
492 #if defined(CONFIG_DONGLE)
493
494 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
495 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
496 "bootfile=uImage\0"                                                     \
497 "consoledev=ttyS0\0"                                                    \
498 "cramfsfile=image.cramfs\0"                                             \
499 "dtbaddr=0x00c00000\0"                                                  \
500 "dtbfile=image.dtb\0"                                                   \
501 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
502 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
503 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
504 "fileaddr=0x01000000\0"                                                 \
505 "filesize=0x00080000\0"                                                 \
506 "flashmbr=sf probe 0; "                                                 \
507         "tftp $loadaddr $mbr; "                                         \
508         "sf erase $mbr_offset +$filesize; "                             \
509         "sf write $loadaddr $mbr_offset $filesize\0"                    \
510 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
511         "protect off $nor_recoveryaddr +$filesize; "                    \
512         "erase $nor_recoveryaddr +$filesize; "                          \
513         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
514         "protect on $nor_recoveryaddr +$filesize\0 "                    \
515 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
516         "protect off $nor_ubootaddr +$filesize; "                       \
517         "erase $nor_ubootaddr +$filesize; "                             \
518         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
519         "protect on $nor_ubootaddr +$filesize\0 "                       \
520 "flashworking=tftp $workingaddr $cramfsfile; "                          \
521         "protect off $nor_workingaddr +$filesize; "                     \
522         "erase $nor_workingaddr +$filesize; "                           \
523         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
524         "protect on $nor_workingaddr +$filesize\0 "                     \
525 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
526 "kerneladdr=0x01100000\0"                                               \
527 "kernelfile=uImage\0"                                                   \
528 "loadaddr=0x01000000\0"                                                 \
529 "mbr=uCP1020d.mbr\0"                                                    \
530 "mbr_offset=0x00000000\0"                                               \
531 "mmbr=uCP1020Quiet.mbr\0"                                               \
532 "mmcpart=0:2\0"                                                         \
533 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
534         "mmc erase 1 1; "                                               \
535         "mmc write $loadaddr 1 1\0"                                     \
536 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
537         "mmc erase 0x40 0x400; "                                        \
538         "mmc write $loadaddr 0x40 0x400\0"                              \
539 "netdev=eth0\0"                                                         \
540 "nor_recoveryaddr=0xEC0A0000\0"                                         \
541 "nor_ubootaddr=0xEFF80000\0"                                            \
542 "nor_workingaddr=0xECFA0000\0"                                          \
543 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
544         " console=$consoledev,$baudrate $othbootargs; "                 \
545         "run norloadrecovery; "                                         \
546         "bootm $kerneladdr - $dtbaddr\0"                                \
547 "norbootworking=setenv bootargs $workingbootargs"                       \
548         " console=$consoledev,$baudrate $othbootargs; "                 \
549         "run norloadworking; "                                          \
550         "bootm $kerneladdr - $dtbaddr\0"                                \
551 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
552         "setenv cramfsaddr $nor_recoveryaddr; "                         \
553         "cramfsload $dtbaddr $dtbfile; "                                \
554         "cramfsload $kerneladdr $kernelfile\0"                          \
555 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
556         "setenv cramfsaddr $nor_workingaddr; "                          \
557         "cramfsload $dtbaddr $dtbfile; "                                \
558         "cramfsload $kerneladdr $kernelfile\0"                          \
559 "prog_spi_mbr=run spi__mbr\0"                                           \
560 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
561 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
562         "run spi__cramfs\0"                                             \
563 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
564         " console=$consoledev,$baudrate $othbootargs; "                 \
565         "tftp $rootfsaddr $rootfsfile; "                                \
566         "tftp $loadaddr $kernelfile; "                                  \
567         "tftp $dtbaddr $dtbfile; "                                      \
568         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
569 "ramdisk_size=120000\0"                                                 \
570 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
571 "recoveryaddr=0x02F00000\0"                                             \
572 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
573 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
574         "mw.l 0xffe0f008 0x00400000\0"                                  \
575 "rootfsaddr=0x02F00000\0"                                               \
576 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
577 "rootpath=/opt/nfsroot\0"                                               \
578 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
579         "protect off 0xeC000000 +$filesize; "                           \
580         "erase 0xEC000000 +$filesize; "                                 \
581         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
582         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
583         "protect on 0xeC000000 +$filesize\0"                            \
584 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
585         "protect off 0xeFF80000 +$filesize; "                           \
586         "erase 0xEFF80000 +$filesize; "                                 \
587         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
588         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
589         "protect on 0xeFF80000 +$filesize\0"                            \
590 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
591         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
592         "sf write $loadaddr 0x8000 $filesize\0"                         \
593 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
594         "protect off 0xec0a0000 +$filesize; "                           \
595         "erase 0xeC0A0000 +$filesize; "                                 \
596         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
597         "protect on 0xec0a0000 +$filesize\0"                            \
598 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
599         "sf probe 1; sf erase 0 +$filesize; "                           \
600         "sf write $loadaddr 0 $filesize\0"                              \
601 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
602         "sf probe 0; sf erase 0 +$filesize; "                           \
603         "sf write $loadaddr 0 $filesize\0"                              \
604 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
605         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
606         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
607         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
608         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
609         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
610 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
611 "ubootaddr=0x01000000\0"                                                \
612 "ubootfile=u-boot.bin\0"                                                \
613 "ubootd=u-boot4dongle.bin\0"                                            \
614 "upgrade=run flashworking\0"                                            \
615 "usb_phy_type=ulpi\0 "                                                  \
616 "workingaddr=0x02F00000\0"                                              \
617 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
618
619 #else
620
621 #if defined(CONFIG_UCP1020T1)
622
623 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
624 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
625 "bootfile=uImage\0"                                                     \
626 "consoledev=ttyS0\0"                                                    \
627 "cramfsfile=image.cramfs\0"                                             \
628 "dtbaddr=0x00c00000\0"                                                  \
629 "dtbfile=image.dtb\0"                                                   \
630 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
631 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
632 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
633 "fileaddr=0x01000000\0"                                                 \
634 "filesize=0x00080000\0"                                                 \
635 "flashmbr=sf probe 0; "                                                 \
636         "tftp $loadaddr $mbr; "                                         \
637         "sf erase $mbr_offset +$filesize; "                             \
638         "sf write $loadaddr $mbr_offset $filesize\0"                    \
639 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
640         "protect off $nor_recoveryaddr +$filesize; "                    \
641         "erase $nor_recoveryaddr +$filesize; "                          \
642         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
643         "protect on $nor_recoveryaddr +$filesize\0 "                    \
644 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
645         "protect off $nor_ubootaddr +$filesize; "                       \
646         "erase $nor_ubootaddr +$filesize; "                             \
647         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
648         "protect on $nor_ubootaddr +$filesize\0 "                       \
649 "flashworking=tftp $workingaddr $cramfsfile; "                          \
650         "protect off $nor_workingaddr +$filesize; "                     \
651         "erase $nor_workingaddr +$filesize; "                           \
652         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
653         "protect on $nor_workingaddr +$filesize\0 "                     \
654 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
655 "kerneladdr=0x01100000\0"                                               \
656 "kernelfile=uImage\0"                                                   \
657 "loadaddr=0x01000000\0"                                                 \
658 "mbr=uCP1020.mbr\0"                                                     \
659 "mbr_offset=0x00000000\0"                                               \
660 "netdev=eth0\0"                                                         \
661 "nor_recoveryaddr=0xEC0A0000\0"                                         \
662 "nor_ubootaddr=0xEFF80000\0"                                            \
663 "nor_workingaddr=0xECFA0000\0"                                          \
664 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
665         " console=$consoledev,$baudrate $othbootargs; "                 \
666         "run norloadrecovery; "                                         \
667         "bootm $kerneladdr - $dtbaddr\0"                                \
668 "norbootworking=setenv bootargs $workingbootargs"                       \
669         " console=$consoledev,$baudrate $othbootargs; "                 \
670         "run norloadworking; "                                          \
671         "bootm $kerneladdr - $dtbaddr\0"                                \
672 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
673         "setenv cramfsaddr $nor_recoveryaddr; "                         \
674         "cramfsload $dtbaddr $dtbfile; "                                \
675         "cramfsload $kerneladdr $kernelfile\0"                          \
676 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
677         "setenv cramfsaddr $nor_workingaddr; "                          \
678         "cramfsload $dtbaddr $dtbfile; "                                \
679         "cramfsload $kerneladdr $kernelfile\0"                          \
680 "othbootargs=quiet\0"                                                   \
681 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
682         " console=$consoledev,$baudrate $othbootargs; "                 \
683         "tftp $rootfsaddr $rootfsfile; "                                \
684         "tftp $loadaddr $kernelfile; "                                  \
685         "tftp $dtbaddr $dtbfile; "                                      \
686         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
687 "ramdisk_size=120000\0"                                                 \
688 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
689 "recoveryaddr=0x02F00000\0"                                             \
690 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
691 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
692         "mw.l 0xffe0f008 0x00400000\0"                                  \
693 "rootfsaddr=0x02F00000\0"                                               \
694 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
695 "rootpath=/opt/nfsroot\0"                                               \
696 "silent=1\0"                                                            \
697 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
698         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
699         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
700         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
701         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
702         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
703 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
704 "ubootaddr=0x01000000\0"                                                \
705 "ubootfile=u-boot.bin\0"                                                \
706 "upgrade=run flashworking\0"                                            \
707 "workingaddr=0x02F00000\0"                                              \
708 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
709
710 #else /* For Arcturus Modules */
711
712 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
713 "bootcmd=run norkernel\0"                                               \
714 "bootfile=uImage\0"                                                     \
715 "consoledev=ttyS0\0"                                                    \
716 "dtbaddr=0x00c00000\0"                                                  \
717 "dtbfile=image.dtb\0"                                                   \
718 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
719 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
720 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
721 "fileaddr=0x01000000\0"                                                 \
722 "filesize=0x00080000\0"                                                 \
723 "flashmbr=sf probe 0; "                                                 \
724         "tftp $loadaddr $mbr; "                                         \
725         "sf erase $mbr_offset +$filesize; "                             \
726         "sf write $loadaddr $mbr_offset $filesize\0"                    \
727 "flashuboot=tftp $loadaddr $ubootfile; "                                \
728         "protect off $nor_ubootaddr0 +$filesize; "                      \
729         "erase $nor_ubootaddr0 +$filesize; "                            \
730         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
731         "protect on $nor_ubootaddr0 +$filesize; "                       \
732         "protect off $nor_ubootaddr1 +$filesize; "                      \
733         "erase $nor_ubootaddr1 +$filesize; "                            \
734         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
735         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
736 "format0=protect off $part0base +$part0size; "                          \
737         "erase $part0base +$part0size\0"                                \
738 "format1=protect off $part1base +$part1size; "                          \
739         "erase $part1base +$part1size\0"                                \
740 "format2=protect off $part2base +$part2size; "                          \
741         "erase $part2base +$part2size\0"                                \
742 "format3=protect off $part3base +$part3size; "                          \
743         "erase $part3base +$part3size\0"                                \
744 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
745 "kerneladdr=0x01100000\0"                                               \
746 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
747 "kernelfile=uImage\0"                                                   \
748 "loadaddr=0x01000000\0"                                                 \
749 "mbr=uCP1020.mbr\0"                                                     \
750 "mbr_offset=0x00000000\0"                                               \
751 "netdev=eth0\0"                                                         \
752 "nor_ubootaddr0=0xEC000000\0"                                           \
753 "nor_ubootaddr1=0xEFF80000\0"                                           \
754 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
755         "run norkernelload; "                                           \
756         "bootm $kerneladdr - $dtbaddr\0"                                \
757 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
758         "setenv cramfsaddr $part0base; "                                \
759         "cramfsload $dtbaddr $dtbfile; "                                \
760         "cramfsload $kerneladdr $kernelfile\0"                          \
761 "part0base=0xEC100000\0"                                                \
762 "part0size=0x00700000\0"                                                \
763 "part1base=0xEC800000\0"                                                \
764 "part1size=0x02000000\0"                                                \
765 "part2base=0xEE800000\0"                                                \
766 "part2size=0x00800000\0"                                                \
767 "part3base=0xEF000000\0"                                                \
768 "part3size=0x00F80000\0"                                                \
769 "partENVbase=0xEC080000\0"                                              \
770 "partENVsize=0x00080000\0"                                              \
771 "program0=tftp part0-000000.bin; "                                      \
772         "protect off $part0base +$filesize; "                           \
773         "erase $part0base +$filesize; "                                 \
774         "cp.b $loadaddr $part0base $filesize; "                         \
775         "echo Verifying...; "                                           \
776         "cmp.b $loadaddr $part0base $filesize\0"                        \
777 "program1=tftp part1-000000.bin; "                                      \
778         "protect off $part1base +$filesize; "                           \
779         "erase $part1base +$filesize; "                                 \
780         "cp.b $loadaddr $part1base $filesize; "                         \
781         "echo Verifying...; "                                           \
782         "cmp.b $loadaddr $part1base $filesize\0"                        \
783 "program2=tftp part2-000000.bin; "                                      \
784         "protect off $part2base +$filesize; "                           \
785         "erase $part2base +$filesize; "                                 \
786         "cp.b $loadaddr $part2base $filesize; "                         \
787         "echo Verifying...; "                                           \
788         "cmp.b $loadaddr $part2base $filesize\0"                        \
789 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
790         "  console=$consoledev,$baudrate $othbootargs; "                \
791         "tftp $rootfsaddr $rootfsfile; "                                \
792         "tftp $loadaddr $kernelfile; "                                  \
793         "tftp $dtbaddr $dtbfile; "                                      \
794         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
795 "ramdisk_size=120000\0"                                                 \
796 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
797 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
798         "mw.l 0xffe0f008 0x00400000\0"                                  \
799 "rootfsaddr=0x02F00000\0"                                               \
800 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
801 "rootpath=/opt/nfsroot\0"                                               \
802 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
803         "sf probe 0; sf erase 0 +$filesize; "                           \
804         "sf write $loadaddr 0 $filesize\0"                              \
805 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
806         "protect off 0xeC000000 +$filesize; "                           \
807         "erase 0xEC000000 +$filesize; "                                 \
808         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
809         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
810         "protect on 0xeC000000 +$filesize\0"                            \
811 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
812         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
813         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
814         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
815         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
816         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
817 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
818 "ubootfile=u-boot.bin\0"                                                \
819 "upgrade=run flashuboot\0"                                              \
820 "usb_phy_type=ulpi\0 "                                                  \
821 "boot_nfs= "                                                            \
822         "setenv bootargs root=/dev/nfs rw "                             \
823         "nfsroot=$serverip:$rootpath "                                  \
824         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
825         "console=$consoledev,$baudrate $othbootargs;"                   \
826         "tftp $loadaddr $bootfile;"                                     \
827         "tftp $fdtaddr $fdtfile;"                                       \
828         "bootm $loadaddr - $fdtaddr\0"                                  \
829 "boot_hd = "                                                            \
830         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
831         "console=$consoledev,$baudrate $othbootargs;"                   \
832         "usb start;"                                                    \
833         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
834         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
835         "bootm $loadaddr - $fdtaddr\0"                                  \
836 "boot_usb_fat = "                                                       \
837         "setenv bootargs root=/dev/ram rw "                             \
838         "console=$consoledev,$baudrate $othbootargs "                   \
839         "ramdisk_size=$ramdisk_size;"                                   \
840         "usb start;"                                                    \
841         "fatload usb 0:2 $loadaddr $bootfile;"                          \
842         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
843         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
844         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
845 "boot_usb_ext2 = "                                                      \
846         "setenv bootargs root=/dev/ram rw "                             \
847         "console=$consoledev,$baudrate $othbootargs "                   \
848         "ramdisk_size=$ramdisk_size;"                                   \
849         "usb start;"                                                    \
850         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
851         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
852         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
853         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
854 "boot_nor = "                                                           \
855         "setenv bootargs root=/dev/$jffs2nor rw "                       \
856         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
857         "bootm $norbootaddr - $norfdtaddr\0 "                           \
858 "boot_ram = "                                                           \
859         "setenv bootargs root=/dev/ram rw "                             \
860         "console=$consoledev,$baudrate $othbootargs "                   \
861         "ramdisk_size=$ramdisk_size;"                                   \
862         "tftp $ramdiskaddr $ramdiskfile;"                               \
863         "tftp $loadaddr $bootfile;"                                     \
864         "tftp $fdtaddr $fdtfile;"                                       \
865         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
866
867 #endif
868 #endif
869
870 #endif /* __CONFIG_H */