1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Helpers for ACPI table generation
5 * Based on acpi.c from coreboot
7 * Copyright 2019 Google LLC
9 * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
10 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
13 #ifndef __ACPI_TABLE_H__
14 #define __ACPI_TABLE_H__
16 #define RSDP_SIG "RSD PTR " /* RSDP pointer signature */
17 #define OEM_ID "U-BOOT" /* U-Boot */
18 #define OEM_TABLE_ID "U-BOOTBL" /* U-Boot Table */
19 #define ASLC_ID "INTL" /* Intel ASL Compiler */
21 #define ACPI_RSDP_REV_ACPI_1_0 0
22 #define ACPI_RSDP_REV_ACPI_2_0 2
25 * RSDP (Root System Description Pointer)
26 * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
29 char signature[8]; /* RSDP signature */
30 u8 checksum; /* Checksum of the first 20 bytes */
31 char oem_id[6]; /* OEM ID */
32 u8 revision; /* 0 for ACPI 1.0, others 2 */
33 u32 rsdt_address; /* Physical address of RSDT (32 bits) */
34 u32 length; /* Total RSDP length (incl. extended part) */
35 u64 xsdt_address; /* Physical address of XSDT (64 bits) */
36 u8 ext_checksum; /* Checksum of the whole table */
40 /* Generic ACPI header, provided by (almost) all tables */
41 struct __packed acpi_table_header {
42 char signature[4]; /* ACPI signature (4 ASCII characters) */
43 u32 length; /* Table length in bytes (incl. header) */
44 u8 revision; /* Table version (not ACPI version!) */
45 volatile u8 checksum; /* To make sum of entire table == 0 */
46 char oem_id[6]; /* OEM identification */
47 char oem_table_id[8]; /* OEM table identification */
48 u32 oem_revision; /* OEM revision number */
49 char aslc_id[4]; /* ASL compiler vendor ID */
50 u32 aslc_revision; /* ASL compiler revision number */
53 /* A maximum number of 32 ACPI tables ought to be enough for now */
54 #define MAX_ACPI_TABLES 32
56 /* RSDT (Root System Description Table) */
58 struct acpi_table_header header;
59 u32 entry[MAX_ACPI_TABLES];
62 /* XSDT (Extended System Description Table) */
64 struct acpi_table_header header;
65 u64 entry[MAX_ACPI_TABLES];
68 /* FADT Preferred Power Management Profile */
69 enum acpi_pm_profile {
70 ACPI_PM_UNSPECIFIED = 0,
74 ACPI_PM_ENTERPRISE_SERVER,
77 ACPI_PM_PERFORMANCE_SERVER,
81 /* FADT flags for p_lvl2_lat and p_lvl3_lat */
82 #define ACPI_FADT_C2_NOT_SUPPORTED 101
83 #define ACPI_FADT_C3_NOT_SUPPORTED 1001
85 /* FADT Boot Architecture Flags */
86 #define ACPI_FADT_LEGACY_FREE 0x00
87 #define ACPI_FADT_LEGACY_DEVICES BIT(0)
88 #define ACPI_FADT_8042 BIT(1)
89 #define ACPI_FADT_VGA_NOT_PRESENT BIT(2)
90 #define ACPI_FADT_MSI_NOT_SUPPORTED BIT(3)
91 #define ACPI_FADT_NO_PCIE_ASPM_CONTROL BIT(4)
93 /* FADT Feature Flags */
94 #define ACPI_FADT_WBINVD BIT(0)
95 #define ACPI_FADT_WBINVD_FLUSH BIT(1)
96 #define ACPI_FADT_C1_SUPPORTED BIT(2)
97 #define ACPI_FADT_C2_MP_SUPPORTED BIT(3)
98 #define ACPI_FADT_POWER_BUTTON BIT(4)
99 #define ACPI_FADT_SLEEP_BUTTON BIT(5)
100 #define ACPI_FADT_FIXED_RTC BIT(6)
101 #define ACPI_FADT_S4_RTC_WAKE BIT(7)
102 #define ACPI_FADT_32BIT_TIMER BIT(8)
103 #define ACPI_FADT_DOCKING_SUPPORTED BIT(9)
104 #define ACPI_FADT_RESET_REGISTER BIT(10)
105 #define ACPI_FADT_SEALED_CASE BIT(11)
106 #define ACPI_FADT_HEADLESS BIT(12)
107 #define ACPI_FADT_SLEEP_TYPE BIT(13)
108 #define ACPI_FADT_PCI_EXPRESS_WAKE BIT(14)
109 #define ACPI_FADT_PLATFORM_CLOCK BIT(15)
110 #define ACPI_FADT_S4_RTC_VALID BIT(16)
111 #define ACPI_FADT_REMOTE_POWER_ON BIT(17)
112 #define ACPI_FADT_APIC_CLUSTER BIT(18)
113 #define ACPI_FADT_APIC_PHYSICAL BIT(19)
114 #define ACPI_FADT_HW_REDUCED_ACPI BIT(20)
115 #define ACPI_FADT_LOW_PWR_IDLE_S0 BIT(21)
117 enum acpi_address_space_type {
118 ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memory */
119 ACPI_ADDRESS_SPACE_IO, /* System I/O */
120 ACPI_ADDRESS_SPACE_PCI, /* PCI config space */
121 ACPI_ADDRESS_SPACE_EC, /* Embedded controller */
122 ACPI_ADDRESS_SPACE_SMBUS, /* SMBus */
123 ACPI_ADDRESS_SPACE_PCC = 0x0a, /* Platform Comm. Channel */
124 ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */
127 enum acpi_address_space_size {
128 ACPI_ACCESS_SIZE_UNDEFINED = 0,
129 ACPI_ACCESS_SIZE_BYTE_ACCESS,
130 ACPI_ACCESS_SIZE_WORD_ACCESS,
131 ACPI_ACCESS_SIZE_DWORD_ACCESS,
132 ACPI_ACCESS_SIZE_QWORD_ACCESS
135 struct acpi_gen_regaddr {
136 u8 space_id; /* Address space ID */
137 u8 bit_width; /* Register size in bits */
138 u8 bit_offset; /* Register bit offset */
139 u8 access_size; /* Access size */
140 u32 addrl; /* Register address, low 32 bits */
141 u32 addrh; /* Register address, high 32 bits */
144 /* FADT (Fixed ACPI Description Table) */
145 struct __packed acpi_fadt {
146 struct acpi_table_header header;
150 u8 preferred_pm_profile;
185 struct acpi_gen_regaddr reset_reg;
189 u32 x_firmware_ctl_l;
190 u32 x_firmware_ctl_h;
193 struct acpi_gen_regaddr x_pm1a_evt_blk;
194 struct acpi_gen_regaddr x_pm1b_evt_blk;
195 struct acpi_gen_regaddr x_pm1a_cnt_blk;
196 struct acpi_gen_regaddr x_pm1b_cnt_blk;
197 struct acpi_gen_regaddr x_pm2_cnt_blk;
198 struct acpi_gen_regaddr x_pm_tmr_blk;
199 struct acpi_gen_regaddr x_gpe0_blk;
200 struct acpi_gen_regaddr x_gpe1_blk;
204 #define ACPI_FACS_S4BIOS_F BIT(0)
205 #define ACPI_FACS_64BIT_WAKE_F BIT(1)
207 /* FACS (Firmware ACPI Control Structure) */
209 char signature[4]; /* "FACS" */
210 u32 length; /* Length in bytes (>= 64) */
211 u32 hardware_signature; /* Hardware signature */
212 u32 firmware_waking_vector; /* Firmware waking vector */
213 u32 global_lock; /* Global lock */
214 u32 flags; /* FACS flags */
215 u32 x_firmware_waking_vector_l; /* X FW waking vector, low */
216 u32 x_firmware_waking_vector_h; /* X FW waking vector, high */
217 u8 version; /* Version 2 */
219 u32 ospm_flags; /* OSPM enabled flags */
224 #define ACPI_MADT_PCAT_COMPAT BIT(0)
226 /* MADT (Multiple APIC Description Table) */
228 struct acpi_table_header header;
229 u32 lapic_addr; /* Local APIC address */
230 u32 flags; /* Multiple APIC flags */
233 /* MADT: APIC Structure Type*/
234 enum acpi_apic_types {
235 ACPI_APIC_LAPIC = 0, /* Processor local APIC */
236 ACPI_APIC_IOAPIC, /* I/O APIC */
237 ACPI_APIC_IRQ_SRC_OVERRIDE, /* Interrupt source override */
238 ACPI_APIC_NMI_SRC, /* NMI source */
239 ACPI_APIC_LAPIC_NMI, /* Local APIC NMI */
240 ACPI_APIC_LAPIC_ADDR_OVERRIDE, /* Local APIC address override */
241 ACPI_APIC_IOSAPIC, /* I/O SAPIC */
242 ACPI_APIC_LSAPIC, /* Local SAPIC */
243 ACPI_APIC_PLATFORM_IRQ_SRC, /* Platform interrupt sources */
244 ACPI_APIC_LX2APIC, /* Processor local x2APIC */
245 ACPI_APIC_LX2APIC_NMI, /* Local x2APIC NMI */
248 /* MADT: Processor Local APIC Structure */
250 #define LOCAL_APIC_FLAG_ENABLED BIT(0)
252 struct acpi_madt_lapic {
253 u8 type; /* Type (0) */
254 u8 length; /* Length in bytes (8) */
255 u8 processor_id; /* ACPI processor ID */
256 u8 apic_id; /* Local APIC ID */
257 u32 flags; /* Local APIC flags */
260 /* MADT: I/O APIC Structure */
261 struct acpi_madt_ioapic {
262 u8 type; /* Type (1) */
263 u8 length; /* Length in bytes (12) */
264 u8 ioapic_id; /* I/O APIC ID */
266 u32 ioapic_addr; /* I/O APIC address */
267 u32 gsi_base; /* Global system interrupt base */
270 /* MADT: Interrupt Source Override Structure */
271 struct __packed acpi_madt_irqoverride {
272 u8 type; /* Type (2) */
273 u8 length; /* Length in bytes (10) */
274 u8 bus; /* ISA (0) */
275 u8 source; /* Bus-relative int. source (IRQ) */
276 u32 gsirq; /* Global system interrupt */
277 u16 flags; /* MPS INTI flags */
280 /* MADT: Local APIC NMI Structure */
281 struct __packed acpi_madt_lapic_nmi {
282 u8 type; /* Type (4) */
283 u8 length; /* Length in bytes (6) */
284 u8 processor_id; /* ACPI processor ID */
285 u16 flags; /* MPS INTI flags */
286 u8 lint; /* Local APIC LINT# */
289 /* MCFG (PCI Express MMIO config space BAR description table) */
291 struct acpi_table_header header;
295 struct acpi_mcfg_mmconfig {
298 u16 pci_segment_group_number;
304 /* PM1_CNT bit defines */
305 #define PM1_CNT_SCI_EN BIT(0)
307 /* ACPI global NVS structure */
308 struct acpi_global_nvs;
310 /* CSRT (Core System Resource Table) */
312 struct acpi_table_header header;
315 struct acpi_csrt_group {
323 u32 shared_info_length;
326 struct acpi_csrt_shared_info {
332 u8 interrupt_polarity;
335 u8 dma_address_width;
336 u16 base_request_line;
337 u16 num_handshake_signals;
341 /* DBG2 definitions are partially used for SPCR interface_type */
343 /* Types for port_type field */
345 #define ACPI_DBG2_SERIAL_PORT 0x8000
346 #define ACPI_DBG2_1394_PORT 0x8001
347 #define ACPI_DBG2_USB_PORT 0x8002
348 #define ACPI_DBG2_NET_PORT 0x8003
350 /* Subtypes for port_subtype field */
352 #define ACPI_DBG2_16550_COMPATIBLE 0x0000
353 #define ACPI_DBG2_16550_SUBSET 0x0001
354 #define ACPI_DBG2_ARM_PL011 0x0003
355 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
356 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
357 #define ACPI_DBG2_ARM_DCC 0x000F
358 #define ACPI_DBG2_BCM2835 0x0010
360 #define ACPI_DBG2_1394_STANDARD 0x0000
362 #define ACPI_DBG2_USB_XHCI 0x0000
363 #define ACPI_DBG2_USB_EHCI 0x0001
365 #define ACPI_DBG2_UNKNOWN 0x00FF
367 /* SPCR (Serial Port Console Redirection table) */
368 struct __packed acpi_spcr {
369 struct acpi_table_header header;
372 struct acpi_gen_regaddr serial_port;
375 u32 interrupt; /* Global system interrupt */
382 u16 pci_device_id; /* Must be 0xffff if not PCI device */
383 u16 pci_vendor_id; /* Must be 0xffff if not PCI device */
392 #include <asm/acpi_table.h>
394 #endif /* __ACPI_TABLE_H__ */