2 * watchdog.c - driver for i.mx on-chip watchdog
4 * Licensed under the GPL-2 or later.
12 #include <asm/arch/imx-regs.h>
13 #ifdef CONFIG_FSL_LSCH2
14 #include <asm/arch/immap_lsch2.h>
18 static void imx_watchdog_expire_now(struct watchdog_regs *wdog, bool ext_reset)
23 wcr |= WCR_SRS; /* do not assert internal reset */
25 wcr |= WCR_WDA; /* do not assert external reset */
27 /* Write 3 times to ensure it works, due to IMX6Q errata ERR004346 */
28 writew(wcr, &wdog->wcr);
29 writew(wcr, &wdog->wcr);
30 writew(wcr, &wdog->wcr);
39 #if !defined(CONFIG_IMX_WATCHDOG) || \
40 (defined(CONFIG_IMX_WATCHDOG) && !CONFIG_IS_ENABLED(WDT))
41 void __attribute__((weak)) reset_cpu(ulong addr)
43 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
45 imx_watchdog_expire_now(wdog, true);
49 #if defined(CONFIG_IMX_WATCHDOG)
50 static void imx_watchdog_reset(struct watchdog_regs *wdog)
52 #ifndef CONFIG_WATCHDOG_RESET_DISABLE
53 writew(0x5555, &wdog->wsr);
54 writew(0xaaaa, &wdog->wsr);
55 #endif /* CONFIG_WATCHDOG_RESET_DISABLE*/
58 static void imx_watchdog_init(struct watchdog_regs *wdog, bool ext_reset)
64 * The timer watchdog can be set between
65 * 0.5 and 128 Seconds. If not defined
66 * in configuration file, sets 128 Seconds
68 #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
69 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
71 timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
72 #ifdef CONFIG_FSL_LSCH2
73 wcr = (WCR_WDA | WCR_SRS | WCR_WDE) << 8 | timeout;
75 wcr = WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_SRS |
76 WCR_WDA | SET_WCR_WT(timeout);
79 #endif /* CONFIG_FSL_LSCH2*/
80 writew(wcr, &wdog->wcr);
81 imx_watchdog_reset(wdog);
84 #if !CONFIG_IS_ENABLED(WDT)
85 void hw_watchdog_reset(void)
87 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
89 imx_watchdog_reset(wdog);
92 void hw_watchdog_init(void)
94 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
96 imx_watchdog_init(wdog, true);
104 static int imx_wdt_reset(struct udevice *dev)
106 struct imx_wdt_priv *priv = dev_get_priv(dev);
108 imx_watchdog_reset(priv->base);
113 static int imx_wdt_expire_now(struct udevice *dev, ulong flags)
115 struct imx_wdt_priv *priv = dev_get_priv(dev);
117 imx_watchdog_expire_now(priv->base, priv->ext_reset);
123 static int imx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
125 struct imx_wdt_priv *priv = dev_get_priv(dev);
127 imx_watchdog_init(priv->base, priv->ext_reset);
132 static int imx_wdt_probe(struct udevice *dev)
134 struct imx_wdt_priv *priv = dev_get_priv(dev);
136 priv->base = dev_read_addr_ptr(dev);
140 priv->ext_reset = dev_read_bool(dev, "fsl,ext-reset-output");
145 static const struct wdt_ops imx_wdt_ops = {
146 .start = imx_wdt_start,
147 .reset = imx_wdt_reset,
148 .expire_now = imx_wdt_expire_now,
151 static const struct udevice_id imx_wdt_ids[] = {
152 { .compatible = "fsl,imx21-wdt" },
156 U_BOOT_DRIVER(imx_wdt) = {
159 .of_match = imx_wdt_ids,
160 .probe = imx_wdt_probe,
162 .priv_auto_alloc_size = sizeof(struct imx_wdt_priv),
163 .flags = DM_FLAG_PRE_RELOC,