1 // SPDX-License-Identifier: GPL-2.0
3 * Mediatek "glue layer"
5 * Copyright (C) 2019-2021 by Mediatek
6 * Based on the AllWinner SUNXI "glue layer" code.
7 * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
8 * Copyright (C) 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
10 * This file is part of the Inventra Controller Driver for Linux.
17 #include <linux/delay.h>
18 #include <linux/usb/musb.h>
20 #include "linux-compat.h"
21 #include "musb_core.h"
22 #include "musb_uboot.h"
24 #define DBG_I(fmt, ...) \
25 pr_info(fmt, ##__VA_ARGS__)
27 struct mtk_musb_config {
28 struct musb_hdrc_config *config;
31 struct mtk_musb_glue {
32 struct musb_host_data mdata;
36 struct mtk_musb_config *cfg;
40 #define to_mtk_musb_glue(d) container_of(d, struct mtk_musb_glue, dev)
42 /******************************************************************************
44 ******************************************************************************/
45 #define USB20_PHY_BASE 0x11110800
46 #define USBPHY_READ8(offset) \
47 readb((void *)(USB20_PHY_BASE + (offset)))
48 #define USBPHY_WRITE8(offset, value) \
49 writeb(value, (void *)(USB20_PHY_BASE + (offset)))
50 #define USBPHY_SET8(offset, mask) \
51 USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) | (mask))
52 #define USBPHY_CLR8(offset, mask) \
53 USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) & (~(mask)))
55 static void mt_usb_phy_poweron(void)
58 * switch to USB function.
59 * (system register, force ip into usb mode).
61 USBPHY_CLR8(0x6b, 0x04);
62 USBPHY_CLR8(0x6e, 0x01);
63 USBPHY_CLR8(0x21, 0x03);
65 /* RG_USB20_BC11_SW_EN = 1'b0 */
66 USBPHY_SET8(0x22, 0x04);
67 USBPHY_CLR8(0x1a, 0x80);
69 /* RG_USB20_DP_100K_EN = 1'b0 */
70 /* RG_USB20_DP_100K_EN = 1'b0 */
71 USBPHY_CLR8(0x22, 0x03);
74 USBPHY_SET8(0x20, 0x10);
75 /* release force suspendm */
76 USBPHY_CLR8(0x6a, 0x04);
80 /* force enter device mode */
81 USBPHY_CLR8(0x6c, 0x10);
82 USBPHY_SET8(0x6c, 0x2E);
83 USBPHY_SET8(0x6d, 0x3E);
86 static void mt_usb_phy_savecurrent(void)
89 * switch to USB function.
90 * (system register, force ip into usb mode).
92 USBPHY_CLR8(0x6b, 0x04);
93 USBPHY_CLR8(0x6e, 0x01);
94 USBPHY_CLR8(0x21, 0x03);
96 /* release force suspendm */
97 USBPHY_CLR8(0x6a, 0x04);
98 USBPHY_SET8(0x68, 0x04);
99 /* RG_DPPULLDOWN./RG_DMPULLDOWN. */
100 USBPHY_SET8(0x68, 0xc0);
101 /* RG_XCVRSEL[1:0] = 2'b01 */
102 USBPHY_CLR8(0x68, 0x30);
103 USBPHY_SET8(0x68, 0x10);
104 /* RG_TERMSEL = 1'b1 */
105 USBPHY_SET8(0x68, 0x04);
106 /* RG_DATAIN[3:0] = 4'b0000 */
107 USBPHY_CLR8(0x69, 0x3c);
110 * force_dp_pulldown, force_dm_pulldown,
111 * force_xcversel, force_termsel.
113 USBPHY_SET8(0x6a, 0xba);
115 /* RG_USB20_BC11_SW_EN = 1'b0 */
116 USBPHY_CLR8(0x1a, 0x80);
117 /* RG_USB20_OTG_VBUSSCMP_EN = 1'b0 */
118 USBPHY_CLR8(0x1a, 0x10);
122 USBPHY_CLR8(0x6a, 0x04);
123 /* rg_usb20_pll_stable = 1 */
124 //USBPHY_SET8(0x63, 0x02);
128 /* force suspendm = 1 */
129 //USBPHY_SET8(0x6a, 0x04);
132 static void mt_usb_phy_recover(void)
134 /* clean PUPD_BIST_EN */
135 /* PUPD_BIST_EN = 1'b0 */
136 /* PMIC will use it to detect charger type */
137 USBPHY_CLR8(0x1d, 0x10);
139 /* force_uart_en = 1'b0 */
140 USBPHY_CLR8(0x6b, 0x04);
141 /* RG_UART_EN = 1'b0 */
142 USBPHY_CLR8(0x6e, 0x01);
143 /* force_uart_en = 1'b0 */
144 USBPHY_CLR8(0x6a, 0x04);
146 USBPHY_CLR8(0x21, 0x03);
147 USBPHY_CLR8(0x68, 0xf4);
149 /* RG_DATAIN[3:0] = 4'b0000 */
150 USBPHY_CLR8(0x69, 0x3c);
152 USBPHY_CLR8(0x6a, 0xba);
154 /* RG_USB20_BC11_SW_EN = 1'b0 */
155 USBPHY_CLR8(0x1a, 0x80);
156 /* RG_USB20_OTG_VBUSSCMP_EN = 1'b1 */
157 USBPHY_SET8(0x1a, 0x10);
160 USBPHY_CLR8(0x18, 0x08);
161 USBPHY_SET8(0x18, 0x06);
164 /* force enter device mode */
165 //USBPHY_CLR8(0x6c, 0x10);
166 //USBPHY_SET8(0x6c, 0x2E);
167 //USBPHY_SET8(0x6d, 0x3E);
169 /* enable VRT internal R architecture */
170 /* RG_USB20_INTR_EN = 1'b1 */
171 USBPHY_SET8(0x00, 0x20);
174 /******************************************************************************
176 ******************************************************************************/
178 static irqreturn_t mtk_musb_interrupt(int irq, void *__hci)
180 struct musb *musb = __hci;
181 irqreturn_t retval = IRQ_NONE;
183 /* read and flush interrupts */
184 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
185 // last_int_usb = musb->int_usb;
187 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
188 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
190 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
191 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
193 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
195 if (musb->int_usb || musb->int_tx || musb->int_rx)
196 retval |= musb_interrupt(musb);
201 /* musb_core does not call enable / disable in a balanced manner <sigh> */
204 static int mtk_musb_enable(struct musb *musb)
206 struct mtk_musb_glue *glue = to_mtk_musb_glue(musb->controller);
208 DBG_I("%s():\n", __func__);
210 musb_ep_select(musb->mregs, 0);
211 musb_writeb(musb->mregs, MUSB_FADDR, 0);
216 mt_usb_phy_recover();
223 static void mtk_musb_disable(struct musb *musb)
225 struct mtk_musb_glue *glue = to_mtk_musb_glue(musb->controller);
228 DBG_I("%s():\n", __func__);
233 mt_usb_phy_savecurrent();
238 static int mtk_musb_init(struct musb *musb)
240 struct mtk_musb_glue *glue = to_mtk_musb_glue(musb->controller);
243 DBG_I("%s():\n", __func__);
245 ret = clk_enable(&glue->usbpllclk);
247 dev_err(dev, "failed to enable usbpll clock\n");
250 ret = clk_enable(&glue->usbmcuclk);
252 dev_err(dev, "failed to enable usbmcu clock\n");
255 ret = clk_enable(&glue->usbclk);
257 dev_err(dev, "failed to enable usb clock\n");
261 musb->isr = mtk_musb_interrupt;
266 static int mtk_musb_exit(struct musb *musb)
268 struct mtk_musb_glue *glue = to_mtk_musb_glue(musb->controller);
270 clk_disable(&glue->usbclk);
271 clk_disable(&glue->usbmcuclk);
272 clk_disable(&glue->usbpllclk);
277 static const struct musb_platform_ops mtk_musb_ops = {
278 .init = mtk_musb_init,
279 .exit = mtk_musb_exit,
280 .enable = mtk_musb_enable,
281 .disable = mtk_musb_disable,
284 /* MTK OTG supports up to 7 endpoints */
285 #define MTK_MUSB_MAX_EP_NUM 8
286 #define MTK_MUSB_RAM_BITS 16
288 static struct musb_fifo_cfg mtk_musb_mode_cfg[] = {
289 MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
290 MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
291 MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
292 MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
293 MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
294 MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
295 MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
296 MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
297 MUSB_EP_FIFO_SINGLE(5, FIFO_TX, 512),
298 MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512),
299 MUSB_EP_FIFO_SINGLE(6, FIFO_TX, 512),
300 MUSB_EP_FIFO_SINGLE(6, FIFO_RX, 512),
301 MUSB_EP_FIFO_SINGLE(7, FIFO_TX, 512),
302 MUSB_EP_FIFO_SINGLE(7, FIFO_RX, 512),
305 static struct musb_hdrc_config musb_config = {
306 .fifo_cfg = mtk_musb_mode_cfg,
307 .fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg),
310 .num_eps = MTK_MUSB_MAX_EP_NUM,
311 .ram_bits = MTK_MUSB_RAM_BITS,
314 static int musb_usb_probe(struct udevice *dev)
316 struct mtk_musb_glue *glue = dev_get_priv(dev);
317 struct musb_host_data *host = &glue->mdata;
318 struct musb_hdrc_platform_data pdata;
319 void *base = dev_read_addr_ptr(dev);
322 DBG_I("%s():\n", __func__);
324 #ifdef CONFIG_USB_MUSB_HOST
325 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
331 glue->cfg = (struct mtk_musb_config *)dev_get_driver_data(dev);
335 ret = clk_get_by_name(dev, "usbpll", &glue->usbpllclk);
337 dev_err(dev, "failed to get usbpll clock\n");
340 ret = clk_get_by_name(dev, "usbmcu", &glue->usbmcuclk);
342 dev_err(dev, "failed to get usbmcu clock\n");
345 ret = clk_get_by_name(dev, "usb", &glue->usbclk);
347 dev_err(dev, "failed to get usb clock\n");
351 memset(&pdata, 0, sizeof(pdata));
352 pdata.power = (u8)400;
353 pdata.platform_ops = &mtk_musb_ops;
354 pdata.config = glue->cfg->config;
356 #ifdef CONFIG_USB_MUSB_HOST
357 priv->desc_before_addr = true;
359 pdata.mode = MUSB_HOST;
360 host->host = musb_init_controller(&pdata, &glue->dev, base);
364 ret = musb_lowlevel_init(host);
366 printf("MTK MUSB OTG (Host)\n");
368 pdata.mode = MUSB_PERIPHERAL;
369 host->host = musb_register(&pdata, &glue->dev, base);
373 printf("MTK MUSB OTG (Peripheral)\n");
376 mt_usb_phy_poweron();
381 static int musb_usb_remove(struct udevice *dev)
383 struct mtk_musb_glue *glue = dev_get_priv(dev);
384 struct musb_host_data *host = &glue->mdata;
386 musb_stop(host->host);
393 static const struct mtk_musb_config mt8518_cfg = {
394 .config = &musb_config,
397 static const struct udevice_id mtk_musb_ids[] = {
398 { .compatible = "mediatek,mt8518-musb",
399 .data = (ulong)&mt8518_cfg },
403 U_BOOT_DRIVER(mtk_musb) = {
405 #ifdef CONFIG_USB_MUSB_HOST
408 .id = UCLASS_USB_GADGET_GENERIC,
410 .of_match = mtk_musb_ids,
411 .probe = musb_usb_probe,
412 .remove = musb_usb_remove,
413 #ifdef CONFIG_USB_MUSB_HOST
414 .ops = &musb_usb_ops,
416 .platdata_auto_alloc_size = sizeof(struct usb_platdata),
417 .priv_auto_alloc_size = sizeof(struct mtk_musb_glue),