drivers/usb/host/ohci-hcd.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   4  *
   5  * Interrupt support is added. Now, it has been tested
   6  * on ULI1575 chip and works well with USB keyboard.
   7  *
   8  * (C) Copyright 2007
   9  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
  10  *
  11  * (C) Copyright 2003
  12  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  13  *
  14  * Note: Much of this code has been derived from Linux 2.4
  15  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  16  * (C) Copyright 2000-2002 David Brownell
  17  *
  18  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  19  * ebenard@eukrea.com - based on s3c24x0's driver
  20  */
  21 /*
  22  * IMPORTANT NOTES
  23  * 1 - Read doc/README.generic_usb_ohci
  24  * 2 - this driver is intended for use with USB Mass Storage Devices
  25  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  26  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  27  *     to activate workaround for bug #41 or this driver will NOT work!
  28  */
  29
  30 #include <common.h>
  31 #include <cpu_func.h>
  32 #include <asm/byteorder.h>
  33 #include <dm.h>
  34 #include <errno.h>
  35 #include <asm/cache.h>
  36
  37 #if defined(CONFIG_PCI_OHCI)
  38 # include <pci.h>
  39 #if !defined(CONFIG_PCI_OHCI_DEVNO)
  40 #define CONFIG_PCI_OHCI_DEVNO   0
  41 #endif
  42 #endif
  43
  44 #include <malloc.h>
  45 #include <memalign.h>
  46 #include <usb.h>
  47
  48 #include "ohci.h"
  49
  50 #ifdef CONFIG_AT91RM9200
  51 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  52 #endif
  53
  54 #if defined(CONFIG_CPU_ARM920T) || \
  55         defined(CONFIG_PCI_OHCI) || \
  56         defined(CONFIG_DM_PCI) || \
  57         defined(CONFIG_SYS_OHCI_USE_NPS)
  58 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  59 #endif
  60
  61 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  62 #undef DEBUG
  63 #undef SHOW_INFO
  64 #undef OHCI_FILL_TRACE
  65
  66 /* For initializing controller (mask in an HCFS mode too) */
  67 #define OHCI_CONTROL_INIT \
  68         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  69
  70 #if !CONFIG_IS_ENABLED(DM_USB)
  71 #ifdef CONFIG_PCI_OHCI
  72 static struct pci_device_id ohci_pci_ids[] = {
  73         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  74         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
  75         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
  76         /* Please add supported PCI OHCI controller ids here */
  77         {0, 0}
  78 };
  79 #endif
  80 #endif
  81
  82 #ifdef CONFIG_PCI_EHCI_DEVNO
  83 static struct pci_device_id ehci_pci_ids[] = {
  84         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
  85         /* Please add supported PCI EHCI controller ids here */
  86         {0, 0}
  87 };
  88 #endif
  89
  90 #ifdef DEBUG
  91 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  92 #else
  93 #define dbg(format, arg...) do {} while (0)
  94 #endif /* DEBUG */
  95 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  96 #ifdef SHOW_INFO
  97 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  98 #else
  99 #define info(format, arg...) do {} while (0)
 100 #endif
 101
 102 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
 103 # define m16_swap(x) cpu_to_be16(x)
 104 # define m32_swap(x) cpu_to_be32(x)
 105 #else
 106 # define m16_swap(x) cpu_to_le16(x)
 107 # define m32_swap(x) cpu_to_le32(x)
 108 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 109
 110 /* We really should do proper cache flushing everywhere */
 111 #define flush_dcache_buffer(addr, size) \
 112         flush_dcache_range((unsigned long)(addr), \
 113                 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 114 #define invalidate_dcache_buffer(addr, size) \
 115         invalidate_dcache_range((unsigned long)(addr), \
 116                 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 117
 118 /* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
 119 #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
 120 #define flush_dcache_td(addr) flush_dcache_buffer(addr, 16)
 121 #define flush_dcache_iso_td(addr) flush_dcache_buffer(addr, 32)
 122 #define flush_dcache_hcca(addr) flush_dcache_buffer(addr, 256)
 123 #define invalidate_dcache_ed(addr) invalidate_dcache_buffer(addr, 16)
 124 #define invalidate_dcache_td(addr) invalidate_dcache_buffer(addr, 16)
 125 #define invalidate_dcache_iso_td(addr) invalidate_dcache_buffer(addr, 32)
 126 #define invalidate_dcache_hcca(addr) invalidate_dcache_buffer(addr, 256)
 127
 128 #if CONFIG_IS_ENABLED(DM_USB)
 129 /*
 130  * The various ohci_mdelay(1) calls in the code seem unnecessary. We keep
 131  * them around when building for older boards not yet converted to the dm
 132  * just in case (to avoid regressions), for dm this turns them into nops.
 133  */
 134 #define ohci_mdelay(x)
 135 #else
 136 #define ohci_mdelay(x) mdelay(x)
 137 #endif
 138
 139 #if !CONFIG_IS_ENABLED(DM_USB)
 140 /* global ohci_t */
 141 static ohci_t gohci;
 142 /* this must be aligned to a 256 byte boundary */
 143 struct ohci_hcca ghcca[1];
 144 #endif
 145
 146 /* mapping of the OHCI CC status to error codes */
 147 static int cc_to_error[16] = {
 148         /* No  Error  */               0,
 149         /* CRC Error  */               USB_ST_CRC_ERR,
 150         /* Bit Stuff  */               USB_ST_BIT_ERR,
 151         /* Data Togg  */               USB_ST_CRC_ERR,
 152         /* Stall      */               USB_ST_STALLED,
 153         /* DevNotResp */               -1,
 154         /* PIDCheck   */               USB_ST_BIT_ERR,
 155         /* UnExpPID   */               USB_ST_BIT_ERR,
 156         /* DataOver   */               USB_ST_BUF_ERR,
 157         /* DataUnder  */               USB_ST_BUF_ERR,
 158         /* reservd    */               -1,
 159         /* reservd    */               -1,
 160         /* BufferOver */               USB_ST_BUF_ERR,
 161         /* BuffUnder  */               USB_ST_BUF_ERR,
 162         /* Not Access */               -1,
 163         /* Not Access */               -1
 164 };
 165
 166 static const char *cc_to_string[16] = {
 167         "No Error",
 168         "CRC: Last data packet from endpoint contained a CRC error.",
 169         "BITSTUFFING: Last data packet from endpoint contained a bit " \
 170                      "stuffing violation",
 171         "DATATOGGLEMISMATCH: Last packet from endpoint had data toggle PID\n" \
 172                      "that did not match the expected value.",
 173         "STALL: TD was moved to the Done Queue because the endpoint returned" \
 174                      " a STALL PID",
 175         "DEVICENOTRESPONDING: Device did not respond to token (IN) or did\n" \
 176                      "not provide a handshake (OUT)",
 177         "PIDCHECKFAILURE: Check bits on PID from endpoint failed on data PID\n"\
 178                      "(IN) or handshake (OUT)",
 179         "UNEXPECTEDPID: Receive PID was not valid when encountered or PID\n" \
 180                      "value is not defined.",
 181         "DATAOVERRUN: The amount of data returned by the endpoint exceeded\n" \
 182                      "either the size of the maximum data packet allowed\n" \
 183                      "from the endpoint (found in MaximumPacketSize field\n" \
 184                      "of ED) or the remaining buffer size.",
 185         "DATAUNDERRUN: The endpoint returned less than MaximumPacketSize\n" \
 186                      "and that amount was not sufficient to fill the\n" \
 187                      "specified buffer",
 188         "reserved1",
 189         "reserved2",
 190         "BUFFEROVERRUN: During an IN, HC received data from endpoint faster\n" \
 191                      "than it could be written to system memory",
 192         "BUFFERUNDERRUN: During an OUT, HC could not retrieve data from\n" \
 193                      "system memory fast enough to keep up with data USB " \
 194                      "data rate.",
 195         "NOT ACCESSED: This code is set by software before the TD is placed" \
 196                      "on a list to be processed by the HC.(1)",
 197         "NOT ACCESSED: This code is set by software before the TD is placed" \
 198                      "on a list to be processed by the HC.(2)",
 199 };
 200
 201 static inline u32 roothub_a(struct ohci *hc)
 202         { return ohci_readl(&hc->regs->roothub.a); }
 203 static inline u32 roothub_b(struct ohci *hc)
 204         { return ohci_readl(&hc->regs->roothub.b); }
 205 static inline u32 roothub_status(struct ohci *hc)
 206         { return ohci_readl(&hc->regs->roothub.status); }
 207 static inline u32 roothub_portstatus(struct ohci *hc, int i)
 208         { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
 209
 210 /* forward declaration */
 211 static int hc_interrupt(ohci_t *ohci);
 212 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 213                           unsigned long pipe, void *buffer, int transfer_len,
 214                           struct devrequest *setup, urb_priv_t *urb,
 215                           int interval);
 216 static int ep_link(ohci_t * ohci, ed_t * ed);
 217 static int ep_unlink(ohci_t * ohci, ed_t * ed);
 218 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 219                        unsigned long pipe, int interval, int load);
 220
 221 /*-------------------------------------------------------------------------*/
 222
 223 /* TDs ... */
 224 static struct td *td_alloc(ohci_dev_t *ohci_dev, struct usb_device *usb_dev)
 225 {
 226         int i;
 227         struct td *td;
 228
 229         td = NULL;
 230         for (i = 0; i < NUM_TD; i++)
 231         {
 232                 if (ohci_dev->tds[i].usb_dev == NULL)
 233                 {
 234                         td = &ohci_dev->tds[i];
 235                         td->usb_dev = usb_dev;
 236                         break;
 237                 }
 238         }
 239
 240         return td;
 241 }
 242
 243 static inline void ed_free(struct ed *ed)
 244 {
 245         ed->usb_dev = NULL;
 246 }
 247
 248 /*-------------------------------------------------------------------------*
 249  * URB support functions
 250  *-------------------------------------------------------------------------*/
 251
 252 /* free HCD-private data associated with this URB */
 253
 254 static void urb_free_priv(urb_priv_t *urb)
 255 {
 256         int             i;
 257         int             last;
 258         struct td       *td;
 259
 260         last = urb->length - 1;
 261         if (last >= 0) {
 262                 for (i = 0; i <= last; i++) {
 263                         td = urb->td[i];
 264                         if (td) {
 265                                 td->usb_dev = NULL;
 266                                 urb->td[i] = NULL;
 267                         }
 268                 }
 269         }
 270         free(urb);
 271 }
 272
 273 /*-------------------------------------------------------------------------*/
 274
 275 #ifdef DEBUG
 276 static int sohci_get_current_frame_number(ohci_t *ohci);
 277
 278 /* debug| print the main components of an URB
 279  * small: 0) header + data packets 1) just header */
 280
 281 static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
 282                       unsigned long pipe, void *buffer, int transfer_len,
 283                       struct devrequest *setup, char *str, int small)
 284 {
 285         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
 286                         str,
 287                         sohci_get_current_frame_number(ohci),
 288                         usb_pipedevice(pipe),
 289                         usb_pipeendpoint(pipe),
 290                         usb_pipeout(pipe)? 'O': 'I',
 291                         usb_pipetype(pipe) < 2 ? \
 292                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
 293                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
 294                         (purb ? purb->actual_length : 0),
 295                         transfer_len, dev->status);
 296 #ifdef  OHCI_VERBOSE_DEBUG
 297         if (!small) {
 298                 int i, len;
 299
 300                 if (usb_pipecontrol(pipe)) {
 301                         printf(__FILE__ ": cmd(8):");
 302                         for (i = 0; i < 8 ; i++)
 303                                 printf(" %02x", ((__u8 *) setup) [i]);
 304                         printf("\n");
 305                 }
 306                 if (transfer_len > 0 && buffer) {
 307                         printf(__FILE__ ": data(%d/%d):",
 308                                 (purb ? purb->actual_length : 0),
 309                                 transfer_len);
 310                         len = usb_pipeout(pipe)? transfer_len:
 311                                         (purb ? purb->actual_length : 0);
 312                         for (i = 0; i < 16 && i < len; i++)
 313                                 printf(" %02x", ((__u8 *) buffer) [i]);
 314                         printf("%s\n", i < len? "...": "");
 315                 }
 316         }
 317 #endif
 318 }
 319
 320 /* just for debugging; prints non-empty branches of the int ed tree
 321  * inclusive iso eds */
 322 void ep_print_int_eds(ohci_t *ohci, char *str)
 323 {
 324         int i, j;
 325          __u32 *ed_p;
 326         for (i = 0; i < 32; i++) {
 327                 j = 5;
 328                 ed_p = &(ohci->hcca->int_table [i]);
 329                 if (*ed_p == 0)
 330                     continue;
 331                 invalidate_dcache_ed(ed_p);
 332                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 333                 while (*ed_p != 0 && j--) {
 334                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 335                         invalidate_dcache_ed(ed);
 336                         printf(" ed: %4x;", ed->hwINFO);
 337                         ed_p = &ed->hwNextED;
 338                 }
 339                 printf("\n");
 340         }
 341 }
 342
 343 static void ohci_dump_intr_mask(char *label, __u32 mask)
 344 {
 345         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 346                 label,
 347                 mask,
 348                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 349                 (mask & OHCI_INTR_OC) ? " OC" : "",
 350                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 351                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 352                 (mask & OHCI_INTR_UE) ? " UE" : "",
 353                 (mask & OHCI_INTR_RD) ? " RD" : "",
 354                 (mask & OHCI_INTR_SF) ? " SF" : "",
 355                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 356                 (mask & OHCI_INTR_SO) ? " SO" : ""
 357                 );
 358 }
 359
 360 static void maybe_print_eds(char *label, __u32 value)
 361 {
 362         ed_t *edp = (ed_t *)value;
 363
 364         if (value) {
 365                 dbg("%s %08x", label, value);
 366                 invalidate_dcache_ed(edp);
 367                 dbg("%08x", edp->hwINFO);
 368                 dbg("%08x", edp->hwTailP);
 369                 dbg("%08x", edp->hwHeadP);
 370                 dbg("%08x", edp->hwNextED);
 371         }
 372 }
 373
 374 static char *hcfs2string(int state)
 375 {
 376         switch (state) {
 377         case OHCI_USB_RESET:    return "reset";
 378         case OHCI_USB_RESUME:   return "resume";
 379         case OHCI_USB_OPER:     return "operational";
 380         case OHCI_USB_SUSPEND:  return "suspend";
 381         }
 382         return "?";
 383 }
 384
 385 /* dump control and status registers */
 386 static void ohci_dump_status(ohci_t *controller)
 387 {
 388         struct ohci_regs        *regs = controller->regs;
 389         __u32                   temp;
 390
 391         temp = ohci_readl(&regs->revision) & 0xff;
 392         if (temp != 0x10)
 393                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
 394
 395         temp = ohci_readl(&regs->control);
 396         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 397                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 398                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 399                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 400                 hcfs2string(temp & OHCI_CTRL_HCFS),
 401                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 402                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 403                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 404                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 405                 temp & OHCI_CTRL_CBSR
 406                 );
 407
 408         temp = ohci_readl(&regs->cmdstatus);
 409         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 410                 (temp & OHCI_SOC) >> 16,
 411                 (temp & OHCI_OCR) ? " OCR" : "",
 412                 (temp & OHCI_BLF) ? " BLF" : "",
 413                 (temp & OHCI_CLF) ? " CLF" : "",
 414                 (temp & OHCI_HCR) ? " HCR" : ""
 415                 );
 416
 417         ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
 418         ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
 419
 420         maybe_print_eds("ed_periodcurrent",
 421                         ohci_readl(&regs->ed_periodcurrent));
 422
 423         maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
 424         maybe_print_eds("ed_controlcurrent",
 425                         ohci_readl(&regs->ed_controlcurrent));
 426
 427         maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
 428         maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
 429
 430         maybe_print_eds("donehead", ohci_readl(&regs->donehead));
 431 }
 432
 433 static void ohci_dump_roothub(ohci_t *controller, int verbose)
 434 {
 435         __u32                   temp, ndp, i;
 436
 437         temp = roothub_a(controller);
 438         ndp = (temp & RH_A_NDP);
 439 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 440         ndp = (ndp == 2) ? 1:0;
 441 #endif
 442         if (verbose) {
 443                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 444                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 445                         (temp & RH_A_NOCP) ? " NOCP" : "",
 446                         (temp & RH_A_OCPM) ? " OCPM" : "",
 447                         (temp & RH_A_DT) ? " DT" : "",
 448                         (temp & RH_A_NPS) ? " NPS" : "",
 449                         (temp & RH_A_PSM) ? " PSM" : "",
 450                         ndp
 451                         );
 452                 temp = roothub_b(controller);
 453                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
 454                         temp,
 455                         (temp & RH_B_PPCM) >> 16,
 456                         (temp & RH_B_DR)
 457                         );
 458                 temp = roothub_status(controller);
 459                 dbg("roothub.status: %08x%s%s%s%s%s%s",
 460                         temp,
 461                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 462                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 463                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 464                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 465                         (temp & RH_HS_OCI) ? " OCI" : "",
 466                         (temp & RH_HS_LPS) ? " LPS" : ""
 467                         );
 468         }
 469
 470         for (i = 0; i < ndp; i++) {
 471                 temp = roothub_portstatus(controller, i);
 472                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 473                         i,
 474                         temp,
 475                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 476                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 477                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 478                         (temp & RH_PS_PESC) ? " PESC" : "",
 479                         (temp & RH_PS_CSC) ? " CSC" : "",
 480
 481                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 482                         (temp & RH_PS_PPS) ? " PPS" : "",
 483                         (temp & RH_PS_PRS) ? " PRS" : "",
 484                         (temp & RH_PS_POCI) ? " POCI" : "",
 485                         (temp & RH_PS_PSS) ? " PSS" : "",
 486
 487                         (temp & RH_PS_PES) ? " PES" : "",
 488                         (temp & RH_PS_CCS) ? " CCS" : ""
 489                         );
 490         }
 491 }
 492
 493 static void ohci_dump(ohci_t *controller, int verbose)
 494 {
 495         dbg("OHCI controller usb-%s state", controller->slot_name);
 496
 497         /* dumps some of the state we know about */
 498         ohci_dump_status(controller);
 499         if (verbose)
 500                 ep_print_int_eds(controller, "hcca");
 501         invalidate_dcache_hcca(controller->hcca);
 502         dbg("hcca frame #%04x", controller->hcca->frame_no);
 503         ohci_dump_roothub(controller, 1);
 504 }
 505 #endif /* DEBUG */
 506
 507 /*-------------------------------------------------------------------------*
 508  * Interface functions (URB)
 509  *-------------------------------------------------------------------------*/
 510
 511 /* get a transfer request */
 512
 513 int sohci_submit_job(ohci_t *ohci, ohci_dev_t *ohci_dev, urb_priv_t *urb,
 514                      struct devrequest *setup)
 515 {
 516         ed_t *ed;
 517         urb_priv_t *purb_priv = urb;
 518         int i, size = 0;
 519         struct usb_device *dev = urb->dev;
 520         unsigned long pipe = urb->pipe;
 521         void *buffer = urb->transfer_buffer;
 522         int transfer_len = urb->transfer_buffer_length;
 523         int interval = urb->interval;
 524
 525         /* when controller's hung, permit only roothub cleanup attempts
 526          * such as powering down ports */
 527         if (ohci->disabled) {
 528                 err("sohci_submit_job: EPIPE");
 529                 return -1;
 530         }
 531
 532         /* we're about to begin a new transaction here so mark the
 533          * URB unfinished */
 534         urb->finished = 0;
 535
 536         /* every endpoint has a ed, locate and fill it */
 537         ed = ep_add_ed(ohci_dev, dev, pipe, interval, 1);
 538         if (!ed) {
 539                 err("sohci_submit_job: ENOMEM");
 540                 return -1;
 541         }
 542
 543         /* for the private part of the URB we need the number of TDs (size) */
 544         switch (usb_pipetype(pipe)) {
 545         case PIPE_BULK: /* one TD for every 4096 Byte */
 546                 size = (transfer_len - 1) / 4096 + 1;
 547                 break;
 548         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 549                 size = (transfer_len == 0)? 2:
 550                                         (transfer_len - 1) / 4096 + 3;
 551                 break;
 552         case PIPE_INTERRUPT: /* 1 TD */
 553                 size = 1;
 554                 break;
 555         }
 556
 557         ed->purb = urb;
 558
 559         if (size >= (N_URB_TD - 1)) {
 560                 err("need %d TDs, only have %d", size, N_URB_TD);
 561                 return -1;
 562         }
 563         purb_priv->pipe = pipe;
 564
 565         /* fill the private part of the URB */
 566         purb_priv->length = size;
 567         purb_priv->ed = ed;
 568         purb_priv->actual_length = 0;
 569
 570         /* allocate the TDs */
 571         /* note that td[0] was allocated in ep_add_ed */
 572         for (i = 0; i < size; i++) {
 573                 purb_priv->td[i] = td_alloc(ohci_dev, dev);
 574                 if (!purb_priv->td[i]) {
 575                         purb_priv->length = i;
 576                         urb_free_priv(purb_priv);
 577                         err("sohci_submit_job: ENOMEM");
 578                         return -1;
 579                 }
 580         }
 581
 582         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 583                 urb_free_priv(purb_priv);
 584                 err("sohci_submit_job: EINVAL");
 585                 return -1;
 586         }
 587
 588         /* link the ed into a chain if is not already */
 589         if (ed->state != ED_OPER)
 590                 ep_link(ohci, ed);
 591
 592         /* fill the TDs and link it to the ed */
 593         td_submit_job(ohci, dev, pipe, buffer, transfer_len,
 594                       setup, purb_priv, interval);
 595
 596         return 0;
 597 }
 598
 599 /*-------------------------------------------------------------------------*/
 600
 601 #ifdef DEBUG
 602 /* tell us the current USB frame number */
 603 static int sohci_get_current_frame_number(ohci_t *ohci)
 604 {
 605         invalidate_dcache_hcca(ohci->hcca);
 606         return m16_swap(ohci->hcca->frame_no);
 607 }
 608 #endif
 609
 610 /*-------------------------------------------------------------------------*
 611  * ED handling functions
 612  *-------------------------------------------------------------------------*/
 613
 614 /* search for the right branch to insert an interrupt ed into the int tree
 615  * do some load ballancing;
 616  * returns the branch and
 617  * sets the interval to interval = 2^integer (ld (interval)) */
 618
 619 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
 620 {
 621         int i, branch = 0;
 622
 623         /* search for the least loaded interrupt endpoint
 624          * branch of all 32 branches
 625          */
 626         for (i = 0; i < 32; i++)
 627                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 628                         branch = i;
 629
 630         branch = branch % interval;
 631         for (i = branch; i < 32; i += interval)
 632                 ohci->ohci_int_load [i] += load;
 633
 634         return branch;
 635 }
 636
 637 /*-------------------------------------------------------------------------*/
 638
 639 /*  2^int( ld (inter)) */
 640
 641 static int ep_2_n_interval(int inter)
 642 {
 643         int i;
 644         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
 645         return 1 << i;
 646 }
 647
 648 /*-------------------------------------------------------------------------*/
 649
 650 /* the int tree is a binary tree
 651  * in order to process it sequentially the indexes of the branches have to
 652  * be mapped the mapping reverses the bits of a word of num_bits length */
 653 static int ep_rev(int num_bits, int word)
 654 {
 655         int i, wout = 0;
 656
 657         for (i = 0; i < num_bits; i++)
 658                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 659         return wout;
 660 }
 661
 662 /*-------------------------------------------------------------------------*
 663  * ED handling functions
 664  *-------------------------------------------------------------------------*/
 665
 666 /* link an ed into one of the HC chains */
 667
 668 static int ep_link(ohci_t *ohci, ed_t *edi)
 669 {
 670         volatile ed_t *ed = edi;
 671         int int_branch;
 672         int i;
 673         int inter;
 674         int interval;
 675         int load;
 676         __u32 *ed_p;
 677
 678         ed->state = ED_OPER;
 679         ed->int_interval = 0;
 680
 681         switch (ed->type) {
 682         case PIPE_CONTROL:
 683                 ed->hwNextED = 0;
 684                 flush_dcache_ed(ed);
 685                 if (ohci->ed_controltail == NULL)
 686                         ohci_writel((uintptr_t)ed, &ohci->regs->ed_controlhead);
 687                 else
 688                         ohci->ed_controltail->hwNextED =
 689                                                    m32_swap((unsigned long)ed);
 690
 691                 ed->ed_prev = ohci->ed_controltail;
 692                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 693                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 694                         ohci->hc_control |= OHCI_CTRL_CLE;
 695                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 696                 }
 697                 ohci->ed_controltail = edi;
 698                 break;
 699
 700         case PIPE_BULK:
 701                 ed->hwNextED = 0;
 702                 flush_dcache_ed(ed);
 703                 if (ohci->ed_bulktail == NULL)
 704                         ohci_writel((uintptr_t)ed, &ohci->regs->ed_bulkhead);
 705                 else
 706                         ohci->ed_bulktail->hwNextED =
 707                                                    m32_swap((unsigned long)ed);
 708
 709                 ed->ed_prev = ohci->ed_bulktail;
 710                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 711                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 712                         ohci->hc_control |= OHCI_CTRL_BLE;
 713                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 714                 }
 715                 ohci->ed_bulktail = edi;
 716                 break;
 717
 718         case PIPE_INTERRUPT:
 719                 load = ed->int_load;
 720                 interval = ep_2_n_interval(ed->int_period);
 721                 ed->int_interval = interval;
 722                 int_branch = ep_int_ballance(ohci, interval, load);
 723                 ed->int_branch = int_branch;
 724
 725                 for (i = 0; i < ep_rev(6, interval); i += inter) {
 726                         inter = 1;
 727                         for (ed_p = &(ohci->hcca->int_table[\
 728                                                 ep_rev(5, i) + int_branch]);
 729                                 (*ed_p != 0) &&
 730                                 (((ed_t *)ed_p)->int_interval >= interval);
 731                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 732                                         inter = ep_rev(6,
 733                                                  ((ed_t *)ed_p)->int_interval);
 734                         ed->hwNextED = *ed_p;
 735                         flush_dcache_ed(ed);
 736                         *ed_p = m32_swap((unsigned long)ed);
 737                         flush_dcache_hcca(ohci->hcca);
 738                 }
 739                 break;
 740         }
 741         return 0;
 742 }
 743
 744 /*-------------------------------------------------------------------------*/
 745
 746 /* scan the periodic table to find and unlink this ED */
 747 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 748                             unsigned index, unsigned period)
 749 {
 750         __maybe_unused unsigned long aligned_ed_p;
 751
 752         for (; index < NUM_INTS; index += period) {
 753                 __u32   *ed_p = &ohci->hcca->int_table [index];
 754
 755                 /* ED might have been unlinked through another path */
 756                 while (*ed_p != 0) {
 757                         if (((struct ed *)(uintptr_t)
 758                                         m32_swap((unsigned long)ed_p)) == ed) {
 759                                 *ed_p = ed->hwNextED;
 760                                 aligned_ed_p = (unsigned long)ed_p;
 761                                 aligned_ed_p &= ~(ARCH_DMA_MINALIGN - 1);
 762                                 flush_dcache_range(aligned_ed_p,
 763                                         aligned_ed_p + ARCH_DMA_MINALIGN);
 764                                 break;
 765                         }
 766                         ed_p = &(((struct ed *)(uintptr_t)
 767                                      m32_swap((unsigned long)ed_p))->hwNextED);
 768                 }
 769         }
 770 }
 771
 772 /* unlink an ed from one of the HC chains.
 773  * just the link to the ed is unlinked.
 774  * the link from the ed still points to another operational ed or 0
 775  * so the HC can eventually finish the processing of the unlinked ed */
 776
 777 static int ep_unlink(ohci_t *ohci, ed_t *edi)
 778 {
 779         volatile ed_t *ed = edi;
 780         int i;
 781
 782         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
 783         flush_dcache_ed(ed);
 784
 785         switch (ed->type) {
 786         case PIPE_CONTROL:
 787                 if (ed->ed_prev == NULL) {
 788                         if (!ed->hwNextED) {
 789                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 790                                 ohci_writel(ohci->hc_control,
 791                                             &ohci->regs->control);
 792                         }
 793                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 794                                 &ohci->regs->ed_controlhead);
 795                 } else {
 796                         ed->ed_prev->hwNextED = ed->hwNextED;
 797                         flush_dcache_ed(ed->ed_prev);
 798                 }
 799                 if (ohci->ed_controltail == ed) {
 800                         ohci->ed_controltail = ed->ed_prev;
 801                 } else {
 802                         ((ed_t *)(uintptr_t)m32_swap(
 803                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 804                 }
 805                 break;
 806
 807         case PIPE_BULK:
 808                 if (ed->ed_prev == NULL) {
 809                         if (!ed->hwNextED) {
 810                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 811                                 ohci_writel(ohci->hc_control,
 812                                             &ohci->regs->control);
 813                         }
 814                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 815                                &ohci->regs->ed_bulkhead);
 816                 } else {
 817                         ed->ed_prev->hwNextED = ed->hwNextED;
 818                         flush_dcache_ed(ed->ed_prev);
 819                 }
 820                 if (ohci->ed_bulktail == ed) {
 821                         ohci->ed_bulktail = ed->ed_prev;
 822                 } else {
 823                         ((ed_t *)(uintptr_t)m32_swap(
 824                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 825                 }
 826                 break;
 827
 828         case PIPE_INTERRUPT:
 829                 periodic_unlink(ohci, ed, 0, 1);
 830                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 831                     ohci->ohci_int_load[i] -= ed->int_load;
 832                 break;
 833         }
 834         ed->state = ED_UNLINK;
 835         return 0;
 836 }
 837
 838 /*-------------------------------------------------------------------------*/
 839
 840 /* add/reinit an endpoint; this should be done once at the
 841  * usb_set_configuration command, but the USB stack is a little bit
 842  * stateless so we do it at every transaction if the state of the ed
 843  * is ED_NEW then a dummy td is added and the state is changed to
 844  * ED_UNLINK in all other cases the state is left unchanged the ed
 845  * info fields are setted anyway even though most of them should not
 846  * change
 847  */
 848 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 849                        unsigned long pipe, int interval, int load)
 850 {
 851         td_t *td;
 852         ed_t *ed_ret;
 853         volatile ed_t *ed;
 854
 855         ed = ed_ret = &ohci_dev->ed[(usb_pipeendpoint(pipe) << 1) |
 856                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
 857
 858         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 859                 err("ep_add_ed: pending delete");
 860                 /* pending delete request */
 861                 return NULL;
 862         }
 863
 864         if (ed->state == ED_NEW) {
 865                 /* dummy td; end of td list for ed */
 866                 td = td_alloc(ohci_dev, usb_dev);
 867                 ed->hwTailP = m32_swap((unsigned long)td);
 868                 ed->hwHeadP = ed->hwTailP;
 869                 ed->state = ED_UNLINK;
 870                 ed->type = usb_pipetype(pipe);
 871                 ohci_dev->ed_cnt++;
 872         }
 873
 874         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
 875                         | usb_pipeendpoint(pipe) << 7
 876                         | (usb_pipeisoc(pipe)? 0x8000: 0)
 877                         | (usb_pipecontrol(pipe)? 0: \
 878                                            (usb_pipeout(pipe)? 0x800: 0x1000))
 879                         | (usb_dev->speed == USB_SPEED_LOW) << 13
 880                         | usb_maxpacket(usb_dev, pipe) << 16);
 881
 882         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 883                 ed->int_period = interval;
 884                 ed->int_load = load;
 885         }
 886
 887         flush_dcache_ed(ed);
 888
 889         return ed_ret;
 890 }
 891
 892 /*-------------------------------------------------------------------------*
 893  * TD handling functions
 894  *-------------------------------------------------------------------------*/
 895
 896 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 897
 898 static void td_fill(ohci_t *ohci, unsigned int info,
 899         void *data, int len,
 900         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 901 {
 902         volatile td_t  *td, *td_pt;
 903 #ifdef OHCI_FILL_TRACE
 904         int i;
 905 #endif
 906
 907         if (index > urb_priv->length) {
 908                 err("index > length");
 909                 return;
 910         }
 911         /* use this td as the next dummy */
 912         td_pt = urb_priv->td [index];
 913         td_pt->hwNextTD = 0;
 914         flush_dcache_td(td_pt);
 915
 916         /* fill the old dummy TD */
 917         td = urb_priv->td [index] =
 918                              (td_t *)(uintptr_t)
 919                              (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
 920
 921         td->ed = urb_priv->ed;
 922         td->next_dl_td = NULL;
 923         td->index = index;
 924         td->data = (uintptr_t)data;
 925 #ifdef OHCI_FILL_TRACE
 926         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
 927                 for (i = 0; i < len; i++)
 928                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
 929                 printf("\n");
 930         }
 931 #endif
 932         if (!len)
 933                 data = 0;
 934
 935         td->hwINFO = m32_swap(info);
 936         td->hwCBP = m32_swap((unsigned long)data);
 937         if (data)
 938                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
 939         else
 940                 td->hwBE = 0;
 941
 942         td->hwNextTD = m32_swap((unsigned long)td_pt);
 943         flush_dcache_td(td);
 944
 945         /* append to queue */
 946         td->ed->hwTailP = td->hwNextTD;
 947         flush_dcache_ed(td->ed);
 948 }
 949
 950 /*-------------------------------------------------------------------------*/
 951
 952 /* prepare all TDs of a transfer */
 953
 954 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 955                           unsigned long pipe, void *buffer, int transfer_len,
 956                           struct devrequest *setup, urb_priv_t *urb,
 957                           int interval)
 958 {
 959         int data_len = transfer_len;
 960         void *data;
 961         int cnt = 0;
 962         __u32 info = 0;
 963         unsigned int toggle = 0;
 964
 965         flush_dcache_buffer(buffer, data_len);
 966
 967         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
 968          * bits for resetting */
 969         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 970                 toggle = TD_T_TOGGLE;
 971         } else {
 972                 toggle = TD_T_DATA0;
 973                 usb_settoggle(dev, usb_pipeendpoint(pipe),
 974                                 usb_pipeout(pipe), 1);
 975         }
 976         urb->td_cnt = 0;
 977         if (data_len)
 978                 data = buffer;
 979         else
 980                 data = 0;
 981
 982         switch (usb_pipetype(pipe)) {
 983         case PIPE_BULK:
 984                 info = usb_pipeout(pipe)?
 985                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 986                 while (data_len > 4096) {
 987                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
 988                                 data, 4096, dev, cnt, urb);
 989                         data += 4096; data_len -= 4096; cnt++;
 990                 }
 991                 info = usb_pipeout(pipe)?
 992                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 993                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
 994                         data_len, dev, cnt, urb);
 995                 cnt++;
 996
 997                 if (!ohci->sleeping) {
 998                         /* start bulk list */
 999                         ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
1000                 }
1001                 break;
1002
1003         case PIPE_CONTROL:
1004                 /* Setup phase */
1005                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
1006                 flush_dcache_buffer(setup, 8);
1007                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
1008
1009                 /* Optional Data phase */
1010                 if (data_len > 0) {
1011                         info = usb_pipeout(pipe)?
1012                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
1013                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
1014                         /* NOTE:  mishandles transfers >8K, some >4K */
1015                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1016                 }
1017
1018                 /* Status phase */
1019                 info = (usb_pipeout(pipe) || data_len == 0) ?
1020                         TD_CC | TD_DP_IN | TD_T_DATA1:
1021                         TD_CC | TD_DP_OUT | TD_T_DATA1;
1022                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
1023
1024                 if (!ohci->sleeping) {
1025                         /* start Control list */
1026                         ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
1027                 }
1028                 break;
1029
1030         case PIPE_INTERRUPT:
1031                 info = usb_pipeout(urb->pipe)?
1032                         TD_CC | TD_DP_OUT | toggle:
1033                         TD_CC | TD_R | TD_DP_IN | toggle;
1034                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1035                 break;
1036         }
1037         if (urb->length != cnt)
1038                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
1039 }
1040
1041 /*-------------------------------------------------------------------------*
1042  * Done List handling functions
1043  *-------------------------------------------------------------------------*/
1044
1045 /* calculate the transfer length and update the urb */
1046
1047 static void dl_transfer_length(td_t *td)
1048 {
1049         __u32 tdBE, tdCBP;
1050         urb_priv_t *lurb_priv = td->ed->purb;
1051
1052         tdBE   = m32_swap(td->hwBE);
1053         tdCBP  = m32_swap(td->hwCBP);
1054
1055         if (!(usb_pipecontrol(lurb_priv->pipe) &&
1056             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
1057                 if (tdBE != 0) {
1058                         if (td->hwCBP == 0)
1059                                 lurb_priv->actual_length += tdBE - td->data + 1;
1060                         else
1061                                 lurb_priv->actual_length += tdCBP - td->data;
1062                 }
1063         }
1064 }
1065
1066 /*-------------------------------------------------------------------------*/
1067 static void check_status(td_t *td_list)
1068 {
1069         urb_priv_t *lurb_priv = td_list->ed->purb;
1070         int        urb_len    = lurb_priv->length;
1071         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
1072         int        cc;
1073
1074         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1075         if (cc) {
1076                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1077
1078                 invalidate_dcache_ed(td_list->ed);
1079                 if (*phwHeadP & m32_swap(0x1)) {
1080                         if (lurb_priv &&
1081                             ((td_list->index + 1) < urb_len)) {
1082                                 *phwHeadP =
1083                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
1084                                                         m32_swap(0xfffffff0)) |
1085                                                    (*phwHeadP & m32_swap(0x2));
1086
1087                                 lurb_priv->td_cnt += urb_len -
1088                                                      td_list->index - 1;
1089                         } else
1090                                 *phwHeadP &= m32_swap(0xfffffff2);
1091                         flush_dcache_ed(td_list->ed);
1092                 }
1093         }
1094 }
1095
1096 /* replies to the request have to be on a FIFO basis so
1097  * we reverse the reversed done-list */
1098 static td_t *dl_reverse_done_list(ohci_t *ohci)
1099 {
1100         uintptr_t td_list_hc;
1101         td_t *td_rev = NULL;
1102         td_t *td_list = NULL;
1103
1104         invalidate_dcache_hcca(ohci->hcca);
1105         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1106         ohci->hcca->done_head = 0;
1107         flush_dcache_hcca(ohci->hcca);
1108
1109         while (td_list_hc) {
1110                 td_list = (td_t *)td_list_hc;
1111                 invalidate_dcache_td(td_list);
1112                 check_status(td_list);
1113                 td_list->next_dl_td = td_rev;
1114                 td_rev = td_list;
1115                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1116         }
1117         return td_list;
1118 }
1119
1120 /*-------------------------------------------------------------------------*/
1121 /*-------------------------------------------------------------------------*/
1122
1123 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1124 {
1125         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1126                 urb->finished = 1;
1127         else
1128                 dbg("finish_urb: strange.., ED state %x, \n", status);
1129 }
1130
1131 /*
1132  * Used to take back a TD from the host controller. This would normally be
1133  * called from within dl_done_list, however it may be called directly if the
1134  * HC no longer sees the TD and it has not appeared on the donelist (after
1135  * two frames).  This bug has been observed on ZF Micro systems.
1136  */
1137 static int takeback_td(ohci_t *ohci, td_t *td_list)
1138 {
1139         ed_t *ed;
1140         int cc;
1141         int stat = 0;
1142         /* urb_t *urb; */
1143         urb_priv_t *lurb_priv;
1144         __u32 tdINFO, edHeadP, edTailP;
1145
1146         invalidate_dcache_td(td_list);
1147         tdINFO = m32_swap(td_list->hwINFO);
1148
1149         ed = td_list->ed;
1150         lurb_priv = ed->purb;
1151
1152         dl_transfer_length(td_list);
1153
1154         lurb_priv->td_cnt++;
1155
1156         /* error code of transfer */
1157         cc = TD_CC_GET(tdINFO);
1158         if (cc) {
1159                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1160                 stat = cc_to_error[cc];
1161         }
1162
1163         /* see if this done list makes for all TD's of current URB,
1164         * and mark the URB finished if so */
1165         if (lurb_priv->td_cnt == lurb_priv->length)
1166                 finish_urb(ohci, lurb_priv, ed->state);
1167
1168         dbg("dl_done_list: processing TD %x, len %x\n",
1169                 lurb_priv->td_cnt, lurb_priv->length);
1170
1171         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1172                 invalidate_dcache_ed(ed);
1173                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1174                 edTailP = m32_swap(ed->hwTailP);
1175
1176                 /* unlink eds if they are not busy */
1177                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1178                         ep_unlink(ohci, ed);
1179         }
1180         return stat;
1181 }
1182
1183 static int dl_done_list(ohci_t *ohci)
1184 {
1185         int stat = 0;
1186         td_t    *td_list = dl_reverse_done_list(ohci);
1187
1188         while (td_list) {
1189                 td_t    *td_next = td_list->next_dl_td;
1190                 stat = takeback_td(ohci, td_list);
1191                 td_list = td_next;
1192         }
1193         return stat;
1194 }
1195
1196 /*-------------------------------------------------------------------------*
1197  * Virtual Root Hub
1198  *-------------------------------------------------------------------------*/
1199
1200 #include <usbroothubdes.h>
1201
1202 /* Hub class-specific descriptor is constructed dynamically */
1203
1204 /*-------------------------------------------------------------------------*/
1205
1206 #define OK(x)                   len = (x); break
1207 #ifdef DEBUG
1208 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1209                                                 &ohci->regs->roothub.status); }
1210 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1211         (x)); ohci_writel((x), &ohci->regs->roothub.portstatus[wIndex-1]); }
1212 #else
1213 #define WR_RH_STAT(x)           ohci_writel((x), &ohci->regs->roothub.status)
1214 #define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1215                                     &ohci->regs->roothub.portstatus[wIndex-1])
1216 #endif
1217 #define RD_RH_STAT              roothub_status(ohci)
1218 #define RD_RH_PORTSTAT          roothub_portstatus(ohci, wIndex-1)
1219
1220 /* request to virtual root hub */
1221
1222 int rh_check_port_status(ohci_t *controller)
1223 {
1224         __u32 temp, ndp, i;
1225         int res;
1226
1227         res = -1;
1228         temp = roothub_a(controller);
1229         ndp = (temp & RH_A_NDP);
1230 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1231         ndp = (ndp == 2) ? 1:0;
1232 #endif
1233         for (i = 0; i < ndp; i++) {
1234                 temp = roothub_portstatus(controller, i);
1235                 /* check for a device disconnect */
1236                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1237                         (RH_PS_PESC | RH_PS_CSC)) &&
1238                         ((temp & RH_PS_CCS) == 0)) {
1239                         res = i;
1240                         break;
1241                 }
1242         }
1243         return res;
1244 }
1245
1246 static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev,
1247         unsigned long pipe, void *buffer, int transfer_len,
1248         struct devrequest *cmd)
1249 {
1250         void *data = buffer;
1251         int leni = transfer_len;
1252         int len = 0;
1253         int stat = 0;
1254         __u16 bmRType_bReq;
1255         __u16 wValue;
1256         __u16 wIndex;
1257         __u16 wLength;
1258         ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1259
1260 #ifdef DEBUG
1261 pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1262           cmd, "SUB(rh)", usb_pipein(pipe));
1263 #else
1264         ohci_mdelay(1);
1265 #endif
1266         if (usb_pipeint(pipe)) {
1267                 info("Root-Hub submit IRQ: NOT implemented");
1268                 return 0;
1269         }
1270
1271         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1272         wValue        = le16_to_cpu(cmd->value);
1273         wIndex        = le16_to_cpu(cmd->index);
1274         wLength       = le16_to_cpu(cmd->length);
1275
1276         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1277                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1278
1279         switch (bmRType_bReq) {
1280         /* Request Destination:
1281            without flags: Device,
1282            RH_INTERFACE: interface,
1283            RH_ENDPOINT: endpoint,
1284            RH_CLASS means HUB here,
1285            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1286         */
1287
1288         case RH_GET_STATUS:
1289                 *(u16 *)databuf = cpu_to_le16(1);
1290                 OK(2);
1291         case RH_GET_STATUS | RH_INTERFACE:
1292                 *(u16 *)databuf = cpu_to_le16(0);
1293                 OK(2);
1294         case RH_GET_STATUS | RH_ENDPOINT:
1295                 *(u16 *)databuf = cpu_to_le16(0);
1296                 OK(2);
1297         case RH_GET_STATUS | RH_CLASS:
1298                 *(u32 *)databuf = cpu_to_le32(
1299                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1300                 OK(4);
1301         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1302                 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1303                 OK(4);
1304
1305         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1306                 switch (wValue) {
1307                 case (RH_ENDPOINT_STALL):
1308                         OK(0);
1309                 }
1310                 break;
1311
1312         case RH_CLEAR_FEATURE | RH_CLASS:
1313                 switch (wValue) {
1314                 case RH_C_HUB_LOCAL_POWER:
1315                         OK(0);
1316                 case (RH_C_HUB_OVER_CURRENT):
1317                         WR_RH_STAT(RH_HS_OCIC);
1318                         OK(0);
1319                 }
1320                 break;
1321
1322         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1323                 switch (wValue) {
1324                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1325                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1326                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1327                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1328                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1329                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1330                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1331                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1332                 }
1333                 break;
1334
1335         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1336                 switch (wValue) {
1337                 case (RH_PORT_SUSPEND):
1338                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1339                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1340                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1341                                 WR_RH_PORTSTAT(RH_PS_PRS);
1342                         OK(0);
1343                 case (RH_PORT_POWER):
1344                         WR_RH_PORTSTAT(RH_PS_PPS);
1345                         OK(0);
1346                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1347                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1348                                 WR_RH_PORTSTAT(RH_PS_PES);
1349                         OK(0);
1350                 }
1351                 break;
1352
1353         case RH_SET_ADDRESS:
1354                 ohci->rh.devnum = wValue;
1355                 OK(0);
1356
1357         case RH_GET_DESCRIPTOR:
1358                 switch ((wValue & 0xff00) >> 8) {
1359                 case (0x01): /* device descriptor */
1360                         len = min_t(unsigned int,
1361                                         leni,
1362                                         min_t(unsigned int,
1363                                         sizeof(root_hub_dev_des),
1364                                         wLength));
1365                         databuf = root_hub_dev_des; OK(len);
1366                 case (0x02): /* configuration descriptor */
1367                         len = min_t(unsigned int,
1368                                         leni,
1369                                         min_t(unsigned int,
1370                                         sizeof(root_hub_config_des),
1371                                         wLength));
1372                         databuf = root_hub_config_des; OK(len);
1373                 case (0x03): /* string descriptors */
1374                         if (wValue == 0x0300) {
1375                                 len = min_t(unsigned int,
1376                                                 leni,
1377                                                 min_t(unsigned int,
1378                                                 sizeof(root_hub_str_index0),
1379                                                 wLength));
1380                                 databuf = root_hub_str_index0;
1381                                 OK(len);
1382                         }
1383                         if (wValue == 0x0301) {
1384                                 len = min_t(unsigned int,
1385                                                 leni,
1386                                                 min_t(unsigned int,
1387                                                 sizeof(root_hub_str_index1),
1388                                                 wLength));
1389                                 databuf = root_hub_str_index1;
1390                                 OK(len);
1391                 }
1392                 default:
1393                         stat = USB_ST_STALLED;
1394                 }
1395                 break;
1396
1397         case RH_GET_DESCRIPTOR | RH_CLASS:
1398         {
1399                 __u32 temp = roothub_a(ohci);
1400
1401                 databuf[0] = 9;         /* min length; */
1402                 databuf[1] = 0x29;
1403                 databuf[2] = temp & RH_A_NDP;
1404 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1405                 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1406 #endif
1407                 databuf[3] = 0;
1408                 if (temp & RH_A_PSM)    /* per-port power switching? */
1409                         databuf[3] |= 0x1;
1410                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1411                         databuf[3] |= 0x10;
1412                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1413                         databuf[3] |= 0x8;
1414
1415                 databuf[4] = 0;
1416                 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1417                 databuf[6] = 0;
1418                 temp = roothub_b(ohci);
1419                 databuf[7] = temp & RH_B_DR;
1420                 if (databuf[2] < 7) {
1421                         databuf[8] = 0xff;
1422                 } else {
1423                         databuf[0] += 2;
1424                         databuf[8] = (temp & RH_B_DR) >> 8;
1425                         databuf[10] = databuf[9] = 0xff;
1426                 }
1427
1428                 len = min_t(unsigned int, leni,
1429                             min_t(unsigned int, databuf[0], wLength));
1430                 OK(len);
1431         }
1432
1433         case RH_GET_CONFIGURATION:
1434                 databuf[0] = 0x01;
1435                 OK(1);
1436
1437         case RH_SET_CONFIGURATION:
1438                 WR_RH_STAT(0x10000);
1439                 OK(0);
1440
1441         default:
1442                 dbg("unsupported root hub command");
1443                 stat = USB_ST_STALLED;
1444         }
1445
1446 #ifdef  DEBUG
1447         ohci_dump_roothub(ohci, 1);
1448 #else
1449         ohci_mdelay(1);
1450 #endif
1451
1452         len = min_t(int, len, leni);
1453         if (data != databuf)
1454                 memcpy(data, databuf, len);
1455         dev->act_len = len;
1456         dev->status = stat;
1457
1458 #ifdef DEBUG
1459         pkt_print(ohci, NULL, dev, pipe, buffer,
1460                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1461 #else
1462         ohci_mdelay(1);
1463 #endif
1464
1465         return stat;
1466 }
1467
1468 /*-------------------------------------------------------------------------*/
1469
1470 static ohci_dev_t *ohci_get_ohci_dev(ohci_t *ohci, int devnum, int intr)
1471 {
1472         int i;
1473
1474         if (!intr)
1475                 return &ohci->ohci_dev;
1476
1477         /* First see if we already have an ohci_dev for this dev. */
1478         for (i = 0; i < NUM_INT_DEVS; i++) {
1479                 if (ohci->int_dev[i].devnum == devnum)
1480                         return &ohci->int_dev[i];
1481         }
1482
1483         /* If not then find a free one. */
1484         for (i = 0; i < NUM_INT_DEVS; i++) {
1485                 if (ohci->int_dev[i].devnum == -1) {
1486                         ohci->int_dev[i].devnum = devnum;
1487                         return &ohci->int_dev[i];
1488                 }
1489         }
1490
1491         printf("ohci: Error out of ohci_devs for interrupt endpoints\n");
1492         return NULL;
1493 }
1494
1495 /* common code for handling submit messages - used for all but root hub */
1496 /* accesses. */
1497 static urb_priv_t *ohci_alloc_urb(struct usb_device *dev, unsigned long pipe,
1498                 void *buffer, int transfer_len, int interval)
1499 {
1500         urb_priv_t *urb;
1501
1502         urb = calloc(1, sizeof(urb_priv_t));
1503         if (!urb) {
1504                 printf("ohci: Error out of memory allocating urb\n");
1505                 return NULL;
1506         }
1507
1508         urb->dev = dev;
1509         urb->pipe = pipe;
1510         urb->transfer_buffer = buffer;
1511         urb->transfer_buffer_length = transfer_len;
1512         urb->interval = interval;
1513
1514         return urb;
1515 }
1516
1517 static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,
1518                 unsigned long pipe, void *buffer, int transfer_len,
1519                 struct devrequest *setup, int interval)
1520 {
1521         int stat = 0;
1522         int maxsize = usb_maxpacket(dev, pipe);
1523         int timeout;
1524         urb_priv_t *urb;
1525         ohci_dev_t *ohci_dev;
1526
1527         urb = ohci_alloc_urb(dev, pipe, buffer, transfer_len, interval);
1528         if (!urb)
1529                 return -ENOMEM;
1530
1531 #ifdef DEBUG
1532         urb->actual_length = 0;
1533         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1534                   setup, "SUB", usb_pipein(pipe));
1535 #else
1536         ohci_mdelay(1);
1537 #endif
1538         if (!maxsize) {
1539                 err("submit_common_message: pipesize for pipe %lx is zero",
1540                         pipe);
1541                 return -1;
1542         }
1543
1544         ohci_dev = ohci_get_ohci_dev(ohci, dev->devnum, usb_pipeint(pipe));
1545         if (!ohci_dev)
1546                 return -ENOMEM;
1547
1548         if (sohci_submit_job(ohci, ohci_dev, urb, setup) < 0) {
1549                 err("sohci_submit_job failed");
1550                 return -1;
1551         }
1552
1553         mdelay(10);
1554         /* ohci_dump_status(ohci); */
1555
1556         timeout = USB_TIMEOUT_MS(pipe);
1557
1558         /* wait for it to complete */
1559         for (;;) {
1560                 /* check whether the controller is done */
1561                 stat = hc_interrupt(ohci);
1562                 if (stat < 0) {
1563                         stat = USB_ST_CRC_ERR;
1564                         break;
1565                 }
1566
1567                 /* NOTE: since we are not interrupt driven in U-Boot and always
1568                  * handle only one URB at a time, we cannot assume the
1569                  * transaction finished on the first successful return from
1570                  * hc_interrupt().. unless the flag for current URB is set,
1571                  * meaning that all TD's to/from device got actually
1572                  * transferred and processed. If the current URB is not
1573                  * finished we need to re-iterate this loop so as
1574                  * hc_interrupt() gets called again as there needs to be some
1575                  * more TD's to process still */
1576                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1577                         /* 0xff is returned for an SF-interrupt */
1578                         break;
1579                 }
1580
1581                 if (--timeout) {
1582                         mdelay(1);
1583                         if (!urb->finished)
1584                                 dbg("*");
1585
1586                 } else {
1587                         if (!usb_pipeint(pipe))
1588                                 err("CTL:TIMEOUT ");
1589                         dbg("submit_common_msg: TO status %x\n", stat);
1590                         urb->finished = 1;
1591                         stat = USB_ST_CRC_ERR;
1592                         break;
1593                 }
1594         }
1595
1596         dev->status = stat;
1597         dev->act_len = urb->actual_length;
1598
1599         if (usb_pipein(pipe) && dev->status == 0 && dev->act_len)
1600                 invalidate_dcache_buffer(buffer, dev->act_len);
1601
1602 #ifdef DEBUG
1603         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1604                   setup, "RET(ctlr)", usb_pipein(pipe));
1605 #else
1606         ohci_mdelay(1);
1607 #endif
1608         urb_free_priv(urb);
1609         return 0;
1610 }
1611
1612 #define MAX_INT_QUEUESIZE 8
1613
1614 struct int_queue {
1615         int queuesize;
1616         int curr_urb;
1617         urb_priv_t *urb[MAX_INT_QUEUESIZE];
1618 };
1619
1620 static struct int_queue *_ohci_create_int_queue(ohci_t *ohci,
1621                 struct usb_device *udev, unsigned long pipe, int queuesize,
1622                 int elementsize, void *buffer, int interval)
1623 {
1624         struct int_queue *queue;
1625         ohci_dev_t *ohci_dev;
1626         int i;
1627
1628         if (queuesize > MAX_INT_QUEUESIZE)
1629                 return NULL;
1630
1631         ohci_dev = ohci_get_ohci_dev(ohci, udev->devnum, 1);
1632         if (!ohci_dev)
1633                 return NULL;
1634
1635         queue = malloc(sizeof(*queue));
1636         if (!queue) {
1637                 printf("ohci: Error out of memory allocating int queue\n");
1638                 return NULL;
1639         }
1640
1641         for (i = 0; i < queuesize; i++) {
1642                 queue->urb[i] = ohci_alloc_urb(udev, pipe,
1643                                                buffer + i * elementsize,
1644                                                elementsize, interval);
1645                 if (!queue->urb[i])
1646                         break;
1647
1648                 if (sohci_submit_job(ohci, ohci_dev, queue->urb[i], NULL)) {
1649                         printf("ohci: Error submitting int queue job\n");
1650                         urb_free_priv(queue->urb[i]);
1651                         break;
1652                 }
1653         }
1654         if (i == 0) {
1655                 /* We did not succeed in submitting even 1 urb */
1656                 free(queue);
1657                 return NULL;
1658         }
1659
1660         queue->queuesize = i;
1661         queue->curr_urb = 0;
1662
1663         return queue;
1664 }
1665
1666 static void *_ohci_poll_int_queue(ohci_t *ohci, struct usb_device *udev,
1667                                   struct int_queue *queue)
1668 {
1669         if (queue->curr_urb == queue->queuesize)
1670                 return NULL; /* Queue depleted */
1671
1672         if (hc_interrupt(ohci) < 0)
1673                 return NULL;
1674
1675         if (queue->urb[queue->curr_urb]->finished) {
1676                 void *ret = queue->urb[queue->curr_urb]->transfer_buffer;
1677                 queue->curr_urb++;
1678                 return ret;
1679         }
1680
1681         return NULL;
1682 }
1683
1684 static int _ohci_destroy_int_queue(ohci_t *ohci, struct usb_device *dev,
1685                                    struct int_queue *queue)
1686 {
1687         int i;
1688
1689         for (i = 0; i < queue->queuesize; i++)
1690                 urb_free_priv(queue->urb[i]);
1691
1692         free(queue);
1693
1694         return 0;
1695 }
1696
1697 #if !CONFIG_IS_ENABLED(DM_USB)
1698 /* submit routines called from usb.c */
1699 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1700                 int transfer_len)
1701 {
1702         info("submit_bulk_msg");
1703         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len,
1704                                  NULL, 0);
1705 }
1706
1707 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1708                 int transfer_len, int interval, bool nonblock)
1709 {
1710         info("submit_int_msg");
1711         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len, NULL,
1712                         interval);
1713 }
1714
1715 struct int_queue *create_int_queue(struct usb_device *dev,
1716                 unsigned long pipe, int queuesize, int elementsize,
1717                 void *buffer, int interval)
1718 {
1719         return _ohci_create_int_queue(&gohci, dev, pipe, queuesize,
1720                                       elementsize, buffer, interval);
1721 }
1722
1723 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1724 {
1725         return _ohci_poll_int_queue(&gohci, dev, queue);
1726 }
1727
1728 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1729 {
1730         return _ohci_destroy_int_queue(&gohci, dev, queue);
1731 }
1732 #endif
1733
1734 static int _ohci_submit_control_msg(ohci_t *ohci, struct usb_device *dev,
1735         unsigned long pipe, void *buffer, int transfer_len,
1736         struct devrequest *setup)
1737 {
1738         int maxsize = usb_maxpacket(dev, pipe);
1739
1740         info("submit_control_msg");
1741 #ifdef DEBUG
1742         pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1743                   setup, "SUB", usb_pipein(pipe));
1744 #else
1745         ohci_mdelay(1);
1746 #endif
1747         if (!maxsize) {
1748                 err("submit_control_message: pipesize for pipe %lx is zero",
1749                         pipe);
1750                 return -1;
1751         }
1752         if (((pipe >> 8) & 0x7f) == ohci->rh.devnum) {
1753                 ohci->rh.dev = dev;
1754                 /* root hub - redirect */
1755                 return ohci_submit_rh_msg(ohci, dev, pipe, buffer,
1756                                           transfer_len, setup);
1757         }
1758
1759         return submit_common_msg(ohci, dev, pipe, buffer, transfer_len,
1760                                  setup, 0);
1761 }
1762
1763 /*-------------------------------------------------------------------------*
1764  * HC functions
1765  *-------------------------------------------------------------------------*/
1766
1767 /* reset the HC and BUS */
1768
1769 static int hc_reset(ohci_t *ohci)
1770 {
1771 #ifdef CONFIG_PCI_EHCI_DEVNO
1772         pci_dev_t pdev;
1773 #endif
1774         int timeout = 30;
1775         int smm_timeout = 50; /* 0,5 sec */
1776
1777         dbg("%s\n", __FUNCTION__);
1778
1779 #ifdef CONFIG_PCI_EHCI_DEVNO
1780         /*
1781          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1782          * resetting via EHCI registers only.
1783          */
1784         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1785         if (pdev != -1) {
1786                 u32 base;
1787                 int timeout = 1000;
1788
1789                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1790                 base += EHCI_USBCMD_OFF;
1791                 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1792
1793                 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1794                         if (timeout-- <= 0) {
1795                                 printf("USB RootHub reset timed out!");
1796                                 break;
1797                         }
1798                         udelay(1);
1799                 }
1800         } else
1801                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1802 #endif
1803         if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1804                 /* SMM owns the HC, request ownership */
1805                 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1806                 info("USB HC TakeOver from SMM");
1807                 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1808                         mdelay(10);
1809                         if (--smm_timeout == 0) {
1810                                 err("USB HC TakeOver failed!");
1811                                 return -1;
1812                         }
1813                 }
1814         }
1815
1816         /* Disable HC interrupts */
1817         ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1818
1819         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1820                 ohci->slot_name,
1821                 ohci_readl(&ohci->regs->control));
1822
1823         /* Reset USB (needed by some controllers) */
1824         ohci->hc_control = 0;
1825         ohci_writel(ohci->hc_control, &ohci->regs->control);
1826
1827         /* HC Reset requires max 10 us delay */
1828         ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1829         while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1830                 if (--timeout == 0) {
1831                         err("USB HC reset timed out!");
1832                         return -1;
1833                 }
1834                 udelay(1);
1835         }
1836         return 0;
1837 }
1838
1839 /*-------------------------------------------------------------------------*/
1840
1841 /* Start an OHCI controller, set the BUS operational
1842  * enable interrupts
1843  * connect the virtual root hub */
1844
1845 static int hc_start(ohci_t *ohci)
1846 {
1847         __u32 mask;
1848         unsigned int fminterval;
1849         int i;
1850
1851         ohci->disabled = 1;
1852         for (i = 0; i < NUM_INT_DEVS; i++)
1853                 ohci->int_dev[i].devnum = -1;
1854
1855         /* Tell the controller where the control and bulk lists are
1856          * The lists are empty now. */
1857
1858         ohci_writel(0, &ohci->regs->ed_controlhead);
1859         ohci_writel(0, &ohci->regs->ed_bulkhead);
1860
1861         ohci_writel((uintptr_t)ohci->hcca,
1862                     &ohci->regs->hcca); /* reset clears this */
1863
1864         fminterval = 0x2edf;
1865         ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1866         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1867         ohci_writel(fminterval, &ohci->regs->fminterval);
1868         ohci_writel(0x628, &ohci->regs->lsthresh);
1869
1870         /* start controller operations */
1871         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1872         ohci->disabled = 0;
1873         ohci_writel(ohci->hc_control, &ohci->regs->control);
1874
1875         /* disable all interrupts */
1876         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1877                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1878                         OHCI_INTR_OC | OHCI_INTR_MIE);
1879         ohci_writel(mask, &ohci->regs->intrdisable);
1880         /* clear all interrupts */
1881         mask &= ~OHCI_INTR_MIE;
1882         ohci_writel(mask, &ohci->regs->intrstatus);
1883         /* Choose the interrupts we care about now  - but w/o MIE */
1884         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1885         ohci_writel(mask, &ohci->regs->intrenable);
1886
1887 #ifdef  OHCI_USE_NPS
1888         /* required for AMD-756 and some Mac platforms */
1889         ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1890                 &ohci->regs->roothub.a);
1891         ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1892 #endif  /* OHCI_USE_NPS */
1893
1894         /* connect the virtual root hub */
1895         ohci->rh.devnum = 0;
1896
1897         return 0;
1898 }
1899
1900 /*-------------------------------------------------------------------------*/
1901
1902 /* an interrupt happens */
1903
1904 static int hc_interrupt(ohci_t *ohci)
1905 {
1906         struct ohci_regs *regs = ohci->regs;
1907         int ints;
1908         int stat = -1;
1909
1910         invalidate_dcache_hcca(ohci->hcca);
1911
1912         if ((ohci->hcca->done_head != 0) &&
1913                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1914                 ints =  OHCI_INTR_WDH;
1915         } else {
1916                 ints = ohci_readl(&regs->intrstatus);
1917                 if (ints == ~(u32)0) {
1918                         ohci->disabled++;
1919                         err("%s device removed!", ohci->slot_name);
1920                         return -1;
1921                 } else {
1922                         ints &= ohci_readl(&regs->intrenable);
1923                         if (ints == 0) {
1924                                 dbg("hc_interrupt: returning..\n");
1925                                 return 0xff;
1926                         }
1927                 }
1928         }
1929
1930         /* dbg("Interrupt: %x frame: %x", ints,
1931                                         le16_to_cpu(ohci->hcca->frame_no)); */
1932
1933         if (ints & OHCI_INTR_RHSC)
1934                 stat = 0xff;
1935
1936         if (ints & OHCI_INTR_UE) {
1937                 ohci->disabled++;
1938                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1939                         ohci->slot_name);
1940                 /* e.g. due to PCI Master/Target Abort */
1941
1942 #ifdef  DEBUG
1943                 ohci_dump(ohci, 1);
1944 #else
1945                 ohci_mdelay(1);
1946 #endif
1947                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1948                 /* Make some non-interrupt context restart the controller. */
1949                 /* Count and limit the retries though; either hardware or */
1950                 /* software errors can go forever... */
1951                 hc_reset(ohci);
1952                 return -1;
1953         }
1954
1955         if (ints & OHCI_INTR_WDH) {
1956                 ohci_mdelay(1);
1957                 ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1958                 (void)ohci_readl(&regs->intrdisable); /* flush */
1959                 stat = dl_done_list(ohci);
1960                 ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1961                 (void)ohci_readl(&regs->intrdisable); /* flush */
1962         }
1963
1964         if (ints & OHCI_INTR_SO) {
1965                 dbg("USB Schedule overrun\n");
1966                 ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1967                 stat = -1;
1968         }
1969
1970         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1971         if (ints & OHCI_INTR_SF) {
1972                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1973                 mdelay(1);
1974                 ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1975                 if (ohci->ed_rm_list[frame] != NULL)
1976                         ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1977                 stat = 0xff;
1978         }
1979
1980         ohci_writel(ints, &regs->intrstatus);
1981         return stat;
1982 }
1983
1984 /*-------------------------------------------------------------------------*/
1985
1986 #if !CONFIG_IS_ENABLED(DM_USB)
1987
1988 /*-------------------------------------------------------------------------*/
1989
1990 /* De-allocate all resources.. */
1991
1992 static void hc_release_ohci(ohci_t *ohci)
1993 {
1994         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1995
1996         if (!ohci->disabled)
1997                 hc_reset(ohci);
1998 }
1999
2000 /*-------------------------------------------------------------------------*/
2001
2002 /*
2003  * low level initalisation routine, called from usb.c
2004  */
2005 static char ohci_inited = 0;
2006
2007 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
2008 {
2009 #ifdef CONFIG_PCI_OHCI
2010         pci_dev_t pdev;
2011 #endif
2012
2013 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2014         /* cpu dependant init */
2015         if (usb_cpu_init())
2016                 return -1;
2017 #endif
2018
2019 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2020         /*  board dependant init */
2021         if (board_usb_init(index, USB_INIT_HOST))
2022                 return -1;
2023 #endif
2024         memset(&gohci, 0, sizeof(ohci_t));
2025
2026         /* align the storage */
2027         if ((__u32)&ghcca[0] & 0xff) {
2028                 err("HCCA not aligned!!");
2029                 return -1;
2030         }
2031         gohci.hcca = &ghcca[0];
2032         info("aligned ghcca %p", gohci.hcca);
2033         memset(gohci.hcca, 0, sizeof(struct ohci_hcca));
2034
2035         gohci.disabled = 1;
2036         gohci.sleeping = 0;
2037         gohci.irq = -1;
2038 #ifdef CONFIG_PCI_OHCI
2039         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
2040
2041         if (pdev != -1) {
2042                 u16 vid, did;
2043                 u32 base;
2044                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
2045                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
2046                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
2047                                 vid, did, (pdev >> 16) & 0xff,
2048                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
2049                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
2050                 printf("OHCI regs address 0x%08x\n", base);
2051                 gohci.regs = (struct ohci_regs *)base;
2052         } else {
2053                 printf("%s: OHCI devnr: %d not found\n", __func__,
2054                        CONFIG_PCI_OHCI_DEVNO);
2055                 return -1;
2056         }
2057 #else
2058         gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
2059 #endif
2060
2061         gohci.flags = 0;
2062         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
2063
2064         if (hc_reset (&gohci) < 0) {
2065                 hc_release_ohci (&gohci);
2066                 err ("can't reset usb-%s", gohci.slot_name);
2067 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2068                 /* board dependant cleanup */
2069                 board_usb_cleanup(index, USB_INIT_HOST);
2070 #endif
2071
2072 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2073                 /* cpu dependant cleanup */
2074                 usb_cpu_init_fail();
2075 #endif
2076                 return -1;
2077         }
2078
2079         if (hc_start(&gohci) < 0) {
2080                 err("can't start usb-%s", gohci.slot_name);
2081                 hc_release_ohci(&gohci);
2082                 /* Initialization failed */
2083 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2084                 /* board dependant cleanup */
2085                 usb_board_stop();
2086 #endif
2087
2088 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2089                 /* cpu dependant cleanup */
2090                 usb_cpu_stop();
2091 #endif
2092                 return -1;
2093         }
2094
2095 #ifdef  DEBUG
2096         ohci_dump(&gohci, 1);
2097 #else
2098         ohci_mdelay(1);
2099 #endif
2100         ohci_inited = 1;
2101         return 0;
2102 }
2103
2104 int usb_lowlevel_stop(int index)
2105 {
2106         /* this gets called really early - before the controller has */
2107         /* even been initialized! */
2108         if (!ohci_inited)
2109                 return 0;
2110         /* TODO release any interrupts, etc. */
2111         /* call hc_release_ohci() here ? */
2112         hc_reset(&gohci);
2113
2114 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2115         /* board dependant cleanup */
2116         if (usb_board_stop())
2117                 return -1;
2118 #endif
2119
2120 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2121         /* cpu dependant cleanup */
2122         if (usb_cpu_stop())
2123                 return -1;
2124 #endif
2125         /* This driver is no longer initialised. It needs a new low-level
2126          * init (board/cpu) before it can be used again. */
2127         ohci_inited = 0;
2128         return 0;
2129 }
2130
2131 int submit_control_msg(struct usb_device *dev, unsigned long pipe,
2132         void *buffer, int transfer_len, struct devrequest *setup)
2133 {
2134         return _ohci_submit_control_msg(&gohci, dev, pipe, buffer,
2135                                         transfer_len, setup);
2136 }
2137 #endif
2138
2139 #if CONFIG_IS_ENABLED(DM_USB)
2140 static int ohci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
2141                                    unsigned long pipe, void *buffer, int length,
2142                                    struct devrequest *setup)
2143 {
2144         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2145
2146         return _ohci_submit_control_msg(ohci, udev, pipe, buffer,
2147                                         length, setup);
2148 }
2149
2150 static int ohci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
2151                                 unsigned long pipe, void *buffer, int length)
2152 {
2153         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2154
2155         return submit_common_msg(ohci, udev, pipe, buffer, length, NULL, 0);
2156 }
2157
2158 static int ohci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
2159                                unsigned long pipe, void *buffer, int length,
2160                                int interval, bool nonblock)
2161 {
2162         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2163
2164         return submit_common_msg(ohci, udev, pipe, buffer, length,
2165                                  NULL, interval);
2166 }
2167
2168 static struct int_queue *ohci_create_int_queue(struct udevice *dev,
2169                 struct usb_device *udev, unsigned long pipe, int queuesize,
2170                 int elementsize, void *buffer, int interval)
2171 {
2172         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2173
2174         return _ohci_create_int_queue(ohci, udev, pipe, queuesize, elementsize,
2175                                       buffer, interval);
2176 }
2177
2178 static void *ohci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
2179                                  struct int_queue *queue)
2180 {
2181         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2182
2183         return _ohci_poll_int_queue(ohci, udev, queue);
2184 }
2185
2186 static int ohci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
2187                                   struct int_queue *queue)
2188 {
2189         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2190
2191         return _ohci_destroy_int_queue(ohci, udev, queue);
2192 }
2193
2194 int ohci_register(struct udevice *dev, struct ohci_regs *regs)
2195 {
2196         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
2197         ohci_t *ohci = dev_get_priv(dev);
2198         u32 reg;
2199
2200         priv->desc_before_addr = true;
2201
2202         ohci->regs = regs;
2203         ohci->hcca = memalign(256, sizeof(struct ohci_hcca));
2204         if (!ohci->hcca)
2205                 return -ENOMEM;
2206         memset(ohci->hcca, 0, sizeof(struct ohci_hcca));
2207         flush_dcache_hcca(ohci->hcca);
2208
2209         if (hc_reset(ohci) < 0)
2210                 return -EIO;
2211
2212         if (hc_start(ohci) < 0)
2213                 return -EIO;
2214
2215         reg = ohci_readl(&regs->revision);
2216         printf("USB OHCI %x.%x\n", (reg >> 4) & 0xf, reg & 0xf);
2217
2218         return 0;
2219 }
2220
2221 int ohci_deregister(struct udevice *dev)
2222 {
2223         ohci_t *ohci = dev_get_priv(dev);
2224
2225         if (hc_reset(ohci) < 0)
2226                 return -EIO;
2227
2228         free(ohci->hcca);
2229
2230         return 0;
2231 }
2232
2233 struct dm_usb_ops ohci_usb_ops = {
2234         .control = ohci_submit_control_msg,
2235         .bulk = ohci_submit_bulk_msg,
2236         .interrupt = ohci_submit_int_msg,
2237         .create_int_queue = ohci_create_int_queue,
2238         .poll_int_queue = ohci_poll_int_queue,
2239         .destroy_int_queue = ohci_destroy_int_queue,
2240 };
2241
2242 #endif