drivers/usb/host/ehci-hcd.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*-
   3  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   4  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   5  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   6  *
   7  * All rights reserved.
   8  */
   9 #include <common.h>
  10 #include <cpu_func.h>
  11 #include <dm.h>
  12 #include <errno.h>
  13 #include <asm/byteorder.h>
  14 #include <asm/unaligned.h>
  15 #include <usb.h>
  16 #include <asm/io.h>
  17 #include <malloc.h>
  18 #include <memalign.h>
  19 #include <watchdog.h>
  20 #include <linux/compiler.h>
  21
  22 #include "ehci.h"
  23
  24 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
  25 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  26 #endif
  27
  28 /*
  29  * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
  30  * Let's time out after 8 to have a little safety margin on top of that.
  31  */
  32 #define HCHALT_TIMEOUT (8 * 1000)
  33
  34 #if !CONFIG_IS_ENABLED(DM_USB)
  35 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
  36 #endif
  37
  38 #define ALIGN_END_ADDR(type, ptr, size)                 \
  39         ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
  40
  41 static struct descriptor {
  42         struct usb_hub_descriptor hub;
  43         struct usb_device_descriptor device;
  44         struct usb_linux_config_descriptor config;
  45         struct usb_linux_interface_descriptor interface;
  46         struct usb_endpoint_descriptor endpoint;
  47 }  __attribute__ ((packed)) descriptor = {
  48         {
  49                 0x8,            /* bDescLength */
  50                 0x29,           /* bDescriptorType: hub descriptor */
  51                 2,              /* bNrPorts -- runtime modified */
  52                 0,              /* wHubCharacteristics */
  53                 10,             /* bPwrOn2PwrGood */
  54                 0,              /* bHubCntrCurrent */
  55                 {               /* Device removable */
  56                 }               /* at most 7 ports! XXX */
  57         },
  58         {
  59                 0x12,           /* bLength */
  60                 1,              /* bDescriptorType: UDESC_DEVICE */
  61                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  62                 9,              /* bDeviceClass: UDCLASS_HUB */
  63                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  64                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  65                 64,             /* bMaxPacketSize: 64 bytes */
  66                 0x0000,         /* idVendor */
  67                 0x0000,         /* idProduct */
  68                 cpu_to_le16(0x0100), /* bcdDevice */
  69                 1,              /* iManufacturer */
  70                 2,              /* iProduct */
  71                 0,              /* iSerialNumber */
  72                 1               /* bNumConfigurations: 1 */
  73         },
  74         {
  75                 0x9,
  76                 2,              /* bDescriptorType: UDESC_CONFIG */
  77                 cpu_to_le16(0x19),
  78                 1,              /* bNumInterface */
  79                 1,              /* bConfigurationValue */
  80                 0,              /* iConfiguration */
  81                 0x40,           /* bmAttributes: UC_SELF_POWER */
  82                 0               /* bMaxPower */
  83         },
  84         {
  85                 0x9,            /* bLength */
  86                 4,              /* bDescriptorType: UDESC_INTERFACE */
  87                 0,              /* bInterfaceNumber */
  88                 0,              /* bAlternateSetting */
  89                 1,              /* bNumEndpoints */
  90                 9,              /* bInterfaceClass: UICLASS_HUB */
  91                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  92                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  93                 0               /* iInterface */
  94         },
  95         {
  96                 0x7,            /* bLength */
  97                 5,              /* bDescriptorType: UDESC_ENDPOINT */
  98                 0x81,           /* bEndpointAddress:
  99                                  * UE_DIR_IN | EHCI_INTR_ENDPT
 100                                  */
 101                 3,              /* bmAttributes: UE_INTERRUPT */
 102                 8,              /* wMaxPacketSize */
 103                 255             /* bInterval */
 104         },
 105 };
 106
 107 #if defined(CONFIG_EHCI_IS_TDI)
 108 #define ehci_is_TDI()   (1)
 109 #else
 110 #define ehci_is_TDI()   (0)
 111 #endif
 112
 113 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 114 {
 115 #if CONFIG_IS_ENABLED(DM_USB)
 116         return dev_get_priv(usb_get_bus(udev->dev));
 117 #else
 118         return udev->controller;
 119 #endif
 120 }
 121
 122 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 123 {
 124         return PORTSC_PSPD(reg);
 125 }
 126
 127 static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 128 {
 129         uint32_t tmp;
 130         uint32_t *reg_ptr;
 131
 132         reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
 133         tmp = ehci_readl(reg_ptr);
 134         tmp |= USBMODE_CM_HC;
 135 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 136         tmp |= USBMODE_BE;
 137 #else
 138         tmp &= ~USBMODE_BE;
 139 #endif
 140         ehci_writel(reg_ptr, tmp);
 141 }
 142
 143 static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 144                                uint32_t *reg)
 145 {
 146         mdelay(50);
 147 }
 148
 149 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
 150 {
 151         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 152
 153         if (port < 0 || port >= max_ports) {
 154                 /* Printing the message would cause a scan failure! */
 155                 debug("The request port(%u) exceeds maximum port number\n",
 156                       port);
 157                 return NULL;
 158         }
 159
 160         return (uint32_t *)&ctrl->hcor->or_portsc[port];
 161 }
 162
 163 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 164 {
 165         uint32_t result;
 166         do {
 167                 result = ehci_readl(ptr);
 168                 udelay(5);
 169                 if (result == ~(uint32_t)0)
 170                         return -1;
 171                 result &= mask;
 172                 if (result == done)
 173                         return 0;
 174                 usec--;
 175         } while (usec > 0);
 176         return -1;
 177 }
 178
 179 static int ehci_reset(struct ehci_ctrl *ctrl)
 180 {
 181         uint32_t cmd;
 182         int ret = 0;
 183
 184         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 185         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
 186         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 187         ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
 188                         CMD_RESET, 0, 250 * 1000);
 189         if (ret < 0) {
 190                 printf("EHCI fail to reset\n");
 191                 goto out;
 192         }
 193
 194         if (ehci_is_TDI())
 195                 ctrl->ops.set_usb_mode(ctrl);
 196
 197 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
 198         cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
 199         cmd &= ~TXFIFO_THRESH_MASK;
 200         cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
 201         ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
 202 #endif
 203 out:
 204         return ret;
 205 }
 206
 207 static int ehci_shutdown(struct ehci_ctrl *ctrl)
 208 {
 209         int i, ret = 0;
 210         uint32_t cmd, reg;
 211         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 212
 213         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 214         /* If not run, directly return */
 215         if (!(cmd & CMD_RUN))
 216                 return 0;
 217         cmd &= ~(CMD_PSE | CMD_ASE);
 218         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 219         ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
 220                 100 * 1000);
 221
 222         if (!ret) {
 223                 for (i = 0; i < max_ports; i++) {
 224                         reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
 225                         reg |= EHCI_PS_SUSP;
 226                         ehci_writel(&ctrl->hcor->or_portsc[i], reg);
 227                 }
 228
 229                 cmd &= ~CMD_RUN;
 230                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 231                 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
 232                         HCHALT_TIMEOUT);
 233         }
 234
 235         if (ret)
 236                 puts("EHCI failed to shut down host controller.\n");
 237
 238         return ret;
 239 }
 240
 241 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 242 {
 243         uint32_t delta, next;
 244         unsigned long addr = (unsigned long)buf;
 245         int idx;
 246
 247         if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
 248                 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
 249
 250         flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
 251
 252         idx = 0;
 253         while (idx < QT_BUFFER_CNT) {
 254                 td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
 255                 td->qt_buffer_hi[idx] = 0;
 256                 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
 257                 delta = next - addr;
 258                 if (delta >= sz)
 259                         break;
 260                 sz -= delta;
 261                 addr = next;
 262                 idx++;
 263         }
 264
 265         if (idx == QT_BUFFER_CNT) {
 266                 printf("out of buffer pointers (%zu bytes left)\n", sz);
 267                 return -1;
 268         }
 269
 270         return 0;
 271 }
 272
 273 static inline u8 ehci_encode_speed(enum usb_device_speed speed)
 274 {
 275         #define QH_HIGH_SPEED   2
 276         #define QH_FULL_SPEED   0
 277         #define QH_LOW_SPEED    1
 278         if (speed == USB_SPEED_HIGH)
 279                 return QH_HIGH_SPEED;
 280         if (speed == USB_SPEED_LOW)
 281                 return QH_LOW_SPEED;
 282         return QH_FULL_SPEED;
 283 }
 284
 285 static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
 286                                           struct QH *qh)
 287 {
 288         uint8_t portnr = 0;
 289         uint8_t hubaddr = 0;
 290
 291         if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
 292                 return;
 293
 294         usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
 295
 296         qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
 297                                      QH_ENDPT2_HUBADDR(hubaddr));
 298 }
 299
 300 static int
 301 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 302                    int length, struct devrequest *req)
 303 {
 304         ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
 305         struct qTD *qtd;
 306         int qtd_count = 0;
 307         int qtd_counter = 0;
 308         volatile struct qTD *vtd;
 309         unsigned long ts;
 310         uint32_t *tdp;
 311         uint32_t endpt, maxpacket, token, usbsts, qhtoken;
 312         uint32_t c, toggle;
 313         uint32_t cmd;
 314         int timeout;
 315         int ret = 0;
 316         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 317
 318         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 319               buffer, length, req);
 320         if (req != NULL)
 321                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 322                       req->request, req->request,
 323                       req->requesttype, req->requesttype,
 324                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 325                       le16_to_cpu(req->index));
 326
 327 #define PKT_ALIGN       512
 328         /*
 329          * The USB transfer is split into qTD transfers. Eeach qTD transfer is
 330          * described by a transfer descriptor (the qTD). The qTDs form a linked
 331          * list with a queue head (QH).
 332          *
 333          * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
 334          * have its beginning in a qTD transfer and its end in the following
 335          * one, so the qTD transfer lengths have to be chosen accordingly.
 336          *
 337          * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
 338          * single pages. The first data buffer can start at any offset within a
 339          * page (not considering the cache-line alignment issues), while the
 340          * following buffers must be page-aligned. There is no alignment
 341          * constraint on the size of a qTD transfer.
 342          */
 343         if (req != NULL)
 344                 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
 345                 qtd_count += 1 + 1;
 346         if (length > 0 || req == NULL) {
 347                 /*
 348                  * Determine the qTD transfer size that will be used for the
 349                  * data payload (not considering the first qTD transfer, which
 350                  * may be longer or shorter, and the final one, which may be
 351                  * shorter).
 352                  *
 353                  * In order to keep each packet within a qTD transfer, the qTD
 354                  * transfer size is aligned to PKT_ALIGN, which is a multiple of
 355                  * wMaxPacketSize (except in some cases for interrupt transfers,
 356                  * see comment in submit_int_msg()).
 357                  *
 358                  * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
 359                  * QT_BUFFER_CNT full pages will be used.
 360                  */
 361                 int xfr_sz = QT_BUFFER_CNT;
 362                 /*
 363                  * However, if the input buffer is not aligned to PKT_ALIGN, the
 364                  * qTD transfer size will be one page shorter, and the first qTD
 365                  * data buffer of each transfer will be page-unaligned.
 366                  */
 367                 if ((unsigned long)buffer & (PKT_ALIGN - 1))
 368                         xfr_sz--;
 369                 /* Convert the qTD transfer size to bytes. */
 370                 xfr_sz *= EHCI_PAGE_SIZE;
 371                 /*
 372                  * Approximate by excess the number of qTDs that will be
 373                  * required for the data payload. The exact formula is way more
 374                  * complicated and saves at most 2 qTDs, i.e. a total of 128
 375                  * bytes.
 376                  */
 377                 qtd_count += 2 + length / xfr_sz;
 378         }
 379 /*
 380  * Threshold value based on the worst-case total size of the allocated qTDs for
 381  * a mass-storage transfer of 65535 blocks of 512 bytes.
 382  */
 383 #if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
 384 #warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
 385 #endif
 386         qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
 387         if (qtd == NULL) {
 388                 printf("unable to allocate TDs\n");
 389                 return -1;
 390         }
 391
 392         memset(qh, 0, sizeof(struct QH));
 393         memset(qtd, 0, qtd_count * sizeof(*qtd));
 394
 395         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 396
 397         /*
 398          * Setup QH (3.6 in ehci-r10.pdf)
 399          *
 400          *   qh_link ................. 03-00 H
 401          *   qh_endpt1 ............... 07-04 H
 402          *   qh_endpt2 ............... 0B-08 H
 403          * - qh_curtd
 404          *   qh_overlay.qt_next ...... 13-10 H
 405          * - qh_overlay.qt_altnext
 406          */
 407         qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 408         c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
 409         maxpacket = usb_maxpacket(dev, pipe);
 410         endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
 411                 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
 412                 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
 413                 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
 414                 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
 415
 416         /* Force FS for fsl HS quirk */
 417         if (!ctrl->has_fsl_erratum_a005275)
 418                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
 419         else
 420                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
 421
 422         qh->qh_endpt1 = cpu_to_hc32(endpt);
 423         endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
 424         qh->qh_endpt2 = cpu_to_hc32(endpt);
 425         ehci_update_endpt2_dev_n_port(dev, qh);
 426         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 427         qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 428
 429         tdp = &qh->qh_overlay.qt_next;
 430         if (req != NULL) {
 431                 /*
 432                  * Setup request qTD (3.5 in ehci-r10.pdf)
 433                  *
 434                  *   qt_next ................ 03-00 H
 435                  *   qt_altnext ............. 07-04 H
 436                  *   qt_token ............... 0B-08 H
 437                  *
 438                  *   [ buffer, buffer_hi ] loaded with "req".
 439                  */
 440                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 441                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 442                 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
 443                         QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 444                         QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
 445                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 446                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 447                 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
 448                         printf("unable to construct SETUP TD\n");
 449                         goto fail;
 450                 }
 451                 /* Update previous qTD! */
 452                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 453                 tdp = &qtd[qtd_counter++].qt_next;
 454                 toggle = 1;
 455         }
 456
 457         if (length > 0 || req == NULL) {
 458                 uint8_t *buf_ptr = buffer;
 459                 int left_length = length;
 460
 461                 do {
 462                         /*
 463                          * Determine the size of this qTD transfer. By default,
 464                          * QT_BUFFER_CNT full pages can be used.
 465                          */
 466                         int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
 467                         /*
 468                          * However, if the input buffer is not page-aligned, the
 469                          * portion of the first page before the buffer start
 470                          * offset within that page is unusable.
 471                          */
 472                         xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
 473                         /*
 474                          * In order to keep each packet within a qTD transfer,
 475                          * align the qTD transfer size to PKT_ALIGN.
 476                          */
 477                         xfr_bytes &= ~(PKT_ALIGN - 1);
 478                         /*
 479                          * This transfer may be shorter than the available qTD
 480                          * transfer size that has just been computed.
 481                          */
 482                         xfr_bytes = min(xfr_bytes, left_length);
 483
 484                         /*
 485                          * Setup request qTD (3.5 in ehci-r10.pdf)
 486                          *
 487                          *   qt_next ................ 03-00 H
 488                          *   qt_altnext ............. 07-04 H
 489                          *   qt_token ............... 0B-08 H
 490                          *
 491                          *   [ buffer, buffer_hi ] loaded with "buffer".
 492                          */
 493                         qtd[qtd_counter].qt_next =
 494                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 495                         qtd[qtd_counter].qt_altnext =
 496                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 497                         token = QT_TOKEN_DT(toggle) |
 498                                 QT_TOKEN_TOTALBYTES(xfr_bytes) |
 499                                 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
 500                                 QT_TOKEN_CERR(3) |
 501                                 QT_TOKEN_PID(usb_pipein(pipe) ?
 502                                         QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
 503                                 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 504                         qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 505                         if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
 506                                                 xfr_bytes)) {
 507                                 printf("unable to construct DATA TD\n");
 508                                 goto fail;
 509                         }
 510                         /* Update previous qTD! */
 511                         *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 512                         tdp = &qtd[qtd_counter++].qt_next;
 513                         /*
 514                          * Data toggle has to be adjusted since the qTD transfer
 515                          * size is not always an even multiple of
 516                          * wMaxPacketSize.
 517                          */
 518                         if ((xfr_bytes / maxpacket) & 1)
 519                                 toggle ^= 1;
 520                         buf_ptr += xfr_bytes;
 521                         left_length -= xfr_bytes;
 522                 } while (left_length > 0);
 523         }
 524
 525         if (req != NULL) {
 526                 /*
 527                  * Setup request qTD (3.5 in ehci-r10.pdf)
 528                  *
 529                  *   qt_next ................ 03-00 H
 530                  *   qt_altnext ............. 07-04 H
 531                  *   qt_token ............... 0B-08 H
 532                  */
 533                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 534                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 535                 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
 536                         QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 537                         QT_TOKEN_PID(usb_pipein(pipe) ?
 538                                 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
 539                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 540                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 541                 /* Update previous qTD! */
 542                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 543                 tdp = &qtd[qtd_counter++].qt_next;
 544         }
 545
 546         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
 547
 548         /* Flush dcache */
 549         flush_dcache_range((unsigned long)&ctrl->qh_list,
 550                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 551         flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
 552         flush_dcache_range((unsigned long)qtd,
 553                            ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 554
 555         usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
 556         ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
 557
 558         /* Enable async. schedule. */
 559         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 560         if (!(cmd & CMD_ASE)) {
 561                 cmd |= CMD_ASE;
 562                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 563
 564                 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
 565                                 100 * 1000);
 566                 if (ret < 0) {
 567                         printf("EHCI fail timeout STS_ASS set\n");
 568                         goto fail;
 569                 }
 570         }
 571
 572         /* Wait for TDs to be processed. */
 573         ts = get_timer(0);
 574         vtd = &qtd[qtd_counter - 1];
 575         timeout = USB_TIMEOUT_MS(pipe);
 576         do {
 577                 /* Invalidate dcache */
 578                 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
 579                         ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 580                 invalidate_dcache_range((unsigned long)qh,
 581                         ALIGN_END_ADDR(struct QH, qh, 1));
 582                 invalidate_dcache_range((unsigned long)qtd,
 583                         ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 584
 585                 token = hc32_to_cpu(vtd->qt_token);
 586                 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
 587                         break;
 588                 WATCHDOG_RESET();
 589         } while (get_timer(ts) < timeout);
 590         qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token);
 591
 592         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 593         flush_dcache_range((unsigned long)&ctrl->qh_list,
 594                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 595
 596         /*
 597          * Invalidate the memory area occupied by buffer
 598          * Don't try to fix the buffer alignment, if it isn't properly
 599          * aligned it's upper layer's fault so let invalidate_dcache_range()
 600          * vow about it. But we have to fix the length as it's actual
 601          * transfer length and can be unaligned. This is potentially
 602          * dangerous operation, it's responsibility of the calling
 603          * code to make sure enough space is reserved.
 604          */
 605         if (buffer != NULL && length > 0)
 606                 invalidate_dcache_range((unsigned long)buffer,
 607                         ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 608
 609         /* Check that the TD processing happened */
 610         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
 611                 printf("EHCI timed out on TD - token=%#x\n", token);
 612
 613         if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) {
 614                 debug("TOKEN=%#x\n", qhtoken);
 615                 switch (QT_TOKEN_GET_STATUS(qhtoken) &
 616                         ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
 617                 case 0:
 618                         toggle = QT_TOKEN_GET_DT(qhtoken);
 619                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 620                                        usb_pipeout(pipe), toggle);
 621                         dev->status = 0;
 622                         break;
 623                 case QT_TOKEN_STATUS_HALTED:
 624                         dev->status = USB_ST_STALLED;
 625                         break;
 626                 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
 627                 case QT_TOKEN_STATUS_DATBUFERR:
 628                         dev->status = USB_ST_BUF_ERR;
 629                         break;
 630                 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
 631                 case QT_TOKEN_STATUS_BABBLEDET:
 632                         dev->status = USB_ST_BABBLE_DET;
 633                         break;
 634                 default:
 635                         dev->status = USB_ST_CRC_ERR;
 636                         if (QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_HALTED)
 637                                 dev->status |= USB_ST_STALLED;
 638                         break;
 639                 }
 640                 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken);
 641         } else {
 642                 dev->act_len = 0;
 643 #ifndef CONFIG_USB_EHCI_FARADAY
 644                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 645                       dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
 646                       ehci_readl(&ctrl->hcor->or_portsc[0]),
 647                       ehci_readl(&ctrl->hcor->or_portsc[1]));
 648 #endif
 649         }
 650
 651         free(qtd);
 652         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 653
 654 fail:
 655         free(qtd);
 656         return -1;
 657 }
 658
 659 static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
 660                             void *buffer, int length, struct devrequest *req)
 661 {
 662         uint8_t tmpbuf[4];
 663         u16 typeReq;
 664         void *srcptr = NULL;
 665         int len, srclen;
 666         uint32_t reg;
 667         uint32_t *status_reg;
 668         int port = le16_to_cpu(req->index) & 0xff;
 669         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 670
 671         srclen = 0;
 672
 673         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 674               req->request, req->request,
 675               req->requesttype, req->requesttype,
 676               le16_to_cpu(req->value), le16_to_cpu(req->index));
 677
 678         typeReq = req->request | req->requesttype << 8;
 679
 680         switch (typeReq) {
 681         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 682         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 683         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 684                 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
 685                 if (!status_reg)
 686                         return -1;
 687                 break;
 688         default:
 689                 status_reg = NULL;
 690                 break;
 691         }
 692
 693         switch (typeReq) {
 694         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 695                 switch (le16_to_cpu(req->value) >> 8) {
 696                 case USB_DT_DEVICE:
 697                         debug("USB_DT_DEVICE request\n");
 698                         srcptr = &descriptor.device;
 699                         srclen = descriptor.device.bLength;
 700                         break;
 701                 case USB_DT_CONFIG:
 702                         debug("USB_DT_CONFIG config\n");
 703                         srcptr = &descriptor.config;
 704                         srclen = descriptor.config.bLength +
 705                                         descriptor.interface.bLength +
 706                                         descriptor.endpoint.bLength;
 707                         break;
 708                 case USB_DT_STRING:
 709                         debug("USB_DT_STRING config\n");
 710                         switch (le16_to_cpu(req->value) & 0xff) {
 711                         case 0: /* Language */
 712                                 srcptr = "\4\3\1\0";
 713                                 srclen = 4;
 714                                 break;
 715                         case 1: /* Vendor */
 716                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 717                                 srclen = 14;
 718                                 break;
 719                         case 2: /* Product */
 720                                 srcptr = "\52\3E\0H\0C\0I\0 "
 721                                          "\0H\0o\0s\0t\0 "
 722                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 723                                 srclen = 42;
 724                                 break;
 725                         default:
 726                                 debug("unknown value DT_STRING %x\n",
 727                                         le16_to_cpu(req->value));
 728                                 goto unknown;
 729                         }
 730                         break;
 731                 default:
 732                         debug("unknown value %x\n", le16_to_cpu(req->value));
 733                         goto unknown;
 734                 }
 735                 break;
 736         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 737                 switch (le16_to_cpu(req->value) >> 8) {
 738                 case USB_DT_HUB:
 739                         debug("USB_DT_HUB config\n");
 740                         srcptr = &descriptor.hub;
 741                         srclen = descriptor.hub.bLength;
 742                         break;
 743                 default:
 744                         debug("unknown value %x\n", le16_to_cpu(req->value));
 745                         goto unknown;
 746                 }
 747                 break;
 748         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 749                 debug("USB_REQ_SET_ADDRESS\n");
 750                 ctrl->rootdev = le16_to_cpu(req->value);
 751                 break;
 752         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 753                 debug("USB_REQ_SET_CONFIGURATION\n");
 754                 /* Nothing to do */
 755                 break;
 756         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 757                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 758                 tmpbuf[1] = 0;
 759                 srcptr = tmpbuf;
 760                 srclen = 2;
 761                 break;
 762         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 763                 memset(tmpbuf, 0, 4);
 764                 reg = ehci_readl(status_reg);
 765                 if (reg & EHCI_PS_CS)
 766                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 767                 if (reg & EHCI_PS_PE)
 768                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 769                 if (reg & EHCI_PS_SUSP)
 770                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 771                 if (reg & EHCI_PS_OCA)
 772                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 773                 if (reg & EHCI_PS_PR)
 774                         tmpbuf[0] |= USB_PORT_STAT_RESET;
 775                 if (reg & EHCI_PS_PP)
 776                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 777
 778                 if (ehci_is_TDI()) {
 779                         switch (ctrl->ops.get_port_speed(ctrl, reg)) {
 780                         case PORTSC_PSPD_FS:
 781                                 break;
 782                         case PORTSC_PSPD_LS:
 783                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 784                                 break;
 785                         case PORTSC_PSPD_HS:
 786                         default:
 787                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 788                                 break;
 789                         }
 790                 } else {
 791                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 792                 }
 793
 794                 if (reg & EHCI_PS_CSC)
 795                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 796                 if (reg & EHCI_PS_PEC)
 797                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 798                 if (reg & EHCI_PS_OCC)
 799                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 800                 if (ctrl->portreset & (1 << port))
 801                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 802
 803                 srcptr = tmpbuf;
 804                 srclen = 4;
 805                 break;
 806         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 807                 reg = ehci_readl(status_reg);
 808                 reg &= ~EHCI_PS_CLEAR;
 809                 switch (le16_to_cpu(req->value)) {
 810                 case USB_PORT_FEAT_ENABLE:
 811                         reg |= EHCI_PS_PE;
 812                         ehci_writel(status_reg, reg);
 813                         break;
 814                 case USB_PORT_FEAT_POWER:
 815                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 816                                 reg |= EHCI_PS_PP;
 817                                 ehci_writel(status_reg, reg);
 818                         }
 819                         break;
 820                 case USB_PORT_FEAT_RESET:
 821                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 822                             !ehci_is_TDI() &&
 823                             EHCI_PS_IS_LOWSPEED(reg)) {
 824                                 /* Low speed device, give up ownership. */
 825                                 debug("port %d low speed --> companion\n",
 826                                       port - 1);
 827                                 reg |= EHCI_PS_PO;
 828                                 ehci_writel(status_reg, reg);
 829                                 return -ENXIO;
 830                         } else {
 831                                 int ret;
 832
 833                                 /* Disable chirp for HS erratum */
 834                                 if (ctrl->has_fsl_erratum_a005275)
 835                                         reg |= PORTSC_FSL_PFSC;
 836
 837                                 reg |= EHCI_PS_PR;
 838                                 reg &= ~EHCI_PS_PE;
 839                                 ehci_writel(status_reg, reg);
 840                                 /*
 841                                  * caller must wait, then call GetPortStatus
 842                                  * usb 2.0 specification say 50 ms resets on
 843                                  * root
 844                                  */
 845                                 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
 846
 847                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 848                                 /*
 849                                  * A host controller must terminate the reset
 850                                  * and stabilize the state of the port within
 851                                  * 2 milliseconds
 852                                  */
 853                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
 854                                                 2 * 1000);
 855                                 if (!ret) {
 856                                         reg = ehci_readl(status_reg);
 857                                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
 858                                             == EHCI_PS_CS && !ehci_is_TDI()) {
 859                                                 debug("port %d full speed --> companion\n", port - 1);
 860                                                 reg &= ~EHCI_PS_CLEAR;
 861                                                 reg |= EHCI_PS_PO;
 862                                                 ehci_writel(status_reg, reg);
 863                                                 return -ENXIO;
 864                                         } else {
 865                                                 ctrl->portreset |= 1 << port;
 866                                         }
 867                                 } else {
 868                                         printf("port(%d) reset error\n",
 869                                                port - 1);
 870                                 }
 871                         }
 872                         break;
 873                 case USB_PORT_FEAT_TEST:
 874                         ehci_shutdown(ctrl);
 875                         reg &= ~(0xf << 16);
 876                         reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
 877                         ehci_writel(status_reg, reg);
 878                         break;
 879                 default:
 880                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 881                         goto unknown;
 882                 }
 883                 /* unblock posted writes */
 884                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 885                 break;
 886         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 887                 reg = ehci_readl(status_reg);
 888                 reg &= ~EHCI_PS_CLEAR;
 889                 switch (le16_to_cpu(req->value)) {
 890                 case USB_PORT_FEAT_ENABLE:
 891                         reg &= ~EHCI_PS_PE;
 892                         break;
 893                 case USB_PORT_FEAT_C_ENABLE:
 894                         reg |= EHCI_PS_PE;
 895                         break;
 896                 case USB_PORT_FEAT_POWER:
 897                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
 898                                 reg &= ~EHCI_PS_PP;
 899                         break;
 900                 case USB_PORT_FEAT_C_CONNECTION:
 901                         reg |= EHCI_PS_CSC;
 902                         break;
 903                 case USB_PORT_FEAT_OVER_CURRENT:
 904                         reg |= EHCI_PS_OCC;
 905                         break;
 906                 case USB_PORT_FEAT_C_RESET:
 907                         ctrl->portreset &= ~(1 << port);
 908                         break;
 909                 default:
 910                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 911                         goto unknown;
 912                 }
 913                 ehci_writel(status_reg, reg);
 914                 /* unblock posted write */
 915                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 916                 break;
 917         default:
 918                 debug("Unknown request\n");
 919                 goto unknown;
 920         }
 921
 922         mdelay(1);
 923         len = min3(srclen, (int)le16_to_cpu(req->length), length);
 924         if (srcptr != NULL && len > 0)
 925                 memcpy(buffer, srcptr, len);
 926         else
 927                 debug("Len is 0\n");
 928
 929         dev->act_len = len;
 930         dev->status = 0;
 931         return 0;
 932
 933 unknown:
 934         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
 935               req->requesttype, req->request, le16_to_cpu(req->value),
 936               le16_to_cpu(req->index), le16_to_cpu(req->length));
 937
 938         dev->act_len = 0;
 939         dev->status = USB_ST_STALLED;
 940         return -1;
 941 }
 942
 943 static const struct ehci_ops default_ehci_ops = {
 944         .set_usb_mode           = ehci_set_usbmode,
 945         .get_port_speed         = ehci_get_port_speed,
 946         .powerup_fixup          = ehci_powerup_fixup,
 947         .get_portsc_register    = ehci_get_portsc_register,
 948 };
 949
 950 static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
 951 {
 952         if (!ops) {
 953                 ctrl->ops = default_ehci_ops;
 954         } else {
 955                 ctrl->ops = *ops;
 956                 if (!ctrl->ops.set_usb_mode)
 957                         ctrl->ops.set_usb_mode = ehci_set_usbmode;
 958                 if (!ctrl->ops.get_port_speed)
 959                         ctrl->ops.get_port_speed = ehci_get_port_speed;
 960                 if (!ctrl->ops.powerup_fixup)
 961                         ctrl->ops.powerup_fixup = ehci_powerup_fixup;
 962                 if (!ctrl->ops.get_portsc_register)
 963                         ctrl->ops.get_portsc_register =
 964                                         ehci_get_portsc_register;
 965         }
 966 }
 967
 968 #if !CONFIG_IS_ENABLED(DM_USB)
 969 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
 970 {
 971         struct ehci_ctrl *ctrl = &ehcic[index];
 972
 973         ctrl->priv = priv;
 974         ehci_setup_ops(ctrl, ops);
 975 }
 976
 977 void *ehci_get_controller_priv(int index)
 978 {
 979         return ehcic[index].priv;
 980 }
 981 #endif
 982
 983 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
 984 {
 985         struct QH *qh_list;
 986         struct QH *periodic;
 987         uint32_t reg;
 988         uint32_t cmd;
 989         int i;
 990
 991         /* Set the high address word (aka segment) for 64-bit controller */
 992         if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
 993                 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
 994
 995         qh_list = &ctrl->qh_list;
 996
 997         /* Set head of reclaim list */
 998         memset(qh_list, 0, sizeof(*qh_list));
 999         qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
1000         qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1001                                                 QH_ENDPT1_EPS(USB_SPEED_HIGH));
1002         qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1003         qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1004         qh_list->qh_overlay.qt_token =
1005                         cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
1006
1007         flush_dcache_range((unsigned long)qh_list,
1008                            ALIGN_END_ADDR(struct QH, qh_list, 1));
1009
1010         /* Set async. queue head pointer. */
1011         ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
1012
1013         /*
1014          * Set up periodic list
1015          * Step 1: Parent QH for all periodic transfers.
1016          */
1017         ctrl->periodic_schedules = 0;
1018         periodic = &ctrl->periodic_queue;
1019         memset(periodic, 0, sizeof(*periodic));
1020         periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1021         periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1022         periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1023
1024         flush_dcache_range((unsigned long)periodic,
1025                            ALIGN_END_ADDR(struct QH, periodic, 1));
1026
1027         /*
1028          * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1029          *         In particular, device specifications on polling frequency
1030          *         are disregarded. Keyboards seem to send NAK/NYet reliably
1031          *         when polled with an empty buffer.
1032          *
1033          *         Split Transactions will be spread across microframes using
1034          *         S-mask and C-mask.
1035          */
1036         if (ctrl->periodic_list == NULL)
1037                 ctrl->periodic_list = memalign(4096, 1024 * 4);
1038
1039         if (!ctrl->periodic_list)
1040                 return -ENOMEM;
1041         for (i = 0; i < 1024; i++) {
1042                 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
1043                                                 | QH_LINK_TYPE_QH);
1044         }
1045
1046         flush_dcache_range((unsigned long)ctrl->periodic_list,
1047                            ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
1048                                           1024));
1049
1050         /* Set periodic list base address */
1051         ehci_writel(&ctrl->hcor->or_periodiclistbase,
1052                 (unsigned long)ctrl->periodic_list);
1053
1054         reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
1055         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
1056         debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
1057         /* Port Indicators */
1058         if (HCS_INDICATOR(reg))
1059                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1060                                 | 0x80, &descriptor.hub.wHubCharacteristics);
1061         /* Port Power Control */
1062         if (HCS_PPC(reg))
1063                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1064                                 | 0x01, &descriptor.hub.wHubCharacteristics);
1065
1066         /* Start the host controller. */
1067         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1068         /*
1069          * Philips, Intel, and maybe others need CMD_RUN before the
1070          * root hub will detect new devices (why?); NEC doesn't
1071          */
1072         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1073         cmd |= CMD_RUN;
1074         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
1075
1076         if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1077                 /* take control over the ports */
1078                 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1079                 cmd |= FLAG_CF;
1080                 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1081         }
1082
1083         /* unblock posted write */
1084         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1085         mdelay(5);
1086         reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
1087         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
1088
1089         return 0;
1090 }
1091
1092 #if !CONFIG_IS_ENABLED(DM_USB)
1093 int usb_lowlevel_stop(int index)
1094 {
1095         ehci_shutdown(&ehcic[index]);
1096         return ehci_hcd_stop(index);
1097 }
1098
1099 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1100 {
1101         struct ehci_ctrl *ctrl = &ehcic[index];
1102         uint tweaks = 0;
1103         int rc;
1104
1105         /**
1106          * Set ops to default_ehci_ops, ehci_hcd_init should call
1107          * ehci_set_controller_priv to change any of these function pointers.
1108          */
1109         ctrl->ops = default_ehci_ops;
1110
1111         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1112         if (rc)
1113                 return rc;
1114         if (!ctrl->hccr || !ctrl->hcor)
1115                 return -1;
1116         if (init == USB_INIT_DEVICE)
1117                 goto done;
1118
1119         /* EHCI spec section 4.1 */
1120         if (ehci_reset(ctrl))
1121                 return -1;
1122
1123 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1124         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1125         if (rc)
1126                 return rc;
1127 #endif
1128 #ifdef CONFIG_USB_EHCI_FARADAY
1129         tweaks |= EHCI_TWEAK_NO_INIT_CF;
1130 #endif
1131         rc = ehci_common_init(ctrl, tweaks);
1132         if (rc)
1133                 return rc;
1134
1135         ctrl->rootdev = 0;
1136 done:
1137         *controller = &ehcic[index];
1138         return 0;
1139 }
1140 #endif
1141
1142 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1143                                  void *buffer, int length)
1144 {
1145
1146         if (usb_pipetype(pipe) != PIPE_BULK) {
1147                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1148                 return -1;
1149         }
1150         return ehci_submit_async(dev, pipe, buffer, length, NULL);
1151 }
1152
1153 static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1154                                     void *buffer, int length,
1155                                     struct devrequest *setup)
1156 {
1157         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1158
1159         if (usb_pipetype(pipe) != PIPE_CONTROL) {
1160                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1161                 return -1;
1162         }
1163
1164         if (usb_pipedevice(pipe) == ctrl->rootdev) {
1165                 if (!ctrl->rootdev)
1166                         dev->speed = USB_SPEED_HIGH;
1167                 return ehci_submit_root(dev, pipe, buffer, length, setup);
1168         }
1169         return ehci_submit_async(dev, pipe, buffer, length, setup);
1170 }
1171
1172 struct int_queue {
1173         int elementsize;
1174         unsigned long pipe;
1175         struct QH *first;
1176         struct QH *current;
1177         struct QH *last;
1178         struct qTD *tds;
1179 };
1180
1181 #define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
1182
1183 static int
1184 enable_periodic(struct ehci_ctrl *ctrl)
1185 {
1186         uint32_t cmd;
1187         struct ehci_hcor *hcor = ctrl->hcor;
1188         int ret;
1189
1190         cmd = ehci_readl(&hcor->or_usbcmd);
1191         cmd |= CMD_PSE;
1192         ehci_writel(&hcor->or_usbcmd, cmd);
1193
1194         ret = handshake((uint32_t *)&hcor->or_usbsts,
1195                         STS_PSS, STS_PSS, 100 * 1000);
1196         if (ret < 0) {
1197                 printf("EHCI failed: timeout when enabling periodic list\n");
1198                 return -ETIMEDOUT;
1199         }
1200         udelay(1000);
1201         return 0;
1202 }
1203
1204 static int
1205 disable_periodic(struct ehci_ctrl *ctrl)
1206 {
1207         uint32_t cmd;
1208         struct ehci_hcor *hcor = ctrl->hcor;
1209         int ret;
1210
1211         cmd = ehci_readl(&hcor->or_usbcmd);
1212         cmd &= ~CMD_PSE;
1213         ehci_writel(&hcor->or_usbcmd, cmd);
1214
1215         ret = handshake((uint32_t *)&hcor->or_usbsts,
1216                         STS_PSS, 0, 100 * 1000);
1217         if (ret < 0) {
1218                 printf("EHCI failed: timeout when disabling periodic list\n");
1219                 return -ETIMEDOUT;
1220         }
1221         return 0;
1222 }
1223
1224 static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1225                         unsigned long pipe, int queuesize, int elementsize,
1226                         void *buffer, int interval)
1227 {
1228         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1229         struct int_queue *result = NULL;
1230         uint32_t i, toggle;
1231
1232         /*
1233          * Interrupt transfers requiring several transactions are not supported
1234          * because bInterval is ignored.
1235          *
1236          * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1237          * <= PKT_ALIGN if several qTDs are required, while the USB
1238          * specification does not constrain this for interrupt transfers. That
1239          * means that ehci_submit_async() would support interrupt transfers
1240          * requiring several transactions only as long as the transfer size does
1241          * not require more than a single qTD.
1242          */
1243         if (elementsize > usb_maxpacket(dev, pipe)) {
1244                 printf("%s: xfers requiring several transactions are not supported.\n",
1245                        __func__);
1246                 return NULL;
1247         }
1248
1249         debug("Enter create_int_queue\n");
1250         if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1251                 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1252                 return NULL;
1253         }
1254
1255         /* limit to 4 full pages worth of data -
1256          * we can safely fit them in a single TD,
1257          * no matter the alignment
1258          */
1259         if (elementsize >= 16384) {
1260                 debug("too large elements for interrupt transfers\n");
1261                 return NULL;
1262         }
1263
1264         result = malloc(sizeof(*result));
1265         if (!result) {
1266                 debug("ehci intr queue: out of memory\n");
1267                 goto fail1;
1268         }
1269         result->elementsize = elementsize;
1270         result->pipe = pipe;
1271         result->first = memalign(USB_DMA_MINALIGN,
1272                                  sizeof(struct QH) * queuesize);
1273         if (!result->first) {
1274                 debug("ehci intr queue: out of memory\n");
1275                 goto fail2;
1276         }
1277         result->current = result->first;
1278         result->last = result->first + queuesize - 1;
1279         result->tds = memalign(USB_DMA_MINALIGN,
1280                                sizeof(struct qTD) * queuesize);
1281         if (!result->tds) {
1282                 debug("ehci intr queue: out of memory\n");
1283                 goto fail3;
1284         }
1285         memset(result->first, 0, sizeof(struct QH) * queuesize);
1286         memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1287
1288         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1289
1290         for (i = 0; i < queuesize; i++) {
1291                 struct QH *qh = result->first + i;
1292                 struct qTD *td = result->tds + i;
1293                 void **buf = &qh->buffer;
1294
1295                 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
1296                 if (i == queuesize - 1)
1297                         qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1298
1299                 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
1300                 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1301                 qh->qh_endpt1 =
1302                         cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
1303                         (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1304                         (1 << 14) |
1305                         QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1306                         (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
1307                         (usb_pipedevice(pipe) << 0));
1308                 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1309                         (1 << 0)); /* S-mask: microframe 0 */
1310                 if (dev->speed == USB_SPEED_LOW ||
1311                                 dev->speed == USB_SPEED_FULL) {
1312                         /* C-mask: microframes 2-4 */
1313                         qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
1314                 }
1315                 ehci_update_endpt2_dev_n_port(dev, qh);
1316
1317                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1318                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1319                 debug("communication direction is '%s'\n",
1320                       usb_pipein(pipe) ? "in" : "out");
1321                 td->qt_token = cpu_to_hc32(
1322                         QT_TOKEN_DT(toggle) |
1323                         (elementsize << 16) |
1324                         ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
1325                         0x80); /* active */
1326                 td->qt_buffer[0] =
1327                     cpu_to_hc32((unsigned long)buffer + i * elementsize);
1328                 td->qt_buffer[1] =
1329                     cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1330                 td->qt_buffer[2] =
1331                     cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1332                 td->qt_buffer[3] =
1333                     cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1334                 td->qt_buffer[4] =
1335                     cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
1336
1337                 *buf = buffer + i * elementsize;
1338                 toggle ^= 1;
1339         }
1340
1341         flush_dcache_range((unsigned long)buffer,
1342                            ALIGN_END_ADDR(char, buffer,
1343                                           queuesize * elementsize));
1344         flush_dcache_range((unsigned long)result->first,
1345                            ALIGN_END_ADDR(struct QH, result->first,
1346                                           queuesize));
1347         flush_dcache_range((unsigned long)result->tds,
1348                            ALIGN_END_ADDR(struct qTD, result->tds,
1349                                           queuesize));
1350
1351         if (ctrl->periodic_schedules > 0) {
1352                 if (disable_periodic(ctrl) < 0) {
1353                         debug("FATAL: periodic should never fail, but did");
1354                         goto fail3;
1355                 }
1356         }
1357
1358         /* hook up to periodic list */
1359         struct QH *list = &ctrl->periodic_queue;
1360         result->last->qh_link = list->qh_link;
1361         list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
1362
1363         flush_dcache_range((unsigned long)result->last,
1364                            ALIGN_END_ADDR(struct QH, result->last, 1));
1365         flush_dcache_range((unsigned long)list,
1366                            ALIGN_END_ADDR(struct QH, list, 1));
1367
1368         if (enable_periodic(ctrl) < 0) {
1369                 debug("FATAL: periodic should never fail, but did");
1370                 goto fail3;
1371         }
1372         ctrl->periodic_schedules++;
1373
1374         debug("Exit create_int_queue\n");
1375         return result;
1376 fail3:
1377         if (result->tds)
1378                 free(result->tds);
1379 fail2:
1380         if (result->first)
1381                 free(result->first);
1382         if (result)
1383                 free(result);
1384 fail1:
1385         return NULL;
1386 }
1387
1388 static void *_ehci_poll_int_queue(struct usb_device *dev,
1389                                   struct int_queue *queue)
1390 {
1391         struct QH *cur = queue->current;
1392         struct qTD *cur_td;
1393         uint32_t token, toggle;
1394         unsigned long pipe = queue->pipe;
1395
1396         /* depleted queue */
1397         if (cur == NULL) {
1398                 debug("Exit poll_int_queue with completed queue\n");
1399                 return NULL;
1400         }
1401         /* still active */
1402         cur_td = &queue->tds[queue->current - queue->first];
1403         invalidate_dcache_range((unsigned long)cur_td,
1404                                 ALIGN_END_ADDR(struct qTD, cur_td, 1));
1405         token = hc32_to_cpu(cur_td->qt_token);
1406         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1407                 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
1408                 return NULL;
1409         }
1410
1411         toggle = QT_TOKEN_GET_DT(token);
1412         usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1413
1414         if (!(cur->qh_link & QH_LINK_TERMINATE))
1415                 queue->current++;
1416         else
1417                 queue->current = NULL;
1418
1419         invalidate_dcache_range((unsigned long)cur->buffer,
1420                                 ALIGN_END_ADDR(char, cur->buffer,
1421                                                queue->elementsize));
1422
1423         debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1424               token, cur, queue->first);
1425         return cur->buffer;
1426 }
1427
1428 /* Do not free buffers associated with QHs, they're owned by someone else */
1429 static int _ehci_destroy_int_queue(struct usb_device *dev,
1430                                    struct int_queue *queue)
1431 {
1432         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1433         int result = -1;
1434         unsigned long timeout;
1435
1436         if (disable_periodic(ctrl) < 0) {
1437                 debug("FATAL: periodic should never fail, but did");
1438                 goto out;
1439         }
1440         ctrl->periodic_schedules--;
1441
1442         struct QH *cur = &ctrl->periodic_queue;
1443         timeout = get_timer(0) + 500; /* abort after 500ms */
1444         while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
1445                 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1446                 if (NEXT_QH(cur) == queue->first) {
1447                         debug("found candidate. removing from chain\n");
1448                         cur->qh_link = queue->last->qh_link;
1449                         flush_dcache_range((unsigned long)cur,
1450                                            ALIGN_END_ADDR(struct QH, cur, 1));
1451                         result = 0;
1452                         break;
1453                 }
1454                 cur = NEXT_QH(cur);
1455                 if (get_timer(0) > timeout) {
1456                         printf("Timeout destroying interrupt endpoint queue\n");
1457                         result = -1;
1458                         goto out;
1459                 }
1460         }
1461
1462         if (ctrl->periodic_schedules > 0) {
1463                 result = enable_periodic(ctrl);
1464                 if (result < 0)
1465                         debug("FATAL: periodic should never fail, but did");
1466         }
1467
1468 out:
1469         free(queue->tds);
1470         free(queue->first);
1471         free(queue);
1472
1473         return result;
1474 }
1475
1476 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1477                                 void *buffer, int length, int interval,
1478                                 bool nonblock)
1479 {
1480         void *backbuffer;
1481         struct int_queue *queue;
1482         unsigned long timeout;
1483         int result = 0, ret;
1484
1485         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1486               dev, pipe, buffer, length, interval);
1487
1488         queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
1489         if (!queue)
1490                 return -1;
1491
1492         timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
1493         while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
1494                 if (get_timer(0) > timeout) {
1495                         printf("Timeout poll on interrupt endpoint\n");
1496                         result = -ETIMEDOUT;
1497                         break;
1498                 }
1499
1500         if (backbuffer != buffer) {
1501                 debug("got wrong buffer back (%p instead of %p)\n",
1502                       backbuffer, buffer);
1503                 return -EINVAL;
1504         }
1505
1506         ret = _ehci_destroy_int_queue(dev, queue);
1507         if (ret < 0)
1508                 return ret;
1509
1510         /* everything worked out fine */
1511         return result;
1512 }
1513
1514 #if !CONFIG_IS_ENABLED(DM_USB)
1515 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1516                             void *buffer, int length)
1517 {
1518         return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1519 }
1520
1521 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1522                    int length, struct devrequest *setup)
1523 {
1524         return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1525 }
1526
1527 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1528                    void *buffer, int length, int interval, bool nonblock)
1529 {
1530         return _ehci_submit_int_msg(dev, pipe, buffer, length, interval,
1531                                     nonblock);
1532 }
1533
1534 struct int_queue *create_int_queue(struct usb_device *dev,
1535                 unsigned long pipe, int queuesize, int elementsize,
1536                 void *buffer, int interval)
1537 {
1538         return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1539                                       buffer, interval);
1540 }
1541
1542 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1543 {
1544         return _ehci_poll_int_queue(dev, queue);
1545 }
1546
1547 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1548 {
1549         return _ehci_destroy_int_queue(dev, queue);
1550 }
1551 #endif
1552
1553 #if CONFIG_IS_ENABLED(DM_USB)
1554 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1555                                    unsigned long pipe, void *buffer, int length,
1556                                    struct devrequest *setup)
1557 {
1558         debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1559               dev->name, udev, udev->dev->name, udev->portnr);
1560
1561         return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1562 }
1563
1564 static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1565                                 unsigned long pipe, void *buffer, int length)
1566 {
1567         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1568         return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1569 }
1570
1571 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1572                                unsigned long pipe, void *buffer, int length,
1573                                int interval, bool nonblock)
1574 {
1575         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1576         return _ehci_submit_int_msg(udev, pipe, buffer, length, interval,
1577                                     nonblock);
1578 }
1579
1580 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1581                 struct usb_device *udev, unsigned long pipe, int queuesize,
1582                 int elementsize, void *buffer, int interval)
1583 {
1584         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1585         return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1586                                       buffer, interval);
1587 }
1588
1589 static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1590                                  struct int_queue *queue)
1591 {
1592         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1593         return _ehci_poll_int_queue(udev, queue);
1594 }
1595
1596 static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1597                                   struct int_queue *queue)
1598 {
1599         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1600         return _ehci_destroy_int_queue(udev, queue);
1601 }
1602
1603 static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1604 {
1605         /*
1606          * EHCD can handle any transfer length as long as there is enough
1607          * free heap space left, hence set the theoretical max number here.
1608          */
1609         *size = SIZE_MAX;
1610
1611         return 0;
1612 }
1613
1614 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1615                   struct ehci_hcor *hcor, const struct ehci_ops *ops,
1616                   uint tweaks, enum usb_init_type init)
1617 {
1618         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1619         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1620         int ret = -1;
1621
1622         debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1623               dev->name, ctrl, hccr, hcor, init);
1624
1625         if (!ctrl || !hccr || !hcor)
1626                 goto err;
1627
1628         priv->desc_before_addr = true;
1629
1630         ehci_setup_ops(ctrl, ops);
1631         ctrl->hccr = hccr;
1632         ctrl->hcor = hcor;
1633         ctrl->priv = ctrl;
1634
1635         ctrl->init = init;
1636         if (ctrl->init == USB_INIT_DEVICE)
1637                 goto done;
1638
1639         ret = ehci_reset(ctrl);
1640         if (ret)
1641                 goto err;
1642
1643         if (ctrl->ops.init_after_reset) {
1644                 ret = ctrl->ops.init_after_reset(ctrl);
1645                 if (ret)
1646                         goto err;
1647         }
1648
1649         ret = ehci_common_init(ctrl, tweaks);
1650         if (ret)
1651                 goto err;
1652 done:
1653         return 0;
1654 err:
1655         free(ctrl);
1656         debug("%s: failed, ret=%d\n", __func__, ret);
1657         return ret;
1658 }
1659
1660 int ehci_deregister(struct udevice *dev)
1661 {
1662         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1663
1664         if (ctrl->init == USB_INIT_DEVICE)
1665                 return 0;
1666
1667         ehci_shutdown(ctrl);
1668
1669         return 0;
1670 }
1671
1672 struct dm_usb_ops ehci_usb_ops = {
1673         .control = ehci_submit_control_msg,
1674         .bulk = ehci_submit_bulk_msg,
1675         .interrupt = ehci_submit_int_msg,
1676         .create_int_queue = ehci_create_int_queue,
1677         .poll_int_queue = ehci_poll_int_queue,
1678         .destroy_int_queue = ehci_destroy_int_queue,
1679         .get_max_xfer_size  = ehci_get_max_xfer_size,
1680 };
1681
1682 #endif
1683
1684 #ifdef CONFIG_PHY
1685 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1686 {
1687         int ret;
1688
1689         if (!phy)
1690                 return 0;
1691
1692         ret = generic_phy_get_by_index(dev, index, phy);
1693         if (ret) {
1694                 if (ret != -ENOENT) {
1695                         dev_err(dev, "failed to get usb phy\n");
1696                         return ret;
1697                 }
1698         } else {
1699                 ret = generic_phy_init(phy);
1700                 if (ret) {
1701                         dev_err(dev, "failed to init usb phy\n");
1702                         return ret;
1703                 }
1704
1705                 ret = generic_phy_power_on(phy);
1706                 if (ret) {
1707                         dev_err(dev, "failed to power on usb phy\n");
1708                         return generic_phy_exit(phy);
1709                 }
1710         }
1711
1712         return 0;
1713 }
1714
1715 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1716 {
1717         int ret = 0;
1718
1719         if (!phy)
1720                 return 0;
1721
1722         if (generic_phy_valid(phy)) {
1723                 ret = generic_phy_power_off(phy);
1724                 if (ret) {
1725                         dev_err(dev, "failed to power off usb phy\n");
1726                         return ret;
1727                 }
1728
1729                 ret = generic_phy_exit(phy);
1730                 if (ret) {
1731                         dev_err(dev, "failed to power off usb phy\n");
1732                         return ret;
1733                 }
1734         }
1735
1736         return 0;
1737 }
1738 #else
1739 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1740 {
1741         return 0;
1742 }
1743
1744 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1745 {
1746         return 0;
1747 }
1748 #endif