drivers/usb/host/ehci-hcd.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*-
   3  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   4  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   5  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   6  *
   7  * All rights reserved.
   8  */
   9 #include <common.h>
  10 #include <cpu_func.h>
  11 #include <dm.h>
  12 #include <errno.h>
  13 #include <log.h>
  14 #include <asm/byteorder.h>
  15 #include <asm/cache.h>
  16 #include <asm/unaligned.h>
  17 #include <usb.h>
  18 #include <asm/io.h>
  19 #include <malloc.h>
  20 #include <memalign.h>
  21 #include <watchdog.h>
  22 #include <dm/device_compat.h>
  23 #include <linux/compiler.h>
  24
  25 #include "ehci.h"
  26
  27 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
  28 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  29 #endif
  30
  31 /*
  32  * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
  33  * Let's time out after 8 to have a little safety margin on top of that.
  34  */
  35 #define HCHALT_TIMEOUT (8 * 1000)
  36
  37 #if !CONFIG_IS_ENABLED(DM_USB)
  38 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
  39 #endif
  40
  41 #define ALIGN_END_ADDR(type, ptr, size)                 \
  42         ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
  43
  44 static struct descriptor {
  45         struct usb_hub_descriptor hub;
  46         struct usb_device_descriptor device;
  47         struct usb_linux_config_descriptor config;
  48         struct usb_linux_interface_descriptor interface;
  49         struct usb_endpoint_descriptor endpoint;
  50 }  __attribute__ ((packed)) descriptor = {
  51         {
  52                 0x8,            /* bDescLength */
  53                 0x29,           /* bDescriptorType: hub descriptor */
  54                 2,              /* bNrPorts -- runtime modified */
  55                 0,              /* wHubCharacteristics */
  56                 10,             /* bPwrOn2PwrGood */
  57                 0,              /* bHubCntrCurrent */
  58                 {               /* Device removable */
  59                 }               /* at most 7 ports! XXX */
  60         },
  61         {
  62                 0x12,           /* bLength */
  63                 1,              /* bDescriptorType: UDESC_DEVICE */
  64                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  65                 9,              /* bDeviceClass: UDCLASS_HUB */
  66                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  67                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  68                 64,             /* bMaxPacketSize: 64 bytes */
  69                 0x0000,         /* idVendor */
  70                 0x0000,         /* idProduct */
  71                 cpu_to_le16(0x0100), /* bcdDevice */
  72                 1,              /* iManufacturer */
  73                 2,              /* iProduct */
  74                 0,              /* iSerialNumber */
  75                 1               /* bNumConfigurations: 1 */
  76         },
  77         {
  78                 0x9,
  79                 2,              /* bDescriptorType: UDESC_CONFIG */
  80                 cpu_to_le16(0x19),
  81                 1,              /* bNumInterface */
  82                 1,              /* bConfigurationValue */
  83                 0,              /* iConfiguration */
  84                 0x40,           /* bmAttributes: UC_SELF_POWER */
  85                 0               /* bMaxPower */
  86         },
  87         {
  88                 0x9,            /* bLength */
  89                 4,              /* bDescriptorType: UDESC_INTERFACE */
  90                 0,              /* bInterfaceNumber */
  91                 0,              /* bAlternateSetting */
  92                 1,              /* bNumEndpoints */
  93                 9,              /* bInterfaceClass: UICLASS_HUB */
  94                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  95                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  96                 0               /* iInterface */
  97         },
  98         {
  99                 0x7,            /* bLength */
 100                 5,              /* bDescriptorType: UDESC_ENDPOINT */
 101                 0x81,           /* bEndpointAddress:
 102                                  * UE_DIR_IN | EHCI_INTR_ENDPT
 103                                  */
 104                 3,              /* bmAttributes: UE_INTERRUPT */
 105                 8,              /* wMaxPacketSize */
 106                 255             /* bInterval */
 107         },
 108 };
 109
 110 #if defined(CONFIG_EHCI_IS_TDI)
 111 #define ehci_is_TDI()   (1)
 112 #else
 113 #define ehci_is_TDI()   (0)
 114 #endif
 115
 116 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 117 {
 118 #if CONFIG_IS_ENABLED(DM_USB)
 119         return dev_get_priv(usb_get_bus(udev->dev));
 120 #else
 121         return udev->controller;
 122 #endif
 123 }
 124
 125 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 126 {
 127         return PORTSC_PSPD(reg);
 128 }
 129
 130 static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 131 {
 132         uint32_t tmp;
 133         uint32_t *reg_ptr;
 134
 135         reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
 136         tmp = ehci_readl(reg_ptr);
 137         tmp |= USBMODE_CM_HC;
 138 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 139         tmp |= USBMODE_BE;
 140 #else
 141         tmp &= ~USBMODE_BE;
 142 #endif
 143         ehci_writel(reg_ptr, tmp);
 144 }
 145
 146 static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 147                                uint32_t *reg)
 148 {
 149         mdelay(50);
 150 }
 151
 152 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
 153 {
 154         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 155
 156         if (port < 0 || port >= max_ports) {
 157                 /* Printing the message would cause a scan failure! */
 158                 debug("The request port(%u) exceeds maximum port number\n",
 159                       port);
 160                 return NULL;
 161         }
 162
 163         return (uint32_t *)&ctrl->hcor->or_portsc[port];
 164 }
 165
 166 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 167 {
 168         uint32_t result;
 169         do {
 170                 result = ehci_readl(ptr);
 171                 udelay(5);
 172                 if (result == ~(uint32_t)0)
 173                         return -1;
 174                 result &= mask;
 175                 if (result == done)
 176                         return 0;
 177                 usec--;
 178         } while (usec > 0);
 179         return -1;
 180 }
 181
 182 static int ehci_reset(struct ehci_ctrl *ctrl)
 183 {
 184         uint32_t cmd;
 185         int ret = 0;
 186
 187         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 188         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
 189         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 190         ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
 191                         CMD_RESET, 0, 250 * 1000);
 192         if (ret < 0) {
 193                 printf("EHCI fail to reset\n");
 194                 goto out;
 195         }
 196
 197         if (ehci_is_TDI())
 198                 ctrl->ops.set_usb_mode(ctrl);
 199
 200 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
 201         cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
 202         cmd &= ~TXFIFO_THRESH_MASK;
 203         cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
 204         ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
 205 #endif
 206 out:
 207         return ret;
 208 }
 209
 210 static int ehci_shutdown(struct ehci_ctrl *ctrl)
 211 {
 212         int i, ret = 0;
 213         uint32_t cmd, reg;
 214         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 215
 216         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 217         /* If not run, directly return */
 218         if (!(cmd & CMD_RUN))
 219                 return 0;
 220         cmd &= ~(CMD_PSE | CMD_ASE);
 221         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 222         ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
 223                 100 * 1000);
 224
 225         if (!ret) {
 226                 for (i = 0; i < max_ports; i++) {
 227                         reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
 228                         reg |= EHCI_PS_SUSP;
 229                         ehci_writel(&ctrl->hcor->or_portsc[i], reg);
 230                 }
 231
 232                 cmd &= ~CMD_RUN;
 233                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 234                 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
 235                         HCHALT_TIMEOUT);
 236         }
 237
 238         if (ret)
 239                 puts("EHCI failed to shut down host controller.\n");
 240
 241         return ret;
 242 }
 243
 244 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 245 {
 246         uint32_t delta, next;
 247         unsigned long addr = (unsigned long)buf;
 248         int idx;
 249
 250         if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
 251                 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
 252
 253         flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
 254
 255         idx = 0;
 256         while (idx < QT_BUFFER_CNT) {
 257                 td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
 258                 td->qt_buffer_hi[idx] = 0;
 259                 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
 260                 delta = next - addr;
 261                 if (delta >= sz)
 262                         break;
 263                 sz -= delta;
 264                 addr = next;
 265                 idx++;
 266         }
 267
 268         if (idx == QT_BUFFER_CNT) {
 269                 printf("out of buffer pointers (%zu bytes left)\n", sz);
 270                 return -1;
 271         }
 272
 273         return 0;
 274 }
 275
 276 static inline u8 ehci_encode_speed(enum usb_device_speed speed)
 277 {
 278         #define QH_HIGH_SPEED   2
 279         #define QH_FULL_SPEED   0
 280         #define QH_LOW_SPEED    1
 281         if (speed == USB_SPEED_HIGH)
 282                 return QH_HIGH_SPEED;
 283         if (speed == USB_SPEED_LOW)
 284                 return QH_LOW_SPEED;
 285         return QH_FULL_SPEED;
 286 }
 287
 288 static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
 289                                           struct QH *qh)
 290 {
 291         uint8_t portnr = 0;
 292         uint8_t hubaddr = 0;
 293
 294         if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
 295                 return;
 296
 297         usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
 298
 299         qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
 300                                      QH_ENDPT2_HUBADDR(hubaddr));
 301 }
 302
 303 static int ehci_enable_async(struct ehci_ctrl *ctrl)
 304 {
 305         u32 cmd;
 306         int ret;
 307
 308         /* Enable async. schedule. */
 309         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 310         if (cmd & CMD_ASE)
 311                 return 0;
 312
 313         cmd |= CMD_ASE;
 314         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 315
 316         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
 317                         100 * 1000);
 318         if (ret < 0)
 319                 printf("EHCI fail timeout STS_ASS set\n");
 320
 321         return ret;
 322 }
 323
 324 static int ehci_disable_async(struct ehci_ctrl *ctrl)
 325 {
 326         u32 cmd;
 327         int ret;
 328
 329         if (ctrl->async_locked)
 330                 return 0;
 331
 332         /* Disable async schedule. */
 333         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 334         if (!(cmd & CMD_ASE))
 335                 return 0;
 336
 337         cmd &= ~CMD_ASE;
 338         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 339
 340         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
 341                         100 * 1000);
 342         if (ret < 0)
 343                 printf("EHCI fail timeout STS_ASS reset\n");
 344
 345         return ret;
 346 }
 347
 348 static int
 349 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 350                    int length, struct devrequest *req)
 351 {
 352         ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
 353         struct qTD *qtd;
 354         int qtd_count = 0;
 355         int qtd_counter = 0;
 356         volatile struct qTD *vtd;
 357         unsigned long ts;
 358         uint32_t *tdp;
 359         uint32_t endpt, maxpacket, token, usbsts, qhtoken;
 360         uint32_t c, toggle;
 361         int timeout;
 362         int ret = 0;
 363         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 364
 365         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 366               buffer, length, req);
 367         if (req != NULL)
 368                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 369                       req->request, req->request,
 370                       req->requesttype, req->requesttype,
 371                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 372                       le16_to_cpu(req->index));
 373
 374 #define PKT_ALIGN       512
 375         /*
 376          * The USB transfer is split into qTD transfers. Eeach qTD transfer is
 377          * described by a transfer descriptor (the qTD). The qTDs form a linked
 378          * list with a queue head (QH).
 379          *
 380          * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
 381          * have its beginning in a qTD transfer and its end in the following
 382          * one, so the qTD transfer lengths have to be chosen accordingly.
 383          *
 384          * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
 385          * single pages. The first data buffer can start at any offset within a
 386          * page (not considering the cache-line alignment issues), while the
 387          * following buffers must be page-aligned. There is no alignment
 388          * constraint on the size of a qTD transfer.
 389          */
 390         if (req != NULL)
 391                 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
 392                 qtd_count += 1 + 1;
 393         if (length > 0 || req == NULL) {
 394                 /*
 395                  * Determine the qTD transfer size that will be used for the
 396                  * data payload (not considering the first qTD transfer, which
 397                  * may be longer or shorter, and the final one, which may be
 398                  * shorter).
 399                  *
 400                  * In order to keep each packet within a qTD transfer, the qTD
 401                  * transfer size is aligned to PKT_ALIGN, which is a multiple of
 402                  * wMaxPacketSize (except in some cases for interrupt transfers,
 403                  * see comment in submit_int_msg()).
 404                  *
 405                  * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
 406                  * QT_BUFFER_CNT full pages will be used.
 407                  */
 408                 int xfr_sz = QT_BUFFER_CNT;
 409                 /*
 410                  * However, if the input buffer is not aligned to PKT_ALIGN, the
 411                  * qTD transfer size will be one page shorter, and the first qTD
 412                  * data buffer of each transfer will be page-unaligned.
 413                  */
 414                 if ((unsigned long)buffer & (PKT_ALIGN - 1))
 415                         xfr_sz--;
 416                 /* Convert the qTD transfer size to bytes. */
 417                 xfr_sz *= EHCI_PAGE_SIZE;
 418                 /*
 419                  * Approximate by excess the number of qTDs that will be
 420                  * required for the data payload. The exact formula is way more
 421                  * complicated and saves at most 2 qTDs, i.e. a total of 128
 422                  * bytes.
 423                  */
 424                 qtd_count += 2 + length / xfr_sz;
 425         }
 426 /*
 427  * Threshold value based on the worst-case total size of the allocated qTDs for
 428  * a mass-storage transfer of 65535 blocks of 512 bytes.
 429  */
 430 #if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
 431 #warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
 432 #endif
 433         qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
 434         if (qtd == NULL) {
 435                 printf("unable to allocate TDs\n");
 436                 return -1;
 437         }
 438
 439         memset(qh, 0, sizeof(struct QH));
 440         memset(qtd, 0, qtd_count * sizeof(*qtd));
 441
 442         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 443
 444         /*
 445          * Setup QH (3.6 in ehci-r10.pdf)
 446          *
 447          *   qh_link ................. 03-00 H
 448          *   qh_endpt1 ............... 07-04 H
 449          *   qh_endpt2 ............... 0B-08 H
 450          * - qh_curtd
 451          *   qh_overlay.qt_next ...... 13-10 H
 452          * - qh_overlay.qt_altnext
 453          */
 454         qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 455         c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
 456         maxpacket = usb_maxpacket(dev, pipe);
 457         endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
 458                 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
 459                 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
 460                 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
 461                 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
 462
 463         /* Force FS for fsl HS quirk */
 464         if (!ctrl->has_fsl_erratum_a005275)
 465                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
 466         else
 467                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
 468
 469         qh->qh_endpt1 = cpu_to_hc32(endpt);
 470         endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
 471         qh->qh_endpt2 = cpu_to_hc32(endpt);
 472         ehci_update_endpt2_dev_n_port(dev, qh);
 473         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 474         qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 475
 476         tdp = &qh->qh_overlay.qt_next;
 477         if (req != NULL) {
 478                 /*
 479                  * Setup request qTD (3.5 in ehci-r10.pdf)
 480                  *
 481                  *   qt_next ................ 03-00 H
 482                  *   qt_altnext ............. 07-04 H
 483                  *   qt_token ............... 0B-08 H
 484                  *
 485                  *   [ buffer, buffer_hi ] loaded with "req".
 486                  */
 487                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 488                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 489                 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
 490                         QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 491                         QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
 492                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 493                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 494                 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
 495                         printf("unable to construct SETUP TD\n");
 496                         goto fail;
 497                 }
 498                 /* Update previous qTD! */
 499                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 500                 tdp = &qtd[qtd_counter++].qt_next;
 501                 toggle = 1;
 502         }
 503
 504         if (length > 0 || req == NULL) {
 505                 uint8_t *buf_ptr = buffer;
 506                 int left_length = length;
 507
 508                 do {
 509                         /*
 510                          * Determine the size of this qTD transfer. By default,
 511                          * QT_BUFFER_CNT full pages can be used.
 512                          */
 513                         int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
 514                         /*
 515                          * However, if the input buffer is not page-aligned, the
 516                          * portion of the first page before the buffer start
 517                          * offset within that page is unusable.
 518                          */
 519                         xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
 520                         /*
 521                          * In order to keep each packet within a qTD transfer,
 522                          * align the qTD transfer size to PKT_ALIGN.
 523                          */
 524                         xfr_bytes &= ~(PKT_ALIGN - 1);
 525                         /*
 526                          * This transfer may be shorter than the available qTD
 527                          * transfer size that has just been computed.
 528                          */
 529                         xfr_bytes = min(xfr_bytes, left_length);
 530
 531                         /*
 532                          * Setup request qTD (3.5 in ehci-r10.pdf)
 533                          *
 534                          *   qt_next ................ 03-00 H
 535                          *   qt_altnext ............. 07-04 H
 536                          *   qt_token ............... 0B-08 H
 537                          *
 538                          *   [ buffer, buffer_hi ] loaded with "buffer".
 539                          */
 540                         qtd[qtd_counter].qt_next =
 541                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 542                         qtd[qtd_counter].qt_altnext =
 543                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 544                         token = QT_TOKEN_DT(toggle) |
 545                                 QT_TOKEN_TOTALBYTES(xfr_bytes) |
 546                                 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
 547                                 QT_TOKEN_CERR(3) |
 548                                 QT_TOKEN_PID(usb_pipein(pipe) ?
 549                                         QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
 550                                 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 551                         qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 552                         if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
 553                                                 xfr_bytes)) {
 554                                 printf("unable to construct DATA TD\n");
 555                                 goto fail;
 556                         }
 557                         /* Update previous qTD! */
 558                         *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 559                         tdp = &qtd[qtd_counter++].qt_next;
 560                         /*
 561                          * Data toggle has to be adjusted since the qTD transfer
 562                          * size is not always an even multiple of
 563                          * wMaxPacketSize.
 564                          */
 565                         if ((xfr_bytes / maxpacket) & 1)
 566                                 toggle ^= 1;
 567                         buf_ptr += xfr_bytes;
 568                         left_length -= xfr_bytes;
 569                 } while (left_length > 0);
 570         }
 571
 572         if (req != NULL) {
 573                 /*
 574                  * Setup request qTD (3.5 in ehci-r10.pdf)
 575                  *
 576                  *   qt_next ................ 03-00 H
 577                  *   qt_altnext ............. 07-04 H
 578                  *   qt_token ............... 0B-08 H
 579                  */
 580                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 581                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 582                 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
 583                         QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 584                         QT_TOKEN_PID(usb_pipein(pipe) ?
 585                                 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
 586                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 587                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 588                 /* Update previous qTD! */
 589                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 590                 tdp = &qtd[qtd_counter++].qt_next;
 591         }
 592
 593         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
 594
 595         /* Flush dcache */
 596         flush_dcache_range((unsigned long)&ctrl->qh_list,
 597                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 598         flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
 599         flush_dcache_range((unsigned long)qtd,
 600                            ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 601
 602         usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
 603         ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
 604
 605         ret = ehci_enable_async(ctrl);
 606         if (ret)
 607                 goto fail;
 608
 609         /* Wait for TDs to be processed. */
 610         ts = get_timer(0);
 611         vtd = &qtd[qtd_counter - 1];
 612         timeout = USB_TIMEOUT_MS(pipe);
 613         do {
 614                 /* Invalidate dcache */
 615                 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
 616                         ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 617                 invalidate_dcache_range((unsigned long)qh,
 618                         ALIGN_END_ADDR(struct QH, qh, 1));
 619                 invalidate_dcache_range((unsigned long)qtd,
 620                         ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 621
 622                 token = hc32_to_cpu(vtd->qt_token);
 623                 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
 624                         break;
 625                 WATCHDOG_RESET();
 626         } while (get_timer(ts) < timeout);
 627         qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token);
 628
 629         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 630         flush_dcache_range((unsigned long)&ctrl->qh_list,
 631                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 632
 633         /*
 634          * Invalidate the memory area occupied by buffer
 635          * Don't try to fix the buffer alignment, if it isn't properly
 636          * aligned it's upper layer's fault so let invalidate_dcache_range()
 637          * vow about it. But we have to fix the length as it's actual
 638          * transfer length and can be unaligned. This is potentially
 639          * dangerous operation, it's responsibility of the calling
 640          * code to make sure enough space is reserved.
 641          */
 642         if (buffer != NULL && length > 0)
 643                 invalidate_dcache_range((unsigned long)buffer,
 644                         ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 645
 646         /* Check that the TD processing happened */
 647         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
 648                 printf("EHCI timed out on TD - token=%#x\n", token);
 649
 650         ret = ehci_disable_async(ctrl);
 651         if (ret)
 652                 goto fail;
 653
 654         if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) {
 655                 debug("TOKEN=%#x\n", qhtoken);
 656                 switch (QT_TOKEN_GET_STATUS(qhtoken) &
 657                         ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
 658                 case 0:
 659                         toggle = QT_TOKEN_GET_DT(qhtoken);
 660                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 661                                        usb_pipeout(pipe), toggle);
 662                         dev->status = 0;
 663                         break;
 664                 case QT_TOKEN_STATUS_HALTED:
 665                         dev->status = USB_ST_STALLED;
 666                         break;
 667                 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
 668                 case QT_TOKEN_STATUS_DATBUFERR:
 669                         dev->status = USB_ST_BUF_ERR;
 670                         break;
 671                 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
 672                 case QT_TOKEN_STATUS_BABBLEDET:
 673                         dev->status = USB_ST_BABBLE_DET;
 674                         break;
 675                 default:
 676                         dev->status = USB_ST_CRC_ERR;
 677                         if (QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_HALTED)
 678                                 dev->status |= USB_ST_STALLED;
 679                         break;
 680                 }
 681                 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken);
 682         } else {
 683                 dev->act_len = 0;
 684 #ifndef CONFIG_USB_EHCI_FARADAY
 685                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 686                       dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
 687                       ehci_readl(&ctrl->hcor->or_portsc[0]),
 688                       ehci_readl(&ctrl->hcor->or_portsc[1]));
 689 #endif
 690         }
 691
 692         free(qtd);
 693         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 694
 695 fail:
 696         free(qtd);
 697         return -1;
 698 }
 699
 700 static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
 701                             void *buffer, int length, struct devrequest *req)
 702 {
 703         uint8_t tmpbuf[4];
 704         u16 typeReq;
 705         void *srcptr = NULL;
 706         int len, srclen;
 707         uint32_t reg;
 708         uint32_t *status_reg;
 709         int port = le16_to_cpu(req->index) & 0xff;
 710         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 711
 712         srclen = 0;
 713
 714         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 715               req->request, req->request,
 716               req->requesttype, req->requesttype,
 717               le16_to_cpu(req->value), le16_to_cpu(req->index));
 718
 719         typeReq = req->request | req->requesttype << 8;
 720
 721         switch (typeReq) {
 722         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 723         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 724         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 725                 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
 726                 if (!status_reg)
 727                         return -1;
 728                 break;
 729         default:
 730                 status_reg = NULL;
 731                 break;
 732         }
 733
 734         switch (typeReq) {
 735         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 736                 switch (le16_to_cpu(req->value) >> 8) {
 737                 case USB_DT_DEVICE:
 738                         debug("USB_DT_DEVICE request\n");
 739                         srcptr = &descriptor.device;
 740                         srclen = descriptor.device.bLength;
 741                         break;
 742                 case USB_DT_CONFIG:
 743                         debug("USB_DT_CONFIG config\n");
 744                         srcptr = &descriptor.config;
 745                         srclen = descriptor.config.bLength +
 746                                         descriptor.interface.bLength +
 747                                         descriptor.endpoint.bLength;
 748                         break;
 749                 case USB_DT_STRING:
 750                         debug("USB_DT_STRING config\n");
 751                         switch (le16_to_cpu(req->value) & 0xff) {
 752                         case 0: /* Language */
 753                                 srcptr = "\4\3\1\0";
 754                                 srclen = 4;
 755                                 break;
 756                         case 1: /* Vendor */
 757                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 758                                 srclen = 14;
 759                                 break;
 760                         case 2: /* Product */
 761                                 srcptr = "\52\3E\0H\0C\0I\0 "
 762                                          "\0H\0o\0s\0t\0 "
 763                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 764                                 srclen = 42;
 765                                 break;
 766                         default:
 767                                 debug("unknown value DT_STRING %x\n",
 768                                         le16_to_cpu(req->value));
 769                                 goto unknown;
 770                         }
 771                         break;
 772                 default:
 773                         debug("unknown value %x\n", le16_to_cpu(req->value));
 774                         goto unknown;
 775                 }
 776                 break;
 777         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 778                 switch (le16_to_cpu(req->value) >> 8) {
 779                 case USB_DT_HUB:
 780                         debug("USB_DT_HUB config\n");
 781                         srcptr = &descriptor.hub;
 782                         srclen = descriptor.hub.bLength;
 783                         break;
 784                 default:
 785                         debug("unknown value %x\n", le16_to_cpu(req->value));
 786                         goto unknown;
 787                 }
 788                 break;
 789         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 790                 debug("USB_REQ_SET_ADDRESS\n");
 791                 ctrl->rootdev = le16_to_cpu(req->value);
 792                 break;
 793         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 794                 debug("USB_REQ_SET_CONFIGURATION\n");
 795                 /* Nothing to do */
 796                 break;
 797         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 798                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 799                 tmpbuf[1] = 0;
 800                 srcptr = tmpbuf;
 801                 srclen = 2;
 802                 break;
 803         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 804                 memset(tmpbuf, 0, 4);
 805                 reg = ehci_readl(status_reg);
 806                 if (reg & EHCI_PS_CS)
 807                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 808                 if (reg & EHCI_PS_PE)
 809                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 810                 if (reg & EHCI_PS_SUSP)
 811                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 812                 if (reg & EHCI_PS_OCA)
 813                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 814                 if (reg & EHCI_PS_PR)
 815                         tmpbuf[0] |= USB_PORT_STAT_RESET;
 816                 if (reg & EHCI_PS_PP)
 817                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 818
 819                 if (ehci_is_TDI()) {
 820                         switch (ctrl->ops.get_port_speed(ctrl, reg)) {
 821                         case PORTSC_PSPD_FS:
 822                                 break;
 823                         case PORTSC_PSPD_LS:
 824                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 825                                 break;
 826                         case PORTSC_PSPD_HS:
 827                         default:
 828                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 829                                 break;
 830                         }
 831                 } else {
 832                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 833                 }
 834
 835                 if (reg & EHCI_PS_CSC)
 836                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 837                 if (reg & EHCI_PS_PEC)
 838                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 839                 if (reg & EHCI_PS_OCC)
 840                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 841                 if (ctrl->portreset & (1 << port))
 842                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 843
 844                 srcptr = tmpbuf;
 845                 srclen = 4;
 846                 break;
 847         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 848                 reg = ehci_readl(status_reg);
 849                 reg &= ~EHCI_PS_CLEAR;
 850                 switch (le16_to_cpu(req->value)) {
 851                 case USB_PORT_FEAT_ENABLE:
 852                         reg |= EHCI_PS_PE;
 853                         ehci_writel(status_reg, reg);
 854                         break;
 855                 case USB_PORT_FEAT_POWER:
 856                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 857                                 reg |= EHCI_PS_PP;
 858                                 ehci_writel(status_reg, reg);
 859                         }
 860                         break;
 861                 case USB_PORT_FEAT_RESET:
 862                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 863                             !ehci_is_TDI() &&
 864                             EHCI_PS_IS_LOWSPEED(reg)) {
 865                                 /* Low speed device, give up ownership. */
 866                                 debug("port %d low speed --> companion\n",
 867                                       port - 1);
 868                                 reg |= EHCI_PS_PO;
 869                                 ehci_writel(status_reg, reg);
 870                                 return -ENXIO;
 871                         } else {
 872                                 int ret;
 873
 874                                 /* Disable chirp for HS erratum */
 875                                 if (ctrl->has_fsl_erratum_a005275)
 876                                         reg |= PORTSC_FSL_PFSC;
 877
 878                                 reg |= EHCI_PS_PR;
 879                                 reg &= ~EHCI_PS_PE;
 880                                 ehci_writel(status_reg, reg);
 881                                 /*
 882                                  * caller must wait, then call GetPortStatus
 883                                  * usb 2.0 specification say 50 ms resets on
 884                                  * root
 885                                  */
 886                                 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
 887
 888                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 889                                 /*
 890                                  * A host controller must terminate the reset
 891                                  * and stabilize the state of the port within
 892                                  * 2 milliseconds
 893                                  */
 894                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
 895                                                 2 * 1000);
 896                                 if (!ret) {
 897                                         reg = ehci_readl(status_reg);
 898                                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
 899                                             == EHCI_PS_CS && !ehci_is_TDI()) {
 900                                                 debug("port %d full speed --> companion\n", port - 1);
 901                                                 reg &= ~EHCI_PS_CLEAR;
 902                                                 reg |= EHCI_PS_PO;
 903                                                 ehci_writel(status_reg, reg);
 904                                                 return -ENXIO;
 905                                         } else {
 906                                                 ctrl->portreset |= 1 << port;
 907                                         }
 908                                 } else {
 909                                         printf("port(%d) reset error\n",
 910                                                port - 1);
 911                                 }
 912                         }
 913                         break;
 914                 case USB_PORT_FEAT_TEST:
 915                         ehci_shutdown(ctrl);
 916                         reg &= ~(0xf << 16);
 917                         reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
 918                         ehci_writel(status_reg, reg);
 919                         break;
 920                 default:
 921                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 922                         goto unknown;
 923                 }
 924                 /* unblock posted writes */
 925                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 926                 break;
 927         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 928                 reg = ehci_readl(status_reg);
 929                 reg &= ~EHCI_PS_CLEAR;
 930                 switch (le16_to_cpu(req->value)) {
 931                 case USB_PORT_FEAT_ENABLE:
 932                         reg &= ~EHCI_PS_PE;
 933                         break;
 934                 case USB_PORT_FEAT_C_ENABLE:
 935                         reg |= EHCI_PS_PE;
 936                         break;
 937                 case USB_PORT_FEAT_POWER:
 938                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
 939                                 reg &= ~EHCI_PS_PP;
 940                         break;
 941                 case USB_PORT_FEAT_C_CONNECTION:
 942                         reg |= EHCI_PS_CSC;
 943                         break;
 944                 case USB_PORT_FEAT_OVER_CURRENT:
 945                         reg |= EHCI_PS_OCC;
 946                         break;
 947                 case USB_PORT_FEAT_C_RESET:
 948                         ctrl->portreset &= ~(1 << port);
 949                         break;
 950                 default:
 951                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 952                         goto unknown;
 953                 }
 954                 ehci_writel(status_reg, reg);
 955                 /* unblock posted write */
 956                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 957                 break;
 958         default:
 959                 debug("Unknown request\n");
 960                 goto unknown;
 961         }
 962
 963         mdelay(1);
 964         len = min3(srclen, (int)le16_to_cpu(req->length), length);
 965         if (srcptr != NULL && len > 0)
 966                 memcpy(buffer, srcptr, len);
 967         else
 968                 debug("Len is 0\n");
 969
 970         dev->act_len = len;
 971         dev->status = 0;
 972         return 0;
 973
 974 unknown:
 975         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
 976               req->requesttype, req->request, le16_to_cpu(req->value),
 977               le16_to_cpu(req->index), le16_to_cpu(req->length));
 978
 979         dev->act_len = 0;
 980         dev->status = USB_ST_STALLED;
 981         return -1;
 982 }
 983
 984 static const struct ehci_ops default_ehci_ops = {
 985         .set_usb_mode           = ehci_set_usbmode,
 986         .get_port_speed         = ehci_get_port_speed,
 987         .powerup_fixup          = ehci_powerup_fixup,
 988         .get_portsc_register    = ehci_get_portsc_register,
 989 };
 990
 991 static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
 992 {
 993         if (!ops) {
 994                 ctrl->ops = default_ehci_ops;
 995         } else {
 996                 ctrl->ops = *ops;
 997                 if (!ctrl->ops.set_usb_mode)
 998                         ctrl->ops.set_usb_mode = ehci_set_usbmode;
 999                 if (!ctrl->ops.get_port_speed)
1000                         ctrl->ops.get_port_speed = ehci_get_port_speed;
1001                 if (!ctrl->ops.powerup_fixup)
1002                         ctrl->ops.powerup_fixup = ehci_powerup_fixup;
1003                 if (!ctrl->ops.get_portsc_register)
1004                         ctrl->ops.get_portsc_register =
1005                                         ehci_get_portsc_register;
1006         }
1007 }
1008
1009 #if !CONFIG_IS_ENABLED(DM_USB)
1010 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
1011 {
1012         struct ehci_ctrl *ctrl = &ehcic[index];
1013
1014         ctrl->priv = priv;
1015         ehci_setup_ops(ctrl, ops);
1016 }
1017
1018 void *ehci_get_controller_priv(int index)
1019 {
1020         return ehcic[index].priv;
1021 }
1022 #endif
1023
1024 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
1025 {
1026         struct QH *qh_list;
1027         struct QH *periodic;
1028         uint32_t reg;
1029         uint32_t cmd;
1030         int i;
1031
1032         /* Set the high address word (aka segment) for 64-bit controller */
1033         if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
1034                 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
1035
1036         qh_list = &ctrl->qh_list;
1037
1038         /* Set head of reclaim list */
1039         memset(qh_list, 0, sizeof(*qh_list));
1040         qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
1041         qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1042                                                 QH_ENDPT1_EPS(USB_SPEED_HIGH));
1043         qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1044         qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1045         qh_list->qh_overlay.qt_token =
1046                         cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
1047
1048         flush_dcache_range((unsigned long)qh_list,
1049                            ALIGN_END_ADDR(struct QH, qh_list, 1));
1050
1051         /* Set async. queue head pointer. */
1052         ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
1053
1054         /*
1055          * Set up periodic list
1056          * Step 1: Parent QH for all periodic transfers.
1057          */
1058         ctrl->periodic_schedules = 0;
1059         periodic = &ctrl->periodic_queue;
1060         memset(periodic, 0, sizeof(*periodic));
1061         periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1062         periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1063         periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1064
1065         flush_dcache_range((unsigned long)periodic,
1066                            ALIGN_END_ADDR(struct QH, periodic, 1));
1067
1068         /*
1069          * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1070          *         In particular, device specifications on polling frequency
1071          *         are disregarded. Keyboards seem to send NAK/NYet reliably
1072          *         when polled with an empty buffer.
1073          *
1074          *         Split Transactions will be spread across microframes using
1075          *         S-mask and C-mask.
1076          */
1077         if (ctrl->periodic_list == NULL)
1078                 ctrl->periodic_list = memalign(4096, 1024 * 4);
1079
1080         if (!ctrl->periodic_list)
1081                 return -ENOMEM;
1082         for (i = 0; i < 1024; i++) {
1083                 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
1084                                                 | QH_LINK_TYPE_QH);
1085         }
1086
1087         flush_dcache_range((unsigned long)ctrl->periodic_list,
1088                            ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
1089                                           1024));
1090
1091         /* Set periodic list base address */
1092         ehci_writel(&ctrl->hcor->or_periodiclistbase,
1093                 (unsigned long)ctrl->periodic_list);
1094
1095         reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
1096         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
1097         debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
1098         /* Port Indicators */
1099         if (HCS_INDICATOR(reg))
1100                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1101                                 | 0x80, &descriptor.hub.wHubCharacteristics);
1102         /* Port Power Control */
1103         if (HCS_PPC(reg))
1104                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1105                                 | 0x01, &descriptor.hub.wHubCharacteristics);
1106
1107         /* Start the host controller. */
1108         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1109         /*
1110          * Philips, Intel, and maybe others need CMD_RUN before the
1111          * root hub will detect new devices (why?); NEC doesn't
1112          */
1113         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1114         cmd |= CMD_RUN;
1115         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
1116
1117         if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1118                 /* take control over the ports */
1119                 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1120                 cmd |= FLAG_CF;
1121                 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1122         }
1123
1124         /* unblock posted write */
1125         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1126         mdelay(5);
1127         reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
1128         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
1129
1130         return 0;
1131 }
1132
1133 #if !CONFIG_IS_ENABLED(DM_USB)
1134 int usb_lowlevel_stop(int index)
1135 {
1136         ehci_shutdown(&ehcic[index]);
1137         return ehci_hcd_stop(index);
1138 }
1139
1140 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1141 {
1142         struct ehci_ctrl *ctrl = &ehcic[index];
1143         uint tweaks = 0;
1144         int rc;
1145
1146         /**
1147          * Set ops to default_ehci_ops, ehci_hcd_init should call
1148          * ehci_set_controller_priv to change any of these function pointers.
1149          */
1150         ctrl->ops = default_ehci_ops;
1151
1152         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1153         if (rc)
1154                 return rc;
1155         if (!ctrl->hccr || !ctrl->hcor)
1156                 return -1;
1157         if (init == USB_INIT_DEVICE)
1158                 goto done;
1159
1160         /* EHCI spec section 4.1 */
1161         if (ehci_reset(ctrl))
1162                 return -1;
1163
1164 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1165         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1166         if (rc)
1167                 return rc;
1168 #endif
1169 #ifdef CONFIG_USB_EHCI_FARADAY
1170         tweaks |= EHCI_TWEAK_NO_INIT_CF;
1171 #endif
1172         rc = ehci_common_init(ctrl, tweaks);
1173         if (rc)
1174                 return rc;
1175
1176         ctrl->rootdev = 0;
1177 done:
1178         *controller = &ehcic[index];
1179         return 0;
1180 }
1181 #endif
1182
1183 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1184                                  void *buffer, int length)
1185 {
1186
1187         if (usb_pipetype(pipe) != PIPE_BULK) {
1188                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1189                 return -1;
1190         }
1191         return ehci_submit_async(dev, pipe, buffer, length, NULL);
1192 }
1193
1194 static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1195                                     void *buffer, int length,
1196                                     struct devrequest *setup)
1197 {
1198         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1199
1200         if (usb_pipetype(pipe) != PIPE_CONTROL) {
1201                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1202                 return -1;
1203         }
1204
1205         if (usb_pipedevice(pipe) == ctrl->rootdev) {
1206                 if (!ctrl->rootdev)
1207                         dev->speed = USB_SPEED_HIGH;
1208                 return ehci_submit_root(dev, pipe, buffer, length, setup);
1209         }
1210         return ehci_submit_async(dev, pipe, buffer, length, setup);
1211 }
1212
1213 struct int_queue {
1214         int elementsize;
1215         unsigned long pipe;
1216         struct QH *first;
1217         struct QH *current;
1218         struct QH *last;
1219         struct qTD *tds;
1220 };
1221
1222 #define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
1223
1224 static int
1225 enable_periodic(struct ehci_ctrl *ctrl)
1226 {
1227         uint32_t cmd;
1228         struct ehci_hcor *hcor = ctrl->hcor;
1229         int ret;
1230
1231         cmd = ehci_readl(&hcor->or_usbcmd);
1232         cmd |= CMD_PSE;
1233         ehci_writel(&hcor->or_usbcmd, cmd);
1234
1235         ret = handshake((uint32_t *)&hcor->or_usbsts,
1236                         STS_PSS, STS_PSS, 100 * 1000);
1237         if (ret < 0) {
1238                 printf("EHCI failed: timeout when enabling periodic list\n");
1239                 return -ETIMEDOUT;
1240         }
1241         udelay(1000);
1242         return 0;
1243 }
1244
1245 static int
1246 disable_periodic(struct ehci_ctrl *ctrl)
1247 {
1248         uint32_t cmd;
1249         struct ehci_hcor *hcor = ctrl->hcor;
1250         int ret;
1251
1252         cmd = ehci_readl(&hcor->or_usbcmd);
1253         cmd &= ~CMD_PSE;
1254         ehci_writel(&hcor->or_usbcmd, cmd);
1255
1256         ret = handshake((uint32_t *)&hcor->or_usbsts,
1257                         STS_PSS, 0, 100 * 1000);
1258         if (ret < 0) {
1259                 printf("EHCI failed: timeout when disabling periodic list\n");
1260                 return -ETIMEDOUT;
1261         }
1262         return 0;
1263 }
1264
1265 static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1266                         unsigned long pipe, int queuesize, int elementsize,
1267                         void *buffer, int interval)
1268 {
1269         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1270         struct int_queue *result = NULL;
1271         uint32_t i, toggle;
1272
1273         /*
1274          * Interrupt transfers requiring several transactions are not supported
1275          * because bInterval is ignored.
1276          *
1277          * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1278          * <= PKT_ALIGN if several qTDs are required, while the USB
1279          * specification does not constrain this for interrupt transfers. That
1280          * means that ehci_submit_async() would support interrupt transfers
1281          * requiring several transactions only as long as the transfer size does
1282          * not require more than a single qTD.
1283          */
1284         if (elementsize > usb_maxpacket(dev, pipe)) {
1285                 printf("%s: xfers requiring several transactions are not supported.\n",
1286                        __func__);
1287                 return NULL;
1288         }
1289
1290         debug("Enter create_int_queue\n");
1291         if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1292                 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1293                 return NULL;
1294         }
1295
1296         /* limit to 4 full pages worth of data -
1297          * we can safely fit them in a single TD,
1298          * no matter the alignment
1299          */
1300         if (elementsize >= 16384) {
1301                 debug("too large elements for interrupt transfers\n");
1302                 return NULL;
1303         }
1304
1305         result = malloc(sizeof(*result));
1306         if (!result) {
1307                 debug("ehci intr queue: out of memory\n");
1308                 goto fail1;
1309         }
1310         result->elementsize = elementsize;
1311         result->pipe = pipe;
1312         result->first = memalign(USB_DMA_MINALIGN,
1313                                  sizeof(struct QH) * queuesize);
1314         if (!result->first) {
1315                 debug("ehci intr queue: out of memory\n");
1316                 goto fail2;
1317         }
1318         result->current = result->first;
1319         result->last = result->first + queuesize - 1;
1320         result->tds = memalign(USB_DMA_MINALIGN,
1321                                sizeof(struct qTD) * queuesize);
1322         if (!result->tds) {
1323                 debug("ehci intr queue: out of memory\n");
1324                 goto fail3;
1325         }
1326         memset(result->first, 0, sizeof(struct QH) * queuesize);
1327         memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1328
1329         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1330
1331         for (i = 0; i < queuesize; i++) {
1332                 struct QH *qh = result->first + i;
1333                 struct qTD *td = result->tds + i;
1334                 void **buf = &qh->buffer;
1335
1336                 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
1337                 if (i == queuesize - 1)
1338                         qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1339
1340                 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
1341                 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1342                 qh->qh_endpt1 =
1343                         cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
1344                         (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1345                         (1 << 14) |
1346                         QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1347                         (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
1348                         (usb_pipedevice(pipe) << 0));
1349                 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1350                         (1 << 0)); /* S-mask: microframe 0 */
1351                 if (dev->speed == USB_SPEED_LOW ||
1352                                 dev->speed == USB_SPEED_FULL) {
1353                         /* C-mask: microframes 2-4 */
1354                         qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
1355                 }
1356                 ehci_update_endpt2_dev_n_port(dev, qh);
1357
1358                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1359                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1360                 debug("communication direction is '%s'\n",
1361                       usb_pipein(pipe) ? "in" : "out");
1362                 td->qt_token = cpu_to_hc32(
1363                         QT_TOKEN_DT(toggle) |
1364                         (elementsize << 16) |
1365                         ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
1366                         0x80); /* active */
1367                 td->qt_buffer[0] =
1368                     cpu_to_hc32((unsigned long)buffer + i * elementsize);
1369                 td->qt_buffer[1] =
1370                     cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1371                 td->qt_buffer[2] =
1372                     cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1373                 td->qt_buffer[3] =
1374                     cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1375                 td->qt_buffer[4] =
1376                     cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
1377
1378                 *buf = buffer + i * elementsize;
1379                 toggle ^= 1;
1380         }
1381
1382         flush_dcache_range((unsigned long)buffer,
1383                            ALIGN_END_ADDR(char, buffer,
1384                                           queuesize * elementsize));
1385         flush_dcache_range((unsigned long)result->first,
1386                            ALIGN_END_ADDR(struct QH, result->first,
1387                                           queuesize));
1388         flush_dcache_range((unsigned long)result->tds,
1389                            ALIGN_END_ADDR(struct qTD, result->tds,
1390                                           queuesize));
1391
1392         if (ctrl->periodic_schedules > 0) {
1393                 if (disable_periodic(ctrl) < 0) {
1394                         debug("FATAL: periodic should never fail, but did");
1395                         goto fail3;
1396                 }
1397         }
1398
1399         /* hook up to periodic list */
1400         struct QH *list = &ctrl->periodic_queue;
1401         result->last->qh_link = list->qh_link;
1402         list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
1403
1404         flush_dcache_range((unsigned long)result->last,
1405                            ALIGN_END_ADDR(struct QH, result->last, 1));
1406         flush_dcache_range((unsigned long)list,
1407                            ALIGN_END_ADDR(struct QH, list, 1));
1408
1409         if (enable_periodic(ctrl) < 0) {
1410                 debug("FATAL: periodic should never fail, but did");
1411                 goto fail3;
1412         }
1413         ctrl->periodic_schedules++;
1414
1415         debug("Exit create_int_queue\n");
1416         return result;
1417 fail3:
1418         free(result->tds);
1419 fail2:
1420         free(result->first);
1421         free(result);
1422 fail1:
1423         return NULL;
1424 }
1425
1426 static void *_ehci_poll_int_queue(struct usb_device *dev,
1427                                   struct int_queue *queue)
1428 {
1429         struct QH *cur = queue->current;
1430         struct qTD *cur_td;
1431         uint32_t token, toggle;
1432         unsigned long pipe = queue->pipe;
1433
1434         /* depleted queue */
1435         if (cur == NULL) {
1436                 debug("Exit poll_int_queue with completed queue\n");
1437                 return NULL;
1438         }
1439         /* still active */
1440         cur_td = &queue->tds[queue->current - queue->first];
1441         invalidate_dcache_range((unsigned long)cur_td,
1442                                 ALIGN_END_ADDR(struct qTD, cur_td, 1));
1443         token = hc32_to_cpu(cur_td->qt_token);
1444         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1445                 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
1446                 return NULL;
1447         }
1448
1449         toggle = QT_TOKEN_GET_DT(token);
1450         usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1451
1452         if (!(cur->qh_link & QH_LINK_TERMINATE))
1453                 queue->current++;
1454         else
1455                 queue->current = NULL;
1456
1457         invalidate_dcache_range((unsigned long)cur->buffer,
1458                                 ALIGN_END_ADDR(char, cur->buffer,
1459                                                queue->elementsize));
1460
1461         debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1462               token, cur, queue->first);
1463         return cur->buffer;
1464 }
1465
1466 /* Do not free buffers associated with QHs, they're owned by someone else */
1467 static int _ehci_destroy_int_queue(struct usb_device *dev,
1468                                    struct int_queue *queue)
1469 {
1470         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1471         int result = -1;
1472         unsigned long timeout;
1473
1474         if (disable_periodic(ctrl) < 0) {
1475                 debug("FATAL: periodic should never fail, but did");
1476                 goto out;
1477         }
1478         ctrl->periodic_schedules--;
1479
1480         struct QH *cur = &ctrl->periodic_queue;
1481         timeout = get_timer(0) + 500; /* abort after 500ms */
1482         while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
1483                 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1484                 if (NEXT_QH(cur) == queue->first) {
1485                         debug("found candidate. removing from chain\n");
1486                         cur->qh_link = queue->last->qh_link;
1487                         flush_dcache_range((unsigned long)cur,
1488                                            ALIGN_END_ADDR(struct QH, cur, 1));
1489                         result = 0;
1490                         break;
1491                 }
1492                 cur = NEXT_QH(cur);
1493                 if (get_timer(0) > timeout) {
1494                         printf("Timeout destroying interrupt endpoint queue\n");
1495                         result = -1;
1496                         goto out;
1497                 }
1498         }
1499
1500         if (ctrl->periodic_schedules > 0) {
1501                 result = enable_periodic(ctrl);
1502                 if (result < 0)
1503                         debug("FATAL: periodic should never fail, but did");
1504         }
1505
1506 out:
1507         free(queue->tds);
1508         free(queue->first);
1509         free(queue);
1510
1511         return result;
1512 }
1513
1514 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1515                                 void *buffer, int length, int interval,
1516                                 bool nonblock)
1517 {
1518         void *backbuffer;
1519         struct int_queue *queue;
1520         unsigned long timeout;
1521         int result = 0, ret;
1522
1523         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1524               dev, pipe, buffer, length, interval);
1525
1526         queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
1527         if (!queue)
1528                 return -1;
1529
1530         timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
1531         while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
1532                 if (get_timer(0) > timeout) {
1533                         printf("Timeout poll on interrupt endpoint\n");
1534                         result = -ETIMEDOUT;
1535                         break;
1536                 }
1537
1538         if (backbuffer != buffer) {
1539                 debug("got wrong buffer back (%p instead of %p)\n",
1540                       backbuffer, buffer);
1541                 return -EINVAL;
1542         }
1543
1544         ret = _ehci_destroy_int_queue(dev, queue);
1545         if (ret < 0)
1546                 return ret;
1547
1548         /* everything worked out fine */
1549         return result;
1550 }
1551
1552 static int _ehci_lock_async(struct ehci_ctrl *ctrl, int lock)
1553 {
1554         ctrl->async_locked = lock;
1555
1556         if (lock)
1557                 return 0;
1558
1559         return ehci_disable_async(ctrl);
1560 }
1561
1562 #if !CONFIG_IS_ENABLED(DM_USB)
1563 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1564                             void *buffer, int length)
1565 {
1566         return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1567 }
1568
1569 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1570                    int length, struct devrequest *setup)
1571 {
1572         return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1573 }
1574
1575 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1576                    void *buffer, int length, int interval, bool nonblock)
1577 {
1578         return _ehci_submit_int_msg(dev, pipe, buffer, length, interval,
1579                                     nonblock);
1580 }
1581
1582 struct int_queue *create_int_queue(struct usb_device *dev,
1583                 unsigned long pipe, int queuesize, int elementsize,
1584                 void *buffer, int interval)
1585 {
1586         return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1587                                       buffer, interval);
1588 }
1589
1590 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1591 {
1592         return _ehci_poll_int_queue(dev, queue);
1593 }
1594
1595 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1596 {
1597         return _ehci_destroy_int_queue(dev, queue);
1598 }
1599
1600 int usb_lock_async(struct usb_device *dev, int lock)
1601 {
1602         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1603
1604         return _ehci_lock_async(ctrl, lock);
1605 }
1606 #endif
1607
1608 #if CONFIG_IS_ENABLED(DM_USB)
1609 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1610                                    unsigned long pipe, void *buffer, int length,
1611                                    struct devrequest *setup)
1612 {
1613         debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1614               dev->name, udev, udev->dev->name, udev->portnr);
1615
1616         return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1617 }
1618
1619 static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1620                                 unsigned long pipe, void *buffer, int length)
1621 {
1622         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1623         return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1624 }
1625
1626 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1627                                unsigned long pipe, void *buffer, int length,
1628                                int interval, bool nonblock)
1629 {
1630         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1631         return _ehci_submit_int_msg(udev, pipe, buffer, length, interval,
1632                                     nonblock);
1633 }
1634
1635 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1636                 struct usb_device *udev, unsigned long pipe, int queuesize,
1637                 int elementsize, void *buffer, int interval)
1638 {
1639         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1640         return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1641                                       buffer, interval);
1642 }
1643
1644 static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1645                                  struct int_queue *queue)
1646 {
1647         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1648         return _ehci_poll_int_queue(udev, queue);
1649 }
1650
1651 static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1652                                   struct int_queue *queue)
1653 {
1654         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1655         return _ehci_destroy_int_queue(udev, queue);
1656 }
1657
1658 static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1659 {
1660         /*
1661          * EHCD can handle any transfer length as long as there is enough
1662          * free heap space left, hence set the theoretical max number here.
1663          */
1664         *size = SIZE_MAX;
1665
1666         return 0;
1667 }
1668
1669 static int ehci_lock_async(struct udevice *dev, int lock)
1670 {
1671         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1672
1673         return _ehci_lock_async(ctrl, lock);
1674 }
1675
1676 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1677                   struct ehci_hcor *hcor, const struct ehci_ops *ops,
1678                   uint tweaks, enum usb_init_type init)
1679 {
1680         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1681         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1682         int ret = -1;
1683
1684         debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1685               dev->name, ctrl, hccr, hcor, init);
1686
1687         if (!ctrl || !hccr || !hcor)
1688                 goto err;
1689
1690         priv->desc_before_addr = true;
1691
1692         ehci_setup_ops(ctrl, ops);
1693         ctrl->hccr = hccr;
1694         ctrl->hcor = hcor;
1695         ctrl->priv = ctrl;
1696
1697         ctrl->init = init;
1698         if (ctrl->init == USB_INIT_DEVICE)
1699                 goto done;
1700
1701         ret = ehci_reset(ctrl);
1702         if (ret)
1703                 goto err;
1704
1705         if (ctrl->ops.init_after_reset) {
1706                 ret = ctrl->ops.init_after_reset(ctrl);
1707                 if (ret)
1708                         goto err;
1709         }
1710
1711         ret = ehci_common_init(ctrl, tweaks);
1712         if (ret)
1713                 goto err;
1714 done:
1715         return 0;
1716 err:
1717         free(ctrl);
1718         debug("%s: failed, ret=%d\n", __func__, ret);
1719         return ret;
1720 }
1721
1722 int ehci_deregister(struct udevice *dev)
1723 {
1724         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1725
1726         if (ctrl->init == USB_INIT_DEVICE)
1727                 return 0;
1728
1729         ehci_shutdown(ctrl);
1730
1731         return 0;
1732 }
1733
1734 struct dm_usb_ops ehci_usb_ops = {
1735         .control = ehci_submit_control_msg,
1736         .bulk = ehci_submit_bulk_msg,
1737         .interrupt = ehci_submit_int_msg,
1738         .create_int_queue = ehci_create_int_queue,
1739         .poll_int_queue = ehci_poll_int_queue,
1740         .destroy_int_queue = ehci_destroy_int_queue,
1741         .get_max_xfer_size  = ehci_get_max_xfer_size,
1742         .lock_async = ehci_lock_async,
1743 };
1744
1745 #endif
1746
1747 #ifdef CONFIG_PHY
1748 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1749 {
1750         int ret;
1751
1752         if (!phy)
1753                 return 0;
1754
1755         ret = generic_phy_get_by_index(dev, index, phy);
1756         if (ret) {
1757                 if (ret != -ENOENT) {
1758                         dev_err(dev, "failed to get usb phy\n");
1759                         return ret;
1760                 }
1761         } else {
1762                 ret = generic_phy_init(phy);
1763                 if (ret) {
1764                         dev_err(dev, "failed to init usb phy\n");
1765                         return ret;
1766                 }
1767
1768                 ret = generic_phy_power_on(phy);
1769                 if (ret) {
1770                         dev_err(dev, "failed to power on usb phy\n");
1771                         return generic_phy_exit(phy);
1772                 }
1773         }
1774
1775         return 0;
1776 }
1777
1778 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1779 {
1780         int ret = 0;
1781
1782         if (!phy)
1783                 return 0;
1784
1785         if (generic_phy_valid(phy)) {
1786                 ret = generic_phy_power_off(phy);
1787                 if (ret) {
1788                         dev_err(dev, "failed to power off usb phy\n");
1789                         return ret;
1790                 }
1791
1792                 ret = generic_phy_exit(phy);
1793                 if (ret) {
1794                         dev_err(dev, "failed to power off usb phy\n");
1795                         return ret;
1796                 }
1797         }
1798
1799         return 0;
1800 }
1801 #else
1802 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1803 {
1804         return 0;
1805 }
1806
1807 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1808 {
1809         return 0;
1810 }
1811 #endif