1 // SPDX-License-Identifier: GPL-2.0+
3 * drivers/usb/gadget/dwc2_udc_otg.c
4 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
6 * Copyright (C) 2008 for Samsung Electronics
8 * BSP Support for Samsung's UDC driver
10 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
12 * State machine bugfixes:
13 * Marek Szyprowski <m.szyprowski@samsung.com>
16 * Marek Szyprowski <m.szyprowski@samsung.com>
17 * Lukasz Majewski <l.majewski@samsumg.com>
21 #include <linux/errno.h>
22 #include <linux/list.h>
25 #include <linux/usb/ch9.h>
26 #include <linux/usb/gadget.h>
28 #include <asm/byteorder.h>
29 #include <asm/unaligned.h>
32 #include <asm/mach-types.h>
34 #include "dwc2_udc_otg_regs.h"
35 #include "dwc2_udc_otg_priv.h"
37 #include <usb/dwc2_udc.h>
39 void otg_phy_init(struct dwc2_udc *dev)
41 unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
42 struct dwc2_usbotg_phy *phy =
43 (struct dwc2_usbotg_phy *)dev->pdata->regs_phy;
45 dev->pdata->phy_control(1);
48 printf("USB PHY0 Enable\n");
51 writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);
53 if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */
54 writel((readl(&phy->phypwr)
55 &~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN)
56 &~FORCE_SUSPEND_0), &phy->phypwr);
58 writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN)
59 &~FORCE_SUSPEND_0), &phy->phypwr);
61 if (s5p_cpu_id == 0x4412)
62 writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 |
63 EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ,
64 &phy->phyclk); /* PLL 24Mhz */
66 writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) |
67 CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
69 writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
70 | PHY_SW_RST0, &phy->rstcon);
72 writel(readl(&phy->rstcon)
73 &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon);
77 void otg_phy_off(struct dwc2_udc *dev)
79 unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
80 struct dwc2_usbotg_phy *phy =
81 (struct dwc2_usbotg_phy *)dev->pdata->regs_phy;
83 /* reset controller just in case */
84 writel(PHY_SW_RST0, &phy->rstcon);
86 writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon);
89 writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN
90 | FORCE_SUSPEND_0, &phy->phypwr);
92 writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl);
94 writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)),
99 dev->pdata->phy_control(0);