drivers/usb/eth/r8152.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2015 Realtek Semiconductor Corp. All rights reserved.
   4  *
   5  */
   6
   7 #include <common.h>
   8 #include <dm.h>
   9 #include <errno.h>
  10 #include <log.h>
  11 #include <malloc.h>
  12 #include <memalign.h>
  13 #include <net.h>
  14 #include <usb.h>
  15 #include <linux/delay.h>
  16 #include <linux/mii.h>
  17 #include <linux/bitops.h>
  18 #include "usb_ether.h"
  19 #include "r8152.h"
  20
  21 #ifndef CONFIG_DM_ETH
  22 /* local vars */
  23 static int curr_eth_dev; /* index for name of next device detected */
  24
  25 struct r8152_dongle {
  26         unsigned short vendor;
  27         unsigned short product;
  28 };
  29
  30 static const struct r8152_dongle r8152_dongles[] = {
  31         /* Realtek */
  32         { 0x0bda, 0x8050 },
  33         { 0x0bda, 0x8152 },
  34         { 0x0bda, 0x8153 },
  35
  36         /* Samsung */
  37         { 0x04e8, 0xa101 },
  38
  39         /* Lenovo */
  40         { 0x17ef, 0x304f },
  41         { 0x17ef, 0x3052 },
  42         { 0x17ef, 0x3054 },
  43         { 0x17ef, 0x3057 },
  44         { 0x17ef, 0x7205 },
  45         { 0x17ef, 0x720a },
  46         { 0x17ef, 0x720b },
  47         { 0x17ef, 0x720c },
  48
  49         /* TP-LINK */
  50         { 0x2357, 0x0601 },
  51
  52         /* Nvidia */
  53         { 0x0955, 0x09ff },
  54 };
  55 #endif
  56
  57 struct r8152_version {
  58         unsigned short tcr;
  59         unsigned short version;
  60         bool           gmii;
  61 };
  62
  63 static const struct r8152_version r8152_versions[] = {
  64         { 0x4c00, RTL_VER_01, 0 },
  65         { 0x4c10, RTL_VER_02, 0 },
  66         { 0x5c00, RTL_VER_03, 1 },
  67         { 0x5c10, RTL_VER_04, 1 },
  68         { 0x5c20, RTL_VER_05, 1 },
  69         { 0x5c30, RTL_VER_06, 1 },
  70         { 0x4800, RTL_VER_07, 0 },
  71 };
  72
  73 static
  74 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
  75 {
  76         ALLOC_CACHE_ALIGN_BUFFER(void *, tmp, size);
  77         int ret;
  78
  79         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
  80                 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
  81                 value, index, tmp, size, 500);
  82         memcpy(data, tmp, size);
  83         return ret;
  84 }
  85
  86 static
  87 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
  88 {
  89         ALLOC_CACHE_ALIGN_BUFFER(void *, tmp, size);
  90
  91         memcpy(tmp, data, size);
  92         return usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
  93                                RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
  94                                value, index, tmp, size, 500);
  95 }
  96
  97 int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
  98                      void *data, u16 type)
  99 {
 100         u16 burst_size = 64;
 101         int ret;
 102         int txsize;
 103
 104         /* both size and index must be 4 bytes align */
 105         if ((size & 3) || !size || (index & 3) || !data)
 106                 return -EINVAL;
 107
 108         if (index + size > 0xffff)
 109                 return -EINVAL;
 110
 111         while (size) {
 112                 txsize = min(size, burst_size);
 113                 ret = get_registers(tp, index, type, txsize, data);
 114                 if (ret < 0)
 115                         break;
 116
 117                 index += txsize;
 118                 data += txsize;
 119                 size -= txsize;
 120         }
 121
 122         return ret;
 123 }
 124
 125 int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
 126                       u16 size, void *data, u16 type)
 127 {
 128         int ret;
 129         u16 byteen_start, byteen_end, byte_en_to_hw;
 130         u16 burst_size = 512;
 131         int txsize;
 132
 133         /* both size and index must be 4 bytes align */
 134         if ((size & 3) || !size || (index & 3) || !data)
 135                 return -EINVAL;
 136
 137         if (index + size > 0xffff)
 138                 return -EINVAL;
 139
 140         byteen_start = byteen & BYTE_EN_START_MASK;
 141         byteen_end = byteen & BYTE_EN_END_MASK;
 142
 143         byte_en_to_hw = byteen_start | (byteen_start << 4);
 144         ret = set_registers(tp, index, type | byte_en_to_hw, 4, data);
 145         if (ret < 0)
 146                 return ret;
 147
 148         index += 4;
 149         data += 4;
 150         size -= 4;
 151
 152         if (size) {
 153                 size -= 4;
 154
 155                 while (size) {
 156                         txsize = min(size, burst_size);
 157
 158                         ret = set_registers(tp, index,
 159                                             type | BYTE_EN_DWORD,
 160                                             txsize, data);
 161                         if (ret < 0)
 162                                 return ret;
 163
 164                         index += txsize;
 165                         data += txsize;
 166                         size -= txsize;
 167                 }
 168
 169                 byte_en_to_hw = byteen_end | (byteen_end >> 4);
 170                 ret = set_registers(tp, index, type | byte_en_to_hw, 4, data);
 171                 if (ret < 0)
 172                         return ret;
 173         }
 174
 175         return ret;
 176 }
 177
 178 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
 179 {
 180         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
 181 }
 182
 183 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
 184 {
 185         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
 186 }
 187
 188 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
 189 {
 190         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
 191 }
 192
 193 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
 194 {
 195         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
 196 }
 197
 198 u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
 199 {
 200         __le32 data;
 201
 202         generic_ocp_read(tp, index, sizeof(data), &data, type);
 203
 204         return __le32_to_cpu(data);
 205 }
 206
 207 void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
 208 {
 209         __le32 tmp = __cpu_to_le32(data);
 210
 211         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
 212 }
 213
 214 u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
 215 {
 216         u32 data;
 217         __le32 tmp;
 218         u8 shift = index & 2;
 219
 220         index &= ~3;
 221
 222         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 223
 224         data = __le32_to_cpu(tmp);
 225         data >>= (shift * 8);
 226         data &= 0xffff;
 227
 228         return data;
 229 }
 230
 231 void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
 232 {
 233         u32 mask = 0xffff;
 234         __le32 tmp;
 235         u16 byen = BYTE_EN_WORD;
 236         u8 shift = index & 2;
 237
 238         data &= mask;
 239
 240         if (index & 2) {
 241                 byen <<= shift;
 242                 mask <<= (shift * 8);
 243                 data <<= (shift * 8);
 244                 index &= ~3;
 245         }
 246
 247         tmp = __cpu_to_le32(data);
 248
 249         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
 250 }
 251
 252 u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
 253 {
 254         u32 data;
 255         __le32 tmp;
 256         u8 shift = index & 3;
 257
 258         index &= ~3;
 259
 260         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 261
 262         data = __le32_to_cpu(tmp);
 263         data >>= (shift * 8);
 264         data &= 0xff;
 265
 266         return data;
 267 }
 268
 269 void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
 270 {
 271         u32 mask = 0xff;
 272         __le32 tmp;
 273         u16 byen = BYTE_EN_BYTE;
 274         u8 shift = index & 3;
 275
 276         data &= mask;
 277
 278         if (index & 3) {
 279                 byen <<= shift;
 280                 mask <<= (shift * 8);
 281                 data <<= (shift * 8);
 282                 index &= ~3;
 283         }
 284
 285         tmp = __cpu_to_le32(data);
 286
 287         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
 288 }
 289
 290 u16 ocp_reg_read(struct r8152 *tp, u16 addr)
 291 {
 292         u16 ocp_base, ocp_index;
 293
 294         ocp_base = addr & 0xf000;
 295         if (ocp_base != tp->ocp_base) {
 296                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
 297                 tp->ocp_base = ocp_base;
 298         }
 299
 300         ocp_index = (addr & 0x0fff) | 0xb000;
 301         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
 302 }
 303
 304 void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
 305 {
 306         u16 ocp_base, ocp_index;
 307
 308         ocp_base = addr & 0xf000;
 309         if (ocp_base != tp->ocp_base) {
 310                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
 311                 tp->ocp_base = ocp_base;
 312         }
 313
 314         ocp_index = (addr & 0x0fff) | 0xb000;
 315         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
 316 }
 317
 318 static void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
 319 {
 320         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
 321 }
 322
 323 static int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
 324 {
 325         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
 326 }
 327
 328 void sram_write(struct r8152 *tp, u16 addr, u16 data)
 329 {
 330         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
 331         ocp_reg_write(tp, OCP_SRAM_DATA, data);
 332 }
 333
 334 int r8152_wait_for_bit(struct r8152 *tp, bool ocp_reg, u16 type, u16 index,
 335                        const u32 mask, bool set, unsigned int timeout)
 336 {
 337         u32 val;
 338
 339         while (--timeout) {
 340                 if (ocp_reg)
 341                         val = ocp_reg_read(tp, index);
 342                 else
 343                         val = ocp_read_dword(tp, type, index);
 344
 345                 if (!set)
 346                         val = ~val;
 347
 348                 if ((val & mask) == mask)
 349                         return 0;
 350
 351                 mdelay(1);
 352         }
 353
 354         debug("%s: Timeout (index=%04x mask=%08x timeout=%d)\n",
 355               __func__, index, mask, timeout);
 356
 357         return -ETIMEDOUT;
 358 }
 359
 360 static void r8152b_reset_packet_filter(struct r8152 *tp)
 361 {
 362         u32 ocp_data;
 363
 364         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
 365         ocp_data &= ~FMC_FCR_MCU_EN;
 366         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
 367         ocp_data |= FMC_FCR_MCU_EN;
 368         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
 369 }
 370
 371 static void rtl8152_wait_fifo_empty(struct r8152 *tp)
 372 {
 373         int ret;
 374
 375         ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_PHY_PWR,
 376                                  PLA_PHY_PWR_TXEMP, 1, R8152_WAIT_TIMEOUT);
 377         if (ret)
 378                 debug("Timeout waiting for FIFO empty\n");
 379
 380         ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_TCR0,
 381                                  TCR0_TX_EMPTY, 1, R8152_WAIT_TIMEOUT);
 382         if (ret)
 383                 debug("Timeout waiting for TX empty\n");
 384 }
 385
 386 static void rtl8152_nic_reset(struct r8152 *tp)
 387 {
 388         int ret;
 389         u32 ocp_data;
 390
 391         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, BIST_CTRL);
 392         ocp_data |= BIST_CTRL_SW_RESET;
 393         ocp_write_dword(tp, MCU_TYPE_PLA, BIST_CTRL, ocp_data);
 394
 395         ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, BIST_CTRL,
 396                                  BIST_CTRL_SW_RESET, 0, R8152_WAIT_TIMEOUT);
 397         if (ret)
 398                 debug("Timeout waiting for NIC reset\n");
 399 }
 400
 401 static u8 rtl8152_get_speed(struct r8152 *tp)
 402 {
 403         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
 404 }
 405
 406 static void rtl_set_eee_plus(struct r8152 *tp)
 407 {
 408         u32 ocp_data;
 409
 410         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
 411         ocp_data &= ~EEEP_CR_EEEP_TX;
 412         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
 413 }
 414
 415 static void rxdy_gated_en(struct r8152 *tp, bool enable)
 416 {
 417         u32 ocp_data;
 418
 419         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
 420         if (enable)
 421                 ocp_data |= RXDY_GATED_EN;
 422         else
 423                 ocp_data &= ~RXDY_GATED_EN;
 424         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
 425 }
 426
 427 static void rtl8152_set_rx_mode(struct r8152 *tp)
 428 {
 429         u32 ocp_data;
 430         __le32 tmp[2];
 431
 432         tmp[0] = 0xffffffff;
 433         tmp[1] = 0xffffffff;
 434
 435         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
 436
 437         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
 438         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
 439         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
 440 }
 441
 442 static int rtl_enable(struct r8152 *tp)
 443 {
 444         u32 ocp_data;
 445
 446         r8152b_reset_packet_filter(tp);
 447
 448         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
 449         ocp_data |= PLA_CR_RE | PLA_CR_TE;
 450         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
 451
 452         rxdy_gated_en(tp, false);
 453
 454         rtl8152_set_rx_mode(tp);
 455
 456         return 0;
 457 }
 458
 459 static int rtl8152_enable(struct r8152 *tp)
 460 {
 461         rtl_set_eee_plus(tp);
 462
 463         return rtl_enable(tp);
 464 }
 465
 466 static void r8153_set_rx_early_timeout(struct r8152 *tp)
 467 {
 468         u32 ocp_data = tp->coalesce / 8;
 469
 470         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
 471 }
 472
 473 static void r8153_set_rx_early_size(struct r8152 *tp)
 474 {
 475         u32 ocp_data = (RTL8152_AGG_BUF_SZ - RTL8153_RMS) / 4;
 476
 477         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
 478 }
 479
 480 static int rtl8153_enable(struct r8152 *tp)
 481 {
 482         rtl_set_eee_plus(tp);
 483         r8153_set_rx_early_timeout(tp);
 484         r8153_set_rx_early_size(tp);
 485
 486         return rtl_enable(tp);
 487 }
 488
 489 static void rtl_disable(struct r8152 *tp)
 490 {
 491         u32 ocp_data;
 492
 493         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
 494         ocp_data &= ~RCR_ACPT_ALL;
 495         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
 496
 497         rxdy_gated_en(tp, true);
 498
 499         rtl8152_wait_fifo_empty(tp);
 500         rtl8152_nic_reset(tp);
 501 }
 502
 503 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
 504 {
 505         u32 ocp_data;
 506
 507         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
 508         if (enable)
 509                 ocp_data |= POWER_CUT;
 510         else
 511                 ocp_data &= ~POWER_CUT;
 512         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
 513
 514         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
 515         ocp_data &= ~RESUME_INDICATE;
 516         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
 517 }
 518
 519 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
 520 {
 521         u32 ocp_data;
 522
 523         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
 524         if (enable)
 525                 ocp_data |= CPCR_RX_VLAN;
 526         else
 527                 ocp_data &= ~CPCR_RX_VLAN;
 528         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
 529 }
 530
 531 static void r8153_u1u2en(struct r8152 *tp, bool enable)
 532 {
 533         u8 u1u2[8];
 534
 535         if (enable)
 536                 memset(u1u2, 0xff, sizeof(u1u2));
 537         else
 538                 memset(u1u2, 0x00, sizeof(u1u2));
 539
 540         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
 541 }
 542
 543 static void r8153_u2p3en(struct r8152 *tp, bool enable)
 544 {
 545         u32 ocp_data;
 546
 547         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
 548         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
 549                 ocp_data |= U2P3_ENABLE;
 550         else
 551                 ocp_data &= ~U2P3_ENABLE;
 552         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
 553 }
 554
 555 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
 556 {
 557         u32 ocp_data;
 558
 559         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
 560         if (enable)
 561                 ocp_data |= PWR_EN | PHASE2_EN;
 562         else
 563                 ocp_data &= ~(PWR_EN | PHASE2_EN);
 564         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
 565
 566         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
 567         ocp_data &= ~PCUT_STATUS;
 568         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
 569 }
 570
 571 static int r8152_read_mac(struct r8152 *tp, unsigned char *macaddr)
 572 {
 573         int ret;
 574         unsigned char enetaddr[8] = {0};
 575
 576         ret = pla_ocp_read(tp, PLA_IDR, 8, enetaddr);
 577         if (ret < 0)
 578                 return ret;
 579
 580         memcpy(macaddr, enetaddr, ETH_ALEN);
 581         return 0;
 582 }
 583
 584 static void r8152b_disable_aldps(struct r8152 *tp)
 585 {
 586         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
 587         mdelay(20);
 588 }
 589
 590 static void r8152b_enable_aldps(struct r8152 *tp)
 591 {
 592         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
 593                 LINKENA | DIS_SDSAVE);
 594 }
 595
 596 static void rtl8152_disable(struct r8152 *tp)
 597 {
 598         r8152b_disable_aldps(tp);
 599         rtl_disable(tp);
 600         r8152b_enable_aldps(tp);
 601 }
 602
 603 static void r8152b_hw_phy_cfg(struct r8152 *tp)
 604 {
 605         u16 data;
 606
 607         data = r8152_mdio_read(tp, MII_BMCR);
 608         if (data & BMCR_PDOWN) {
 609                 data &= ~BMCR_PDOWN;
 610                 r8152_mdio_write(tp, MII_BMCR, data);
 611         }
 612
 613         r8152b_firmware(tp);
 614 }
 615
 616 static void rtl8152_reinit_ll(struct r8152 *tp)
 617 {
 618         u32 ocp_data;
 619         int ret;
 620
 621         ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_PHY_PWR,
 622                                  PLA_PHY_PWR_LLR, 1, R8152_WAIT_TIMEOUT);
 623         if (ret)
 624                 debug("Timeout waiting for link list ready\n");
 625
 626         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
 627         ocp_data |= RE_INIT_LL;
 628         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
 629
 630         ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_PHY_PWR,
 631                                  PLA_PHY_PWR_LLR, 1, R8152_WAIT_TIMEOUT);
 632         if (ret)
 633                 debug("Timeout waiting for link list ready\n");
 634 }
 635
 636 static void r8152b_exit_oob(struct r8152 *tp)
 637 {
 638         u32 ocp_data;
 639
 640         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
 641         ocp_data &= ~RCR_ACPT_ALL;
 642         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
 643
 644         rxdy_gated_en(tp, true);
 645         r8152b_hw_phy_cfg(tp);
 646
 647         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
 648         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
 649
 650         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
 651         ocp_data &= ~NOW_IS_OOB;
 652         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
 653
 654         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
 655         ocp_data &= ~MCU_BORW_EN;
 656         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
 657
 658         rtl8152_reinit_ll(tp);
 659         rtl8152_nic_reset(tp);
 660
 661         /* rx share fifo credit full threshold */
 662         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
 663
 664         if (tp->udev->speed == USB_SPEED_FULL ||
 665             tp->udev->speed == USB_SPEED_LOW) {
 666                 /* rx share fifo credit near full threshold */
 667                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
 668                                 RXFIFO_THR2_FULL);
 669                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
 670                                 RXFIFO_THR3_FULL);
 671         } else {
 672                 /* rx share fifo credit near full threshold */
 673                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
 674                                 RXFIFO_THR2_HIGH);
 675                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
 676                                 RXFIFO_THR3_HIGH);
 677         }
 678
 679         /* TX share fifo free credit full threshold */
 680         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
 681
 682         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
 683         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
 684         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
 685                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
 686
 687         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
 688
 689         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
 690         ocp_data |= TCR0_AUTO_FIFO;
 691         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
 692 }
 693
 694 static void r8152b_enter_oob(struct r8152 *tp)
 695 {
 696         u32 ocp_data;
 697
 698         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
 699         ocp_data &= ~NOW_IS_OOB;
 700         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
 701
 702         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
 703         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
 704         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
 705
 706         rtl_disable(tp);
 707
 708         rtl8152_reinit_ll(tp);
 709
 710         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
 711
 712         rtl_rx_vlan_en(tp, false);
 713
 714         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
 715         ocp_data |= ALDPS_PROXY_MODE;
 716         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
 717
 718         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
 719         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
 720         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
 721
 722         rxdy_gated_en(tp, false);
 723
 724         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
 725         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
 726         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
 727 }
 728
 729 static void r8153_hw_phy_cfg(struct r8152 *tp)
 730 {
 731         u32 ocp_data;
 732         u16 data;
 733
 734         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
 735             tp->version == RTL_VER_05)
 736                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
 737
 738         data = r8152_mdio_read(tp, MII_BMCR);
 739         if (data & BMCR_PDOWN) {
 740                 data &= ~BMCR_PDOWN;
 741                 r8152_mdio_write(tp, MII_BMCR, data);
 742         }
 743
 744         r8153_firmware(tp);
 745
 746         if (tp->version == RTL_VER_03) {
 747                 data = ocp_reg_read(tp, OCP_EEE_CFG);
 748                 data &= ~CTAP_SHORT_EN;
 749                 ocp_reg_write(tp, OCP_EEE_CFG, data);
 750         }
 751
 752         data = ocp_reg_read(tp, OCP_POWER_CFG);
 753         data |= EEE_CLKDIV_EN;
 754         ocp_reg_write(tp, OCP_POWER_CFG, data);
 755
 756         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
 757         data |= EN_10M_BGOFF;
 758         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
 759         data = ocp_reg_read(tp, OCP_POWER_CFG);
 760         data |= EN_10M_PLLOFF;
 761         ocp_reg_write(tp, OCP_POWER_CFG, data);
 762         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
 763
 764         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
 765         ocp_data |= PFM_PWM_SWITCH;
 766         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
 767
 768         /* Enable LPF corner auto tune */
 769         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
 770
 771         /* Adjust 10M Amplitude */
 772         sram_write(tp, SRAM_10M_AMP1, 0x00af);
 773         sram_write(tp, SRAM_10M_AMP2, 0x0208);
 774 }
 775
 776 static void r8153_first_init(struct r8152 *tp)
 777 {
 778         u32 ocp_data;
 779
 780         rxdy_gated_en(tp, true);
 781
 782         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
 783         ocp_data &= ~RCR_ACPT_ALL;
 784         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
 785
 786         r8153_hw_phy_cfg(tp);
 787
 788         rtl8152_nic_reset(tp);
 789
 790         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
 791         ocp_data &= ~NOW_IS_OOB;
 792         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
 793
 794         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
 795         ocp_data &= ~MCU_BORW_EN;
 796         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
 797
 798         rtl8152_reinit_ll(tp);
 799
 800         rtl_rx_vlan_en(tp, false);
 801
 802         ocp_data = RTL8153_RMS;
 803         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
 804         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
 805
 806         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
 807         ocp_data |= TCR0_AUTO_FIFO;
 808         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
 809
 810         rtl8152_nic_reset(tp);
 811
 812         /* rx share fifo credit full threshold */
 813         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
 814         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
 815         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
 816         /* TX share fifo free credit full threshold */
 817         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
 818
 819         /* rx aggregation */
 820         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
 821
 822         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
 823         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
 824 }
 825
 826 static void r8153_enter_oob(struct r8152 *tp)
 827 {
 828         u32 ocp_data;
 829
 830         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
 831         ocp_data &= ~NOW_IS_OOB;
 832         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
 833
 834         rtl_disable(tp);
 835
 836         rtl8152_reinit_ll(tp);
 837
 838         ocp_data = RTL8153_RMS;
 839         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
 840
 841         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
 842         ocp_data &= ~TEREDO_WAKE_MASK;
 843         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
 844
 845         rtl_rx_vlan_en(tp, false);
 846
 847         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
 848         ocp_data |= ALDPS_PROXY_MODE;
 849         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
 850
 851         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
 852         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
 853         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
 854
 855         rxdy_gated_en(tp, false);
 856
 857         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
 858         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
 859         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
 860 }
 861
 862 static void r8153_disable_aldps(struct r8152 *tp)
 863 {
 864         u16 data;
 865
 866         data = ocp_reg_read(tp, OCP_POWER_CFG);
 867         data &= ~EN_ALDPS;
 868         ocp_reg_write(tp, OCP_POWER_CFG, data);
 869         mdelay(20);
 870 }
 871
 872 static void rtl8153_disable(struct r8152 *tp)
 873 {
 874         r8153_disable_aldps(tp);
 875         rtl_disable(tp);
 876 }
 877
 878 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
 879 {
 880         u16 bmcr, anar, gbcr;
 881
 882         anar = r8152_mdio_read(tp, MII_ADVERTISE);
 883         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
 884                   ADVERTISE_100HALF | ADVERTISE_100FULL);
 885         if (tp->supports_gmii) {
 886                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
 887                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 888         } else {
 889                 gbcr = 0;
 890         }
 891
 892         if (autoneg == AUTONEG_DISABLE) {
 893                 if (speed == SPEED_10) {
 894                         bmcr = 0;
 895                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
 896                 } else if (speed == SPEED_100) {
 897                         bmcr = BMCR_SPEED100;
 898                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
 899                 } else if (speed == SPEED_1000 && tp->supports_gmii) {
 900                         bmcr = BMCR_SPEED1000;
 901                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 902                 } else {
 903                         return -EINVAL;
 904                 }
 905
 906                 if (duplex == DUPLEX_FULL)
 907                         bmcr |= BMCR_FULLDPLX;
 908         } else {
 909                 if (speed == SPEED_10) {
 910                         if (duplex == DUPLEX_FULL)
 911                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
 912                         else
 913                                 anar |= ADVERTISE_10HALF;
 914                 } else if (speed == SPEED_100) {
 915                         if (duplex == DUPLEX_FULL) {
 916                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
 917                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
 918                         } else {
 919                                 anar |= ADVERTISE_10HALF;
 920                                 anar |= ADVERTISE_100HALF;
 921                         }
 922                 } else if (speed == SPEED_1000 && tp->supports_gmii) {
 923                         if (duplex == DUPLEX_FULL) {
 924                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
 925                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
 926                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 927                         } else {
 928                                 anar |= ADVERTISE_10HALF;
 929                                 anar |= ADVERTISE_100HALF;
 930                                 gbcr |= ADVERTISE_1000HALF;
 931                         }
 932                 } else {
 933                         return -EINVAL;
 934                 }
 935
 936                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
 937         }
 938
 939         if (tp->supports_gmii)
 940                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
 941
 942         r8152_mdio_write(tp, MII_ADVERTISE, anar);
 943         r8152_mdio_write(tp, MII_BMCR, bmcr);
 944
 945         return 0;
 946 }
 947
 948 static void rtl8152_up(struct r8152 *tp)
 949 {
 950         r8152b_disable_aldps(tp);
 951         r8152b_exit_oob(tp);
 952         r8152b_enable_aldps(tp);
 953 }
 954
 955 static void rtl8152_down(struct r8152 *tp)
 956 {
 957         r8152_power_cut_en(tp, false);
 958         r8152b_disable_aldps(tp);
 959         r8152b_enter_oob(tp);
 960         r8152b_enable_aldps(tp);
 961 }
 962
 963 static void rtl8153_up(struct r8152 *tp)
 964 {
 965         r8153_u1u2en(tp, false);
 966         r8153_disable_aldps(tp);
 967         r8153_first_init(tp);
 968         r8153_u2p3en(tp, false);
 969 }
 970
 971 static void rtl8153_down(struct r8152 *tp)
 972 {
 973         r8153_u1u2en(tp, false);
 974         r8153_u2p3en(tp, false);
 975         r8153_power_cut_en(tp, false);
 976         r8153_disable_aldps(tp);
 977         r8153_enter_oob(tp);
 978 }
 979
 980 static void r8152b_get_version(struct r8152 *tp)
 981 {
 982         u32 ocp_data;
 983         u16 tcr;
 984         int i;
 985
 986         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
 987         tcr = (u16)(ocp_data & VERSION_MASK);
 988
 989         for (i = 0; i < ARRAY_SIZE(r8152_versions); i++) {
 990                 if (tcr == r8152_versions[i].tcr) {
 991                         /* Found a supported version */
 992                         tp->version = r8152_versions[i].version;
 993                         tp->supports_gmii = r8152_versions[i].gmii;
 994                         break;
 995                 }
 996         }
 997
 998         if (tp->version == RTL_VER_UNKNOWN)
 999                 debug("r8152 Unknown tcr version 0x%04x\n", tcr);
1000 }
1001
1002 static void r8152b_enable_fc(struct r8152 *tp)
1003 {
1004         u16 anar;
1005         anar = r8152_mdio_read(tp, MII_ADVERTISE);
1006         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1007         r8152_mdio_write(tp, MII_ADVERTISE, anar);
1008 }
1009
1010 static void rtl_tally_reset(struct r8152 *tp)
1011 {
1012         u32 ocp_data;
1013
1014         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
1015         ocp_data |= TALLY_RESET;
1016         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
1017 }
1018
1019 static void r8152b_init(struct r8152 *tp)
1020 {
1021         u32 ocp_data;
1022
1023         r8152b_disable_aldps(tp);
1024
1025         if (tp->version == RTL_VER_01) {
1026                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
1027                 ocp_data &= ~LED_MODE_MASK;
1028                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
1029         }
1030
1031         r8152_power_cut_en(tp, false);
1032
1033         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
1034         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
1035         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
1036         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
1037         ocp_data &= ~MCU_CLK_RATIO_MASK;
1038         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
1039         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
1040         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
1041                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
1042         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
1043
1044         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_TIMER);
1045         ocp_data |= BIT(15);
1046         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_TIMER, ocp_data);
1047         ocp_write_word(tp, MCU_TYPE_USB, 0xcbfc, 0x03e8);
1048         ocp_data &= ~BIT(15);
1049         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_TIMER, ocp_data);
1050
1051         r8152b_enable_fc(tp);
1052         rtl_tally_reset(tp);
1053
1054         /* enable rx aggregation */
1055         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
1056
1057         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
1058         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
1059 }
1060
1061 static void r8153_init(struct r8152 *tp)
1062 {
1063         int i;
1064         u32 ocp_data;
1065
1066         r8153_disable_aldps(tp);
1067         r8153_u1u2en(tp, false);
1068
1069         r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_BOOT_CTRL,
1070                            AUTOLOAD_DONE, 1, R8152_WAIT_TIMEOUT);
1071
1072         for (i = 0; i < R8152_WAIT_TIMEOUT; i++) {
1073                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
1074                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
1075                         break;
1076
1077                 mdelay(1);
1078         }
1079
1080         r8153_u2p3en(tp, false);
1081
1082         if (tp->version == RTL_VER_04) {
1083                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
1084                 ocp_data &= ~pwd_dn_scale_mask;
1085                 ocp_data |= pwd_dn_scale(96);
1086                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
1087
1088                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
1089                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
1090                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
1091         } else if (tp->version == RTL_VER_05) {
1092                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
1093                 ocp_data &= ~ECM_ALDPS;
1094                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
1095
1096                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
1097                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
1098                         ocp_data &= ~DYNAMIC_BURST;
1099                 else
1100                         ocp_data |= DYNAMIC_BURST;
1101                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
1102         } else if (tp->version == RTL_VER_06) {
1103                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
1104                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
1105                         ocp_data &= ~DYNAMIC_BURST;
1106                 else
1107                         ocp_data |= DYNAMIC_BURST;
1108                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
1109         }
1110
1111         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
1112         ocp_data |= EP4_FULL_FC;
1113         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
1114
1115         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
1116         ocp_data &= ~TIMER11_EN;
1117         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
1118
1119         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
1120         ocp_data &= ~LED_MODE_MASK;
1121         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
1122
1123         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
1124         if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
1125                 ocp_data |= LPM_TIMER_500MS;
1126         else
1127                 ocp_data |= LPM_TIMER_500US;
1128         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
1129
1130         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
1131         ocp_data &= ~SEN_VAL_MASK;
1132         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
1133         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
1134
1135         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
1136
1137         r8153_power_cut_en(tp, false);
1138
1139         r8152b_enable_fc(tp);
1140         rtl_tally_reset(tp);
1141 }
1142
1143 static void rtl8152_unload(struct r8152 *tp)
1144 {
1145         if (tp->version != RTL_VER_01)
1146                 r8152_power_cut_en(tp, true);
1147 }
1148
1149 static void rtl8153_unload(struct r8152 *tp)
1150 {
1151         r8153_power_cut_en(tp, false);
1152 }
1153
1154 static int rtl_ops_init(struct r8152 *tp)
1155 {
1156         struct rtl_ops *ops = &tp->rtl_ops;
1157         int ret = 0;
1158
1159         switch (tp->version) {
1160         case RTL_VER_01:
1161         case RTL_VER_02:
1162         case RTL_VER_07:
1163                 ops->init               = r8152b_init;
1164                 ops->enable             = rtl8152_enable;
1165                 ops->disable            = rtl8152_disable;
1166                 ops->up                 = rtl8152_up;
1167                 ops->down               = rtl8152_down;
1168                 ops->unload             = rtl8152_unload;
1169                 break;
1170
1171         case RTL_VER_03:
1172         case RTL_VER_04:
1173         case RTL_VER_05:
1174         case RTL_VER_06:
1175                 ops->init               = r8153_init;
1176                 ops->enable             = rtl8153_enable;
1177                 ops->disable            = rtl8153_disable;
1178                 ops->up                 = rtl8153_up;
1179                 ops->down               = rtl8153_down;
1180                 ops->unload             = rtl8153_unload;
1181                 break;
1182
1183         default:
1184                 ret = -ENODEV;
1185                 printf("r8152 Unknown Device\n");
1186                 break;
1187         }
1188
1189         return ret;
1190 }
1191
1192 static int r8152_init_common(struct r8152 *tp)
1193 {
1194         u8 speed;
1195         int timeout = 0;
1196         int link_detected;
1197
1198         debug("** %s()\n", __func__);
1199
1200         do {
1201                 speed = rtl8152_get_speed(tp);
1202
1203                 link_detected = speed & LINK_STATUS;
1204                 if (!link_detected) {
1205                         if (timeout == 0)
1206                                 printf("Waiting for Ethernet connection... ");
1207                         mdelay(TIMEOUT_RESOLUTION);
1208                         timeout += TIMEOUT_RESOLUTION;
1209                 }
1210         } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
1211         if (link_detected) {
1212                 tp->rtl_ops.enable(tp);
1213
1214                 if (timeout != 0)
1215                         printf("done.\n");
1216         } else {
1217                 printf("unable to connect.\n");
1218         }
1219
1220         return 0;
1221 }
1222
1223 static int r8152_send_common(struct ueth_data *ueth, void *packet, int length)
1224 {
1225         struct usb_device *udev = ueth->pusb_dev;
1226         u32 opts1, opts2 = 0;
1227         int err;
1228         int actual_len;
1229         ALLOC_CACHE_ALIGN_BUFFER(uint8_t, msg,
1230                                  PKTSIZE + sizeof(struct tx_desc));
1231         struct tx_desc *tx_desc = (struct tx_desc *)msg;
1232
1233         debug("** %s(), len %d\n", __func__, length);
1234
1235         opts1 = length | TX_FS | TX_LS;
1236
1237         tx_desc->opts2 = cpu_to_le32(opts2);
1238         tx_desc->opts1 = cpu_to_le32(opts1);
1239
1240         memcpy(msg + sizeof(struct tx_desc), (void *)packet, length);
1241
1242         err = usb_bulk_msg(udev, usb_sndbulkpipe(udev, ueth->ep_out),
1243                            (void *)msg, length + sizeof(struct tx_desc),
1244                            &actual_len, USB_BULK_SEND_TIMEOUT);
1245         debug("Tx: len = %zu, actual = %u, err = %d\n",
1246               length + sizeof(struct tx_desc), actual_len, err);
1247
1248         return err;
1249 }
1250
1251 #ifndef CONFIG_DM_ETH
1252 static int r8152_init(struct eth_device *eth, bd_t *bd)
1253 {
1254         struct ueth_data *dev = (struct ueth_data *)eth->priv;
1255         struct r8152 *tp = (struct r8152 *)dev->dev_priv;
1256
1257         return r8152_init_common(tp);
1258 }
1259
1260 static int r8152_send(struct eth_device *eth, void *packet, int length)
1261 {
1262         struct ueth_data *dev = (struct ueth_data *)eth->priv;
1263
1264         return r8152_send_common(dev, packet, length);
1265 }
1266
1267 static int r8152_recv(struct eth_device *eth)
1268 {
1269         struct ueth_data *dev = (struct ueth_data *)eth->priv;
1270
1271         ALLOC_CACHE_ALIGN_BUFFER(uint8_t, recv_buf, RTL8152_AGG_BUF_SZ);
1272         unsigned char *pkt_ptr;
1273         int err;
1274         int actual_len;
1275         u16 packet_len;
1276
1277         u32 bytes_process = 0;
1278         struct rx_desc *rx_desc;
1279
1280         debug("** %s()\n", __func__);
1281
1282         err = usb_bulk_msg(dev->pusb_dev,
1283                                 usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
1284                                 (void *)recv_buf,
1285                                 RTL8152_AGG_BUF_SZ,
1286                                 &actual_len,
1287                                 USB_BULK_RECV_TIMEOUT);
1288         debug("Rx: len = %u, actual = %u, err = %d\n", RTL8152_AGG_BUF_SZ,
1289               actual_len, err);
1290         if (err != 0) {
1291                 debug("Rx: failed to receive\n");
1292                 return -1;
1293         }
1294         if (actual_len > RTL8152_AGG_BUF_SZ) {
1295                 debug("Rx: received too many bytes %d\n", actual_len);
1296                 return -1;
1297         }
1298
1299         while (bytes_process < actual_len) {
1300                 rx_desc = (struct rx_desc *)(recv_buf + bytes_process);
1301                 pkt_ptr = recv_buf + sizeof(struct rx_desc) + bytes_process;
1302
1303                 packet_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1304                 packet_len -= CRC_SIZE;
1305
1306                 net_process_received_packet(pkt_ptr, packet_len);
1307
1308                 bytes_process +=
1309                         (packet_len + sizeof(struct rx_desc) + CRC_SIZE);
1310
1311                 if (bytes_process % 8)
1312                         bytes_process = bytes_process + 8 - (bytes_process % 8);
1313         }
1314
1315         return 0;
1316 }
1317
1318 static void r8152_halt(struct eth_device *eth)
1319 {
1320         struct ueth_data *dev = (struct ueth_data *)eth->priv;
1321         struct r8152 *tp = (struct r8152 *)dev->dev_priv;
1322
1323         debug("** %s()\n", __func__);
1324
1325         tp->rtl_ops.disable(tp);
1326 }
1327
1328 static int r8152_write_hwaddr(struct eth_device *eth)
1329 {
1330         struct ueth_data *dev = (struct ueth_data *)eth->priv;
1331         struct r8152 *tp = (struct r8152 *)dev->dev_priv;
1332
1333         unsigned char enetaddr[8] = {0};
1334
1335         memcpy(enetaddr, eth->enetaddr, ETH_ALEN);
1336
1337         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1338         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, enetaddr);
1339         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1340
1341         debug("MAC %pM\n", eth->enetaddr);
1342         return 0;
1343 }
1344
1345 void r8152_eth_before_probe(void)
1346 {
1347         curr_eth_dev = 0;
1348 }
1349
1350 /* Probe to see if a new device is actually an realtek device */
1351 int r8152_eth_probe(struct usb_device *dev, unsigned int ifnum,
1352                       struct ueth_data *ss)
1353 {
1354         struct usb_interface *iface;
1355         struct usb_interface_descriptor *iface_desc;
1356         int ep_in_found = 0, ep_out_found = 0;
1357         int i;
1358
1359         struct r8152 *tp;
1360
1361         /* let's examine the device now */
1362         iface = &dev->config.if_desc[ifnum];
1363         iface_desc = &dev->config.if_desc[ifnum].desc;
1364
1365         for (i = 0; i < ARRAY_SIZE(r8152_dongles); i++) {
1366                 if (dev->descriptor.idVendor == r8152_dongles[i].vendor &&
1367                     dev->descriptor.idProduct == r8152_dongles[i].product)
1368                         /* Found a supported dongle */
1369                         break;
1370         }
1371
1372         if (i == ARRAY_SIZE(r8152_dongles))
1373                 return 0;
1374
1375         memset(ss, 0, sizeof(struct ueth_data));
1376
1377         /* At this point, we know we've got a live one */
1378         debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n",
1379               dev->descriptor.idVendor, dev->descriptor.idProduct);
1380
1381         /* Initialize the ueth_data structure with some useful info */
1382         ss->ifnum = ifnum;
1383         ss->pusb_dev = dev;
1384         ss->subclass = iface_desc->bInterfaceSubClass;
1385         ss->protocol = iface_desc->bInterfaceProtocol;
1386
1387         /* alloc driver private */
1388         ss->dev_priv = calloc(1, sizeof(struct r8152));
1389
1390         if (!ss->dev_priv)
1391                 return 0;
1392
1393         /*
1394          * We are expecting a minimum of 3 endpoints - in, out (bulk), and
1395          * int. We will ignore any others.
1396          */
1397         for (i = 0; i < iface_desc->bNumEndpoints; i++) {
1398                 /* is it an BULK endpoint? */
1399                 if ((iface->ep_desc[i].bmAttributes &
1400                      USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
1401                         u8 ep_addr = iface->ep_desc[i].bEndpointAddress;
1402                         if ((ep_addr & USB_DIR_IN) && !ep_in_found) {
1403                                 ss->ep_in = ep_addr &
1404                                         USB_ENDPOINT_NUMBER_MASK;
1405                                 ep_in_found = 1;
1406                         } else {
1407                                 if (!ep_out_found) {
1408                                         ss->ep_out = ep_addr &
1409                                                 USB_ENDPOINT_NUMBER_MASK;
1410                                         ep_out_found = 1;
1411                                 }
1412                         }
1413                 }
1414
1415                 /* is it an interrupt endpoint? */
1416                 if ((iface->ep_desc[i].bmAttributes &
1417                     USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
1418                         ss->ep_int = iface->ep_desc[i].bEndpointAddress &
1419                                 USB_ENDPOINT_NUMBER_MASK;
1420                         ss->irqinterval = iface->ep_desc[i].bInterval;
1421                 }
1422         }
1423
1424         debug("Endpoints In %d Out %d Int %d\n",
1425               ss->ep_in, ss->ep_out, ss->ep_int);
1426
1427         /* Do some basic sanity checks, and bail if we find a problem */
1428         if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
1429             !ss->ep_in || !ss->ep_out || !ss->ep_int) {
1430                 debug("Problems with device\n");
1431                 return 0;
1432         }
1433
1434         dev->privptr = (void *)ss;
1435
1436         tp = ss->dev_priv;
1437         tp->udev = dev;
1438         tp->intf = iface;
1439
1440         r8152b_get_version(tp);
1441
1442         if (rtl_ops_init(tp))
1443                 return 0;
1444
1445         tp->rtl_ops.init(tp);
1446         tp->rtl_ops.up(tp);
1447
1448         rtl8152_set_speed(tp, AUTONEG_ENABLE,
1449                           tp->supports_gmii ? SPEED_1000 : SPEED_100,
1450                           DUPLEX_FULL);
1451
1452         return 1;
1453 }
1454
1455 int r8152_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
1456                                 struct eth_device *eth)
1457 {
1458         if (!eth) {
1459                 debug("%s: missing parameter.\n", __func__);
1460                 return 0;
1461         }
1462
1463         sprintf(eth->name, "%s#%d", R8152_BASE_NAME, curr_eth_dev++);
1464         eth->init = r8152_init;
1465         eth->send = r8152_send;
1466         eth->recv = r8152_recv;
1467         eth->halt = r8152_halt;
1468         eth->write_hwaddr = r8152_write_hwaddr;
1469         eth->priv = ss;
1470
1471         /* Get the MAC address */
1472         if (r8152_read_mac(ss->dev_priv, eth->enetaddr) < 0)
1473                 return 0;
1474
1475         debug("MAC %pM\n", eth->enetaddr);
1476         return 1;
1477 }
1478 #endif /* !CONFIG_DM_ETH */
1479
1480 #ifdef CONFIG_DM_ETH
1481 static int r8152_eth_start(struct udevice *dev)
1482 {
1483         struct r8152 *tp = dev_get_priv(dev);
1484
1485         debug("** %s (%d)\n", __func__, __LINE__);
1486
1487         return r8152_init_common(tp);
1488 }
1489
1490 void r8152_eth_stop(struct udevice *dev)
1491 {
1492         struct r8152 *tp = dev_get_priv(dev);
1493
1494         debug("** %s (%d)\n", __func__, __LINE__);
1495
1496         tp->rtl_ops.disable(tp);
1497 }
1498
1499 int r8152_eth_send(struct udevice *dev, void *packet, int length)
1500 {
1501         struct r8152 *tp = dev_get_priv(dev);
1502
1503         return r8152_send_common(&tp->ueth, packet, length);
1504 }
1505
1506 int r8152_eth_recv(struct udevice *dev, int flags, uchar **packetp)
1507 {
1508         struct r8152 *tp = dev_get_priv(dev);
1509         struct ueth_data *ueth = &tp->ueth;
1510         uint8_t *ptr;
1511         int ret, len;
1512         struct rx_desc *rx_desc;
1513         u16 packet_len;
1514
1515         len = usb_ether_get_rx_bytes(ueth, &ptr);
1516         debug("%s: first try, len=%d\n", __func__, len);
1517         if (!len) {
1518                 if (!(flags & ETH_RECV_CHECK_DEVICE))
1519                         return -EAGAIN;
1520                 ret = usb_ether_receive(ueth, RTL8152_AGG_BUF_SZ);
1521                 if (ret)
1522                         return ret;
1523
1524                 len = usb_ether_get_rx_bytes(ueth, &ptr);
1525                 debug("%s: second try, len=%d\n", __func__, len);
1526         }
1527
1528         rx_desc = (struct rx_desc *)ptr;
1529         packet_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1530         packet_len -= CRC_SIZE;
1531
1532         if (packet_len > len - (sizeof(struct rx_desc) + CRC_SIZE)) {
1533                 debug("Rx: too large packet: %d\n", packet_len);
1534                 goto err;
1535         }
1536
1537         *packetp = ptr + sizeof(struct rx_desc);
1538         return packet_len;
1539
1540 err:
1541         usb_ether_advance_rxbuf(ueth, -1);
1542         return -ENOSPC;
1543 }
1544
1545 static int r8152_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
1546 {
1547         struct r8152 *tp = dev_get_priv(dev);
1548
1549         packet_len += sizeof(struct rx_desc) + CRC_SIZE;
1550         packet_len = ALIGN(packet_len, 8);
1551         usb_ether_advance_rxbuf(&tp->ueth, packet_len);
1552
1553         return 0;
1554 }
1555
1556 static int r8152_write_hwaddr(struct udevice *dev)
1557 {
1558         struct eth_pdata *pdata = dev_get_platdata(dev);
1559         struct r8152 *tp = dev_get_priv(dev);
1560
1561         unsigned char enetaddr[8] = { 0 };
1562
1563         debug("** %s (%d)\n", __func__, __LINE__);
1564         memcpy(enetaddr, pdata->enetaddr, ETH_ALEN);
1565
1566         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1567         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, enetaddr);
1568         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1569
1570         debug("MAC %pM\n", pdata->enetaddr);
1571         return 0;
1572 }
1573
1574 int r8152_read_rom_hwaddr(struct udevice *dev)
1575 {
1576         struct eth_pdata *pdata = dev_get_platdata(dev);
1577         struct r8152 *tp = dev_get_priv(dev);
1578
1579         debug("** %s (%d)\n", __func__, __LINE__);
1580         r8152_read_mac(tp, pdata->enetaddr);
1581         return 0;
1582 }
1583
1584 static int r8152_eth_probe(struct udevice *dev)
1585 {
1586         struct usb_device *udev = dev_get_parent_priv(dev);
1587         struct eth_pdata *pdata = dev_get_platdata(dev);
1588         struct r8152 *tp = dev_get_priv(dev);
1589         struct ueth_data *ueth = &tp->ueth;
1590         int ret;
1591
1592         tp->udev = udev;
1593         r8152_read_mac(tp, pdata->enetaddr);
1594
1595         r8152b_get_version(tp);
1596
1597         ret = rtl_ops_init(tp);
1598         if (ret)
1599                 return ret;
1600
1601         tp->rtl_ops.init(tp);
1602         tp->rtl_ops.up(tp);
1603
1604         rtl8152_set_speed(tp, AUTONEG_ENABLE,
1605                           tp->supports_gmii ? SPEED_1000 : SPEED_100,
1606                           DUPLEX_FULL);
1607
1608         return usb_ether_register(dev, ueth, RTL8152_AGG_BUF_SZ);
1609 }
1610
1611 static const struct eth_ops r8152_eth_ops = {
1612         .start  = r8152_eth_start,
1613         .send   = r8152_eth_send,
1614         .recv   = r8152_eth_recv,
1615         .free_pkt = r8152_free_pkt,
1616         .stop   = r8152_eth_stop,
1617         .write_hwaddr = r8152_write_hwaddr,
1618         .read_rom_hwaddr = r8152_read_rom_hwaddr,
1619 };
1620
1621 U_BOOT_DRIVER(r8152_eth) = {
1622         .name   = "r8152_eth",
1623         .id     = UCLASS_ETH,
1624         .probe = r8152_eth_probe,
1625         .ops    = &r8152_eth_ops,
1626         .priv_auto_alloc_size = sizeof(struct r8152),
1627         .platdata_auto_alloc_size = sizeof(struct eth_pdata),
1628 };
1629
1630 static const struct usb_device_id r8152_eth_id_table[] = {
1631         /* Realtek */
1632         { USB_DEVICE(0x0bda, 0x8050) },
1633         { USB_DEVICE(0x0bda, 0x8152) },
1634         { USB_DEVICE(0x0bda, 0x8153) },
1635
1636         /* Samsung */
1637         { USB_DEVICE(0x04e8, 0xa101) },
1638
1639         /* Lenovo */
1640         { USB_DEVICE(0x17ef, 0x304f) },
1641         { USB_DEVICE(0x17ef, 0x3052) },
1642         { USB_DEVICE(0x17ef, 0x3054) },
1643         { USB_DEVICE(0x17ef, 0x3057) },
1644         { USB_DEVICE(0x17ef, 0x7205) },
1645         { USB_DEVICE(0x17ef, 0x720a) },
1646         { USB_DEVICE(0x17ef, 0x720b) },
1647         { USB_DEVICE(0x17ef, 0x720c) },
1648
1649         /* TP-LINK */
1650         { USB_DEVICE(0x2357, 0x0601) },
1651
1652         /* Nvidia */
1653         { USB_DEVICE(0x0955, 0x09ff) },
1654
1655         { }             /* Terminating entry */
1656 };
1657
1658 U_BOOT_USB_DEVICE(r8152_eth, r8152_eth_id_table);
1659 #endif /* CONFIG_DM_ETH */
1660