drivers/ufs/cdns-platform.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /**
   3  * cdns-platform.c - Platform driver for Cadence UFSHCI device
   4  *
   5  * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
   6  */
   7
   8 #include <clk.h>
   9 #include <common.h>
  10 #include <dm.h>
  11 #include <ufs.h>
  12
  13 #include "ufs.h"
  14
  15 #define USEC_PER_SEC    1000000L
  16
  17 #define CDNS_UFS_REG_HCLKDIV    0xFC
  18 #define CDNS_UFS_REG_PHY_XCFGD1 0x113C
  19
  20 static int cdns_ufs_link_startup_notify(struct ufs_hba *hba,
  21                                         enum ufs_notify_change_status status)
  22 {
  23         hba->quirks |= UFSHCD_QUIRK_BROKEN_LCC;
  24         switch (status) {
  25         case PRE_CHANGE:
  26                 return ufshcd_dme_set(hba,
  27                                       UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE),
  28                                       0);
  29         case POST_CHANGE:
  30         ;
  31         }
  32
  33         return 0;
  34 }
  35
  36 static int cdns_ufs_set_hclkdiv(struct ufs_hba *hba)
  37 {
  38         struct clk clk;
  39         unsigned long core_clk_rate = 0;
  40         u32 core_clk_div = 0;
  41         int ret;
  42
  43         ret = clk_get_by_name(hba->dev, "core_clk", &clk);
  44         if (ret) {
  45                 dev_err(hba->dev, "failed to get core_clk clock\n");
  46                 return ret;
  47         }
  48
  49         core_clk_rate = clk_get_rate(&clk);
  50         if (IS_ERR_VALUE(core_clk_rate)) {
  51                 dev_err(hba->dev, "%s: unable to find core_clk rate\n",
  52                         __func__);
  53                 return core_clk_rate;
  54         }
  55
  56         core_clk_div = core_clk_rate / USEC_PER_SEC;
  57         ufshcd_writel(hba, core_clk_div, CDNS_UFS_REG_HCLKDIV);
  58
  59         return 0;
  60 }
  61
  62 static int cdns_ufs_hce_enable_notify(struct ufs_hba *hba,
  63                                       enum ufs_notify_change_status status)
  64 {
  65         switch (status) {
  66         case PRE_CHANGE:
  67                 return cdns_ufs_set_hclkdiv(hba);
  68         case POST_CHANGE:
  69         ;
  70         }
  71
  72         return 0;
  73 }
  74
  75 static int cdns_ufs_init(struct ufs_hba *hba)
  76 {
  77         u32 data;
  78
  79         /* Increase RX_Advanced_Min_ActivateTime_Capability */
  80         data = ufshcd_readl(hba, CDNS_UFS_REG_PHY_XCFGD1);
  81         data |= BIT(24);
  82         ufshcd_writel(hba, data, CDNS_UFS_REG_PHY_XCFGD1);
  83
  84         return 0;
  85 }
  86
  87 static struct ufs_hba_ops cdns_pltfm_hba_ops = {
  88         .init = cdns_ufs_init,
  89         .hce_enable_notify = cdns_ufs_hce_enable_notify,
  90         .link_startup_notify = cdns_ufs_link_startup_notify,
  91 };
  92
  93 static int cdns_ufs_pltfm_probe(struct udevice *dev)
  94 {
  95         int err = ufshcd_probe(dev, &cdns_pltfm_hba_ops);
  96         if (err)
  97                 dev_err(dev, "ufshcd_probe() failed %d\n", err);
  98
  99         return err;
 100 }
 101
 102 static int cdns_ufs_pltfm_bind(struct udevice *dev)
 103 {
 104         struct udevice *scsi_dev;
 105
 106         return ufs_scsi_bind(dev, &scsi_dev);
 107 }
 108
 109 static const struct udevice_id cdns_ufs_pltfm_ids[] = {
 110         {
 111                 .compatible = "cdns,ufshc-m31-16nm",
 112         },
 113         {},
 114 };
 115
 116 U_BOOT_DRIVER(cdns_ufs_pltfm) = {
 117         .name           = "cdns-ufs-pltfm",
 118         .id             =  UCLASS_UFS,
 119         .of_match       = cdns_ufs_pltfm_ids,
 120         .probe          = cdns_ufs_pltfm_probe,
 121         .bind           = cdns_ufs_pltfm_bind,
 122 };