drivers/serial/serial_stm32.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
   4  * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
   5  */
   6
   7 #include <common.h>
   8 #include <clk.h>
   9 #include <dm.h>
  10 #include <log.h>
  11 #include <reset.h>
  12 #include <serial.h>
  13 #include <watchdog.h>
  14 #include <asm/io.h>
  15 #include <asm/arch/stm32.h>
  16 #include "serial_stm32.h"
  17 #include <dm/device_compat.h>
  18
  19 static void _stm32_serial_setbrg(fdt_addr_t base,
  20                                  struct stm32_uart_info *uart_info,
  21                                  u32 clock_rate,
  22                                  int baudrate)
  23 {
  24         bool stm32f4 = uart_info->stm32f4;
  25         u32 int_div, mantissa, fraction, oversampling;
  26
  27         int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate);
  28
  29         if (int_div < 16) {
  30                 oversampling = 8;
  31                 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
  32         } else {
  33                 oversampling = 16;
  34                 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
  35         }
  36
  37         mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
  38         fraction = int_div % oversampling;
  39
  40         writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
  41 }
  42
  43 static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
  44 {
  45         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  46
  47         _stm32_serial_setbrg(plat->base, plat->uart_info,
  48                              plat->clock_rate, baudrate);
  49
  50         return 0;
  51 }
  52
  53 static int stm32_serial_setconfig(struct udevice *dev, uint serial_config)
  54 {
  55         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  56         bool stm32f4 = plat->uart_info->stm32f4;
  57         u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
  58         u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
  59         u32 config = 0;
  60         uint parity = SERIAL_GET_PARITY(serial_config);
  61         uint bits = SERIAL_GET_BITS(serial_config);
  62         uint stop = SERIAL_GET_STOP(serial_config);
  63
  64         /*
  65          * only parity config is implemented, check if other serial settings
  66          * are the default one.
  67          * (STM32F4 serial IP didn't support parity setting)
  68          */
  69         if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP || stm32f4)
  70                 return -ENOTSUPP; /* not supported in driver*/
  71
  72         clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
  73         /* update usart configuration (uart need to be disable)
  74          * PCE: parity check enable
  75          * PS : '0' : Even / '1' : Odd
  76          * M[1:0] = '00' : 8 Data bits
  77          * M[1:0] = '01' : 9 Data bits with parity
  78          */
  79         switch (parity) {
  80         default:
  81         case SERIAL_PAR_NONE:
  82                 config = 0;
  83                 break;
  84         case SERIAL_PAR_ODD:
  85                 config = USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0;
  86                 break;
  87         case SERIAL_PAR_EVEN:
  88                 config = USART_CR1_PCE | USART_CR1_M0;
  89                 break;
  90         }
  91
  92         clrsetbits_le32(cr1,
  93                         USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 |
  94                         USART_CR1_M0,
  95                         config);
  96         setbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
  97
  98         return 0;
  99 }
 100
 101 static int stm32_serial_getc(struct udevice *dev)
 102 {
 103         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 104         bool stm32f4 = plat->uart_info->stm32f4;
 105         fdt_addr_t base = plat->base;
 106         u32 isr = readl(base + ISR_OFFSET(stm32f4));
 107
 108         if ((isr & USART_ISR_RXNE) == 0)
 109                 return -EAGAIN;
 110
 111         if (isr & (USART_ISR_PE | USART_ISR_ORE | USART_ISR_FE)) {
 112                 if (!stm32f4)
 113                         setbits_le32(base + ICR_OFFSET,
 114                                      USART_ICR_PCECF | USART_ICR_ORECF |
 115                                      USART_ICR_FECF);
 116                 else
 117                         readl(base + RDR_OFFSET(stm32f4));
 118                 return -EIO;
 119         }
 120
 121         return readl(base + RDR_OFFSET(stm32f4));
 122 }
 123
 124 static int _stm32_serial_putc(fdt_addr_t base,
 125                               struct stm32_uart_info *uart_info,
 126                               const char c)
 127 {
 128         bool stm32f4 = uart_info->stm32f4;
 129
 130         if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_TXE) == 0)
 131                 return -EAGAIN;
 132
 133         writel(c, base + TDR_OFFSET(stm32f4));
 134
 135         return 0;
 136 }
 137
 138 static int stm32_serial_putc(struct udevice *dev, const char c)
 139 {
 140         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 141
 142         return _stm32_serial_putc(plat->base, plat->uart_info, c);
 143 }
 144
 145 static int stm32_serial_pending(struct udevice *dev, bool input)
 146 {
 147         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 148         bool stm32f4 = plat->uart_info->stm32f4;
 149         fdt_addr_t base = plat->base;
 150
 151         if (input)
 152                 return readl(base + ISR_OFFSET(stm32f4)) &
 153                         USART_ISR_RXNE ? 1 : 0;
 154         else
 155                 return readl(base + ISR_OFFSET(stm32f4)) &
 156                         USART_ISR_TXE ? 0 : 1;
 157 }
 158
 159 static void _stm32_serial_init(fdt_addr_t base,
 160                                struct stm32_uart_info *uart_info)
 161 {
 162         bool stm32f4 = uart_info->stm32f4;
 163         u8 uart_enable_bit = uart_info->uart_enable_bit;
 164
 165         /* Disable uart-> enable fifo -> enable uart */
 166         clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
 167                      BIT(uart_enable_bit));
 168         if (uart_info->has_fifo)
 169                 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
 170         setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
 171                      BIT(uart_enable_bit));
 172 }
 173
 174 static int stm32_serial_probe(struct udevice *dev)
 175 {
 176         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 177         struct clk clk;
 178         struct reset_ctl reset;
 179         int ret;
 180
 181         plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
 182
 183         ret = clk_get_by_index(dev, 0, &clk);
 184         if (ret < 0)
 185                 return ret;
 186
 187         ret = clk_enable(&clk);
 188         if (ret) {
 189                 dev_err(dev, "failed to enable clock\n");
 190                 return ret;
 191         }
 192
 193         ret = reset_get_by_index(dev, 0, &reset);
 194         if (!ret) {
 195                 reset_assert(&reset);
 196                 udelay(2);
 197                 reset_deassert(&reset);
 198         }
 199
 200         plat->clock_rate = clk_get_rate(&clk);
 201         if (!plat->clock_rate) {
 202                 clk_disable(&clk);
 203                 return -EINVAL;
 204         };
 205
 206         _stm32_serial_init(plat->base, plat->uart_info);
 207
 208         return 0;
 209 }
 210
 211 static const struct udevice_id stm32_serial_id[] = {
 212         { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
 213         { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
 214         { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
 215         {}
 216 };
 217
 218 static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
 219 {
 220         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 221
 222         plat->base = devfdt_get_addr(dev);
 223         if (plat->base == FDT_ADDR_T_NONE)
 224                 return -EINVAL;
 225
 226         return 0;
 227 }
 228
 229 static const struct dm_serial_ops stm32_serial_ops = {
 230         .putc = stm32_serial_putc,
 231         .pending = stm32_serial_pending,
 232         .getc = stm32_serial_getc,
 233         .setbrg = stm32_serial_setbrg,
 234         .setconfig = stm32_serial_setconfig
 235 };
 236
 237 U_BOOT_DRIVER(serial_stm32) = {
 238         .name = "serial_stm32",
 239         .id = UCLASS_SERIAL,
 240         .of_match = of_match_ptr(stm32_serial_id),
 241         .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
 242         .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
 243         .ops = &stm32_serial_ops,
 244         .probe = stm32_serial_probe,
 245 #if !CONFIG_IS_ENABLED(OF_CONTROL)
 246         .flags = DM_FLAG_PRE_RELOC,
 247 #endif
 248 };
 249
 250 #ifdef CONFIG_DEBUG_UART_STM32
 251 #include <debug_uart.h>
 252 static inline struct stm32_uart_info *_debug_uart_info(void)
 253 {
 254         struct stm32_uart_info *uart_info;
 255
 256 #if defined(CONFIG_STM32F4)
 257         uart_info = &stm32f4_info;
 258 #elif defined(CONFIG_STM32F7)
 259         uart_info = &stm32f7_info;
 260 #else
 261         uart_info = &stm32h7_info;
 262 #endif
 263         return uart_info;
 264 }
 265
 266 static inline void _debug_uart_init(void)
 267 {
 268         fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
 269         struct stm32_uart_info *uart_info = _debug_uart_info();
 270
 271         _stm32_serial_init(base, uart_info);
 272         _stm32_serial_setbrg(base, uart_info,
 273                              CONFIG_DEBUG_UART_CLOCK,
 274                              CONFIG_BAUDRATE);
 275 }
 276
 277 static inline void _debug_uart_putc(int c)
 278 {
 279         fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
 280         struct stm32_uart_info *uart_info = _debug_uart_info();
 281
 282         while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN)
 283                 ;
 284 }
 285
 286 DEBUG_UART_FUNCS
 287 #endif