drivers/serial/serial_stm32.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
   4  * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
   5  */
   6
   7 #include <common.h>
   8 #include <clk.h>
   9 #include <dm.h>
  10 #include <log.h>
  11 #include <reset.h>
  12 #include <serial.h>
  13 #include <watchdog.h>
  14 #include <asm/io.h>
  15 #include <asm/arch/stm32.h>
  16 #include <linux/delay.h>
  17 #include "serial_stm32.h"
  18 #include <dm/device_compat.h>
  19
  20 static void _stm32_serial_setbrg(fdt_addr_t base,
  21                                  struct stm32_uart_info *uart_info,
  22                                  u32 clock_rate,
  23                                  int baudrate)
  24 {
  25         bool stm32f4 = uart_info->stm32f4;
  26         u32 int_div, mantissa, fraction, oversampling;
  27
  28         int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate);
  29
  30         if (int_div < 16) {
  31                 oversampling = 8;
  32                 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
  33         } else {
  34                 oversampling = 16;
  35                 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
  36         }
  37
  38         mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
  39         fraction = int_div % oversampling;
  40
  41         writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
  42 }
  43
  44 static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
  45 {
  46         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  47
  48         _stm32_serial_setbrg(plat->base, plat->uart_info,
  49                              plat->clock_rate, baudrate);
  50
  51         return 0;
  52 }
  53
  54 static int stm32_serial_setconfig(struct udevice *dev, uint serial_config)
  55 {
  56         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  57         bool stm32f4 = plat->uart_info->stm32f4;
  58         u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
  59         u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
  60         u32 config = 0;
  61         uint parity = SERIAL_GET_PARITY(serial_config);
  62         uint bits = SERIAL_GET_BITS(serial_config);
  63         uint stop = SERIAL_GET_STOP(serial_config);
  64
  65         /*
  66          * only parity config is implemented, check if other serial settings
  67          * are the default one.
  68          * (STM32F4 serial IP didn't support parity setting)
  69          */
  70         if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP || stm32f4)
  71                 return -ENOTSUPP; /* not supported in driver*/
  72
  73         clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
  74         /* update usart configuration (uart need to be disable)
  75          * PCE: parity check enable
  76          * PS : '0' : Even / '1' : Odd
  77          * M[1:0] = '00' : 8 Data bits
  78          * M[1:0] = '01' : 9 Data bits with parity
  79          */
  80         switch (parity) {
  81         default:
  82         case SERIAL_PAR_NONE:
  83                 config = 0;
  84                 break;
  85         case SERIAL_PAR_ODD:
  86                 config = USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0;
  87                 break;
  88         case SERIAL_PAR_EVEN:
  89                 config = USART_CR1_PCE | USART_CR1_M0;
  90                 break;
  91         }
  92
  93         clrsetbits_le32(cr1,
  94                         USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 |
  95                         USART_CR1_M0,
  96                         config);
  97         setbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
  98
  99         return 0;
 100 }
 101
 102 static int stm32_serial_getc(struct udevice *dev)
 103 {
 104         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 105         bool stm32f4 = plat->uart_info->stm32f4;
 106         fdt_addr_t base = plat->base;
 107         u32 isr = readl(base + ISR_OFFSET(stm32f4));
 108
 109         if ((isr & USART_ISR_RXNE) == 0)
 110                 return -EAGAIN;
 111
 112         if (isr & (USART_ISR_PE | USART_ISR_ORE | USART_ISR_FE)) {
 113                 if (!stm32f4)
 114                         setbits_le32(base + ICR_OFFSET,
 115                                      USART_ICR_PCECF | USART_ICR_ORECF |
 116                                      USART_ICR_FECF);
 117                 else
 118                         readl(base + RDR_OFFSET(stm32f4));
 119                 return -EIO;
 120         }
 121
 122         return readl(base + RDR_OFFSET(stm32f4));
 123 }
 124
 125 static int _stm32_serial_putc(fdt_addr_t base,
 126                               struct stm32_uart_info *uart_info,
 127                               const char c)
 128 {
 129         bool stm32f4 = uart_info->stm32f4;
 130
 131         if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_TXE) == 0)
 132                 return -EAGAIN;
 133
 134         writel(c, base + TDR_OFFSET(stm32f4));
 135
 136         return 0;
 137 }
 138
 139 static int stm32_serial_putc(struct udevice *dev, const char c)
 140 {
 141         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 142
 143         return _stm32_serial_putc(plat->base, plat->uart_info, c);
 144 }
 145
 146 static int stm32_serial_pending(struct udevice *dev, bool input)
 147 {
 148         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 149         bool stm32f4 = plat->uart_info->stm32f4;
 150         fdt_addr_t base = plat->base;
 151
 152         if (input)
 153                 return readl(base + ISR_OFFSET(stm32f4)) &
 154                         USART_ISR_RXNE ? 1 : 0;
 155         else
 156                 return readl(base + ISR_OFFSET(stm32f4)) &
 157                         USART_ISR_TXE ? 0 : 1;
 158 }
 159
 160 static void _stm32_serial_init(fdt_addr_t base,
 161                                struct stm32_uart_info *uart_info)
 162 {
 163         bool stm32f4 = uart_info->stm32f4;
 164         u8 uart_enable_bit = uart_info->uart_enable_bit;
 165
 166         /* Disable uart-> enable fifo -> enable uart */
 167         clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
 168                      BIT(uart_enable_bit));
 169         if (uart_info->has_fifo)
 170                 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
 171         setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
 172                      BIT(uart_enable_bit));
 173 }
 174
 175 static int stm32_serial_probe(struct udevice *dev)
 176 {
 177         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 178         struct clk clk;
 179         struct reset_ctl reset;
 180         int ret;
 181
 182         plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
 183
 184         ret = clk_get_by_index(dev, 0, &clk);
 185         if (ret < 0)
 186                 return ret;
 187
 188         ret = clk_enable(&clk);
 189         if (ret) {
 190                 dev_err(dev, "failed to enable clock\n");
 191                 return ret;
 192         }
 193
 194         ret = reset_get_by_index(dev, 0, &reset);
 195         if (!ret) {
 196                 reset_assert(&reset);
 197                 udelay(2);
 198                 reset_deassert(&reset);
 199         }
 200
 201         plat->clock_rate = clk_get_rate(&clk);
 202         if (!plat->clock_rate) {
 203                 clk_disable(&clk);
 204                 return -EINVAL;
 205         };
 206
 207         _stm32_serial_init(plat->base, plat->uart_info);
 208
 209         return 0;
 210 }
 211
 212 static const struct udevice_id stm32_serial_id[] = {
 213         { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
 214         { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
 215         { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
 216         {}
 217 };
 218
 219 static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
 220 {
 221         struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 222
 223         plat->base = devfdt_get_addr(dev);
 224         if (plat->base == FDT_ADDR_T_NONE)
 225                 return -EINVAL;
 226
 227         return 0;
 228 }
 229
 230 static const struct dm_serial_ops stm32_serial_ops = {
 231         .putc = stm32_serial_putc,
 232         .pending = stm32_serial_pending,
 233         .getc = stm32_serial_getc,
 234         .setbrg = stm32_serial_setbrg,
 235         .setconfig = stm32_serial_setconfig
 236 };
 237
 238 U_BOOT_DRIVER(serial_stm32) = {
 239         .name = "serial_stm32",
 240         .id = UCLASS_SERIAL,
 241         .of_match = of_match_ptr(stm32_serial_id),
 242         .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
 243         .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
 244         .ops = &stm32_serial_ops,
 245         .probe = stm32_serial_probe,
 246 #if !CONFIG_IS_ENABLED(OF_CONTROL)
 247         .flags = DM_FLAG_PRE_RELOC,
 248 #endif
 249 };
 250
 251 #ifdef CONFIG_DEBUG_UART_STM32
 252 #include <debug_uart.h>
 253 static inline struct stm32_uart_info *_debug_uart_info(void)
 254 {
 255         struct stm32_uart_info *uart_info;
 256
 257 #if defined(CONFIG_STM32F4)
 258         uart_info = &stm32f4_info;
 259 #elif defined(CONFIG_STM32F7)
 260         uart_info = &stm32f7_info;
 261 #else
 262         uart_info = &stm32h7_info;
 263 #endif
 264         return uart_info;
 265 }
 266
 267 static inline void _debug_uart_init(void)
 268 {
 269         fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
 270         struct stm32_uart_info *uart_info = _debug_uart_info();
 271
 272         _stm32_serial_init(base, uart_info);
 273         _stm32_serial_setbrg(base, uart_info,
 274                              CONFIG_DEBUG_UART_CLOCK,
 275                              CONFIG_BAUDRATE);
 276 }
 277
 278 static inline void _debug_uart_putc(int c)
 279 {
 280         fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
 281         struct stm32_uart_info *uart_info = _debug_uart_info();
 282
 283         while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN)
 284                 ;
 285 }
 286
 287 DEBUG_UART_FUNCS
 288 #endif