1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2019, STMicroelectronics - All Rights Reserved
14 #include "stm32mp1_ddr.h"
15 #include "stm32mp1_tests.h"
17 DECLARE_GLOBAL_DATA_PTR;
35 const char *step_str[] = {
36 [STEP_DDR_RESET] = "DDR_RESET",
37 [STEP_CTL_INIT] = "DDR_CTRL_INIT_DONE",
38 [STEP_PHY_INIT] = "DDR PHY_INIT_DONE",
39 [STEP_DDR_READY] = "DDR_READY",
43 enum ddr_command stm32mp1_get_command(char *cmd, int argc)
45 const char *cmd_string[DDR_CMD_UNKNOWN] = {
46 [DDR_CMD_HELP] = "help",
47 [DDR_CMD_INFO] = "info",
48 [DDR_CMD_FREQ] = "freq",
49 [DDR_CMD_RESET] = "reset",
50 [DDR_CMD_PARAM] = "param",
51 [DDR_CMD_PRINT] = "print",
52 [DDR_CMD_EDIT] = "edit",
53 [DDR_CMD_STEP] = "step",
54 [DDR_CMD_NEXT] = "next",
56 #ifdef CONFIG_STM32MP1_DDR_TESTS
57 [DDR_CMD_TEST] = "test",
59 #ifdef CONFIG_STM32MP1_DDR_TUNING
60 [DDR_CMD_TUNING] = "tuning",
63 /* min and max number of argument */
64 const char cmd_arg[DDR_CMD_UNKNOWN][2] = {
65 [DDR_CMD_HELP] = { 0, 0 },
66 [DDR_CMD_INFO] = { 0, 255 },
67 [DDR_CMD_FREQ] = { 0, 1 },
68 [DDR_CMD_RESET] = { 0, 0 },
69 [DDR_CMD_PARAM] = { 0, 2 },
70 [DDR_CMD_PRINT] = { 0, 1 },
71 [DDR_CMD_EDIT] = { 2, 2 },
72 [DDR_CMD_STEP] = { 0, 1 },
73 [DDR_CMD_NEXT] = { 0, 0 },
74 [DDR_CMD_GO] = { 0, 0 },
75 #ifdef CONFIG_STM32MP1_DDR_TESTS
76 [DDR_CMD_TEST] = { 0, 255 },
78 #ifdef CONFIG_STM32MP1_DDR_TUNING
79 [DDR_CMD_TUNING] = { 0, 255 },
84 for (i = 0; i < DDR_CMD_UNKNOWN; i++)
85 if (!strcmp(cmd, cmd_string[i])) {
86 if (argc - 1 < cmd_arg[i][0]) {
87 printf("no enought argument (min=%d)\n",
89 return DDR_CMD_UNKNOWN;
90 } else if (argc - 1 > cmd_arg[i][1]) {
91 printf("too many argument (max=%d)\n",
93 return DDR_CMD_UNKNOWN;
99 printf("unknown command %s\n", cmd);
100 return DDR_CMD_UNKNOWN;
103 static void stm32mp1_do_usage(void)
105 const char *usage = {
107 "help displays help\n"
108 "info displays DDR information\n"
109 "info <param> <val> changes DDR information\n"
110 " with <param> = step, name, size, speed or cal\n"
111 "freq displays the DDR PHY frequency in kHz\n"
112 "freq <freq> changes the DDR PHY frequency\n"
113 "param [type|reg] prints input parameters\n"
114 "param <reg> <val> edits parameters in step 0\n"
115 "print [type|reg] dumps registers\n"
116 "edit <reg> <val> modifies one register\n"
117 "step lists the available step\n"
118 "step <n> go to the step <n>\n"
119 "next goes to the next step\n"
120 "go continues the U-Boot SPL execution\n"
121 "reset reboots machine\n"
122 #ifdef CONFIG_STM32MP1_DDR_TESTS
123 "test [help] | <n> [...] lists (with help) or executes test <n>\n"
125 #ifdef CONFIG_STM32MP1_DDR_TUNING
126 "tuning [help] | <n> [...] lists (with help) or execute tuning <n>\n"
128 "\nwith for [type|reg]:\n"
129 " all registers if absent\n"
130 " <type> = ctl, phy\n"
131 " or one category (static, timing, map, perf, cal, dyn)\n"
132 " <reg> = name of the register\n"
138 static bool stm32mp1_check_step(enum stm32mp1_ddr_interact_step step,
139 enum stm32mp1_ddr_interact_step expected)
141 if (step != expected) {
142 printf("invalid step %d:%s expecting %d:%s\n",
143 step, step_str[step],
151 static void stm32mp1_do_info(struct ddr_info *priv,
152 struct stm32mp1_ddr_config *config,
153 enum stm32mp1_ddr_interact_step step,
154 int argc, char *const argv[])
157 static char *ddr_name;
160 printf("step = %d : %s\n", step, step_str[step]);
161 printf("name = %s\n", config->info.name);
162 printf("size = 0x%x\n", config->info.size);
163 printf("speed = %d kHz\n", config->info.speed);
164 printf("cal = %d\n", config->p_cal_present);
169 printf("no enought parameter\n");
172 if (!strcmp(argv[1], "name")) {
175 for (i = 2; i < argc; i++)
176 name_len += strlen(argv[i]) + 1;
179 ddr_name = malloc(name_len);
180 config->info.name = ddr_name;
182 printf("alloc error, length %d\n", name_len);
185 strcpy(ddr_name, argv[2]);
186 for (i = 3; i < argc; i++) {
187 strcat(ddr_name, " ");
188 strcat(ddr_name, argv[i]);
190 printf("name = %s\n", ddr_name);
193 if (!strcmp(argv[1], "size")) {
194 if (strict_strtoul(argv[2], 16, &value) < 0) {
195 printf("invalid value %s\n", argv[2]);
197 config->info.size = value;
198 printf("size = 0x%x\n", config->info.size);
202 if (!strcmp(argv[1], "speed")) {
203 if (strict_strtoul(argv[2], 10, &value) < 0) {
204 printf("invalid value %s\n", argv[2]);
206 config->info.speed = value;
207 printf("speed = %d kHz\n", config->info.speed);
208 value = clk_get_rate(&priv->clk);
209 printf("DDRPHY = %ld kHz\n", value / 1000);
213 if (!strcmp(argv[1], "cal")) {
214 if (strict_strtoul(argv[2], 10, &value) < 0 ||
215 (value != 0 && value != 1)) {
216 printf("invalid value %s\n", argv[2]);
218 config->p_cal_present = value;
219 printf("cal = %d\n", config->p_cal_present);
223 printf("argument %s invalid\n", argv[1]);
226 static bool stm32mp1_do_freq(struct ddr_info *priv,
227 int argc, char *const argv[])
229 unsigned long ddrphy_clk;
232 if (strict_strtoul(argv[1], 0, &ddrphy_clk) < 0) {
233 printf("invalid argument %s", argv[1]);
236 if (clk_set_rate(&priv->clk, ddrphy_clk * 1000)) {
237 printf("ERROR: update failed!\n");
241 ddrphy_clk = clk_get_rate(&priv->clk);
242 printf("DDRPHY = %ld kHz\n", ddrphy_clk / 1000);
248 static void stm32mp1_do_param(enum stm32mp1_ddr_interact_step step,
249 const struct stm32mp1_ddr_config *config,
250 int argc, char *const argv[])
254 stm32mp1_dump_param(config, NULL);
257 if (stm32mp1_dump_param(config, argv[1]))
258 printf("invalid argument %s\n",
262 if (!stm32mp1_check_step(step, STEP_DDR_RESET))
264 stm32mp1_edit_param(config, argv[1], argv[2]);
269 static void stm32mp1_do_print(struct ddr_info *priv,
270 int argc, char *const argv[])
274 stm32mp1_dump_reg(priv, NULL);
277 if (stm32mp1_dump_reg(priv, argv[1]))
278 printf("invalid argument %s\n",
284 static int stm32mp1_do_step(enum stm32mp1_ddr_interact_step step,
285 int argc, char *const argv[])
292 for (i = 0; i < ARRAY_SIZE(step_str); i++)
293 printf("%d:%s\n", i, step_str[i]);
297 if ((strict_strtoul(argv[1], 0,
299 value >= ARRAY_SIZE(step_str)) {
300 printf("invalid argument %s\n",
305 if (value != STEP_DDR_RESET &&
307 printf("invalid target %d:%s, current step is %d:%s\n",
308 (int)value, step_str[value],
309 step, step_str[step]);
312 printf("step to %d:%s\n",
313 (int)value, step_str[value]);
321 #if defined(CONFIG_STM32MP1_DDR_TESTS) || defined(CONFIG_STM32MP1_DDR_TUNING)
322 static const char * const s_result[] = {
323 [TEST_PASSED] = "Pass",
324 [TEST_FAILED] = "Failed",
325 [TEST_ERROR] = "Error"
328 static void stm32mp1_ddr_subcmd(struct ddr_info *priv,
329 int argc, char *argv[],
330 const struct test_desc array[],
336 char string[50] = "";
339 printf("%s:%d\n", argv[0], array_nb);
340 for (i = 0; i < array_nb; i++)
342 i, array[i].name, array[i].usage);
345 if (argc > 1 && !strcmp(argv[1], "help")) {
346 printf("%s:%d\n", argv[0], array_nb);
347 for (i = 0; i < array_nb; i++)
348 printf("%d:%s:%s:%s\n", i,
349 array[i].name, array[i].usage, array[i].help);
353 if ((strict_strtoul(argv[1], 0, &value) < 0) ||
355 sprintf(string, "invalid argument %s",
357 result = TEST_FAILED;
361 if (argc > (array[value].max_args + 2)) {
362 sprintf(string, "invalid nb of args %d, max %d",
363 argc - 2, array[value].max_args);
364 result = TEST_FAILED;
368 printf("execute %d:%s\n", (int)value, array[value].name);
370 result = array[value].fct(priv->ctl, priv->phy,
371 string, argc - 2, &argv[2]);
374 printf("Result: %s [%s]\n", s_result[result], string);
378 bool stm32mp1_ddr_interactive(void *priv,
379 enum stm32mp1_ddr_interact_step step,
380 const struct stm32mp1_ddr_config *config)
382 char buffer[CONFIG_SYS_CBSIZE];
383 char *argv[CONFIG_SYS_MAXARGS + 1]; /* NULL terminated */
385 static int next_step = -1;
387 if (next_step < 0 && step == STEP_DDR_RESET) {
388 #ifdef CONFIG_STM32MP1_DDR_INTERACTIVE_FORCE
389 gd->flags &= ~(GD_FLG_SILENT |
390 GD_FLG_DISABLE_CONSOLE);
391 next_step = STEP_DDR_RESET;
393 unsigned long start = get_timer(0);
396 if (tstc() && (getc() == 'd')) {
397 next_step = STEP_DDR_RESET;
400 if (get_timer(start) > 100)
406 debug("** step %d ** %s / %d\n", step, step_str[step], next_step);
411 if (step < 0 || step > ARRAY_SIZE(step_str)) {
412 printf("** step %d ** INVALID\n", step);
416 printf("%d:%s\n", step, step_str[step]);
418 if (next_step > step)
421 while (next_step == step) {
422 cli_readline_into_buffer("DDR>", buffer, 0);
423 argc = cli_simple_parse_line(buffer, argv);
427 switch (stm32mp1_get_command(argv[0], argc)) {
433 stm32mp1_do_info(priv,
434 (struct stm32mp1_ddr_config *)config,
439 if (stm32mp1_do_freq(priv, argc, argv))
440 next_step = STEP_DDR_RESET;
444 do_reset(NULL, 0, 0, NULL);
448 stm32mp1_do_param(step, config, argc, argv);
452 stm32mp1_do_print(priv, argc, argv);
456 stm32mp1_edit_reg(priv, argv[1], argv[2]);
460 next_step = STEP_RUN;
464 next_step = step + 1;
468 next_step = stm32mp1_do_step(step, argc, argv);
471 #ifdef CONFIG_STM32MP1_DDR_TESTS
473 if (!stm32mp1_check_step(step, STEP_DDR_READY))
475 stm32mp1_ddr_subcmd(priv, argc, argv, test, test_nb);
479 #ifdef CONFIG_STM32MP1_DDR_TUNING
481 if (!stm32mp1_check_step(step, STEP_DDR_READY))
483 stm32mp1_ddr_subcmd(priv, argc, argv,
492 return next_step == STEP_DDR_RESET;