1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4 * Author: Christophe Kerello <christophe.kerello@st.com>
10 #include <linux/delay.h>
11 #include <power/pmic.h>
12 #include <power/regulator.h>
13 #include <power/stpmic1.h>
15 struct stpmic1_range {
22 struct stpmic1_output {
23 const struct stpmic1_range *ranges;
27 #define STPMIC1_MODE(_id, _val, _name) { \
29 .register_value = _val, \
33 #define STPMIC1_RANGE(_min_uv, _min_sel, _max_sel, _step) { \
35 .min_sel = _min_sel, \
36 .max_sel = _max_sel, \
40 #define STPMIC1_OUTPUT(_ranges, _nbranges) { \
42 .nbranges = _nbranges, \
45 static int stpmic1_output_find_uv(int sel,
46 const struct stpmic1_output *output)
48 const struct stpmic1_range *range;
51 for (i = 0, range = output->ranges;
52 i < output->nbranges; i++, range++) {
53 if (sel >= range->min_sel && sel <= range->max_sel)
54 return range->min_uv +
55 (sel - range->min_sel) * range->step;
61 static int stpmic1_output_find_sel(int uv,
62 const struct stpmic1_output *output)
64 const struct stpmic1_range *range;
67 for (i = 0, range = output->ranges;
68 i < output->nbranges; i++, range++) {
69 if (uv == range->min_uv && !range->step)
70 return range->min_sel;
72 if (uv >= range->min_uv &&
74 (range->max_sel - range->min_sel) * range->step)
75 return range->min_sel +
76 (uv - range->min_uv) / range->step;
86 static const struct stpmic1_range buck1_ranges[] = {
87 STPMIC1_RANGE(725000, 0, 4, 0),
88 STPMIC1_RANGE(725000, 5, 36, 25000),
89 STPMIC1_RANGE(1500000, 37, 63, 0),
92 static const struct stpmic1_range buck2_ranges[] = {
93 STPMIC1_RANGE(1000000, 0, 17, 0),
94 STPMIC1_RANGE(1050000, 18, 19, 0),
95 STPMIC1_RANGE(1100000, 20, 21, 0),
96 STPMIC1_RANGE(1150000, 22, 23, 0),
97 STPMIC1_RANGE(1200000, 24, 25, 0),
98 STPMIC1_RANGE(1250000, 26, 27, 0),
99 STPMIC1_RANGE(1300000, 28, 29, 0),
100 STPMIC1_RANGE(1350000, 30, 31, 0),
101 STPMIC1_RANGE(1400000, 32, 33, 0),
102 STPMIC1_RANGE(1450000, 34, 35, 0),
103 STPMIC1_RANGE(1500000, 36, 63, 0),
106 static const struct stpmic1_range buck3_ranges[] = {
107 STPMIC1_RANGE(1000000, 0, 19, 0),
108 STPMIC1_RANGE(1100000, 20, 23, 0),
109 STPMIC1_RANGE(1200000, 24, 27, 0),
110 STPMIC1_RANGE(1300000, 28, 31, 0),
111 STPMIC1_RANGE(1400000, 32, 35, 0),
112 STPMIC1_RANGE(1500000, 36, 55, 100000),
113 STPMIC1_RANGE(3400000, 56, 63, 0),
116 static const struct stpmic1_range buck4_ranges[] = {
117 STPMIC1_RANGE(600000, 0, 27, 25000),
118 STPMIC1_RANGE(1300000, 28, 29, 0),
119 STPMIC1_RANGE(1350000, 30, 31, 0),
120 STPMIC1_RANGE(1400000, 32, 33, 0),
121 STPMIC1_RANGE(1450000, 34, 35, 0),
122 STPMIC1_RANGE(1500000, 36, 60, 100000),
123 STPMIC1_RANGE(3900000, 61, 63, 0),
126 /* BUCK: 1,2,3,4 - voltage ranges */
127 static const struct stpmic1_output buck_voltage_range[] = {
128 STPMIC1_OUTPUT(buck1_ranges, ARRAY_SIZE(buck1_ranges)),
129 STPMIC1_OUTPUT(buck2_ranges, ARRAY_SIZE(buck2_ranges)),
130 STPMIC1_OUTPUT(buck3_ranges, ARRAY_SIZE(buck3_ranges)),
131 STPMIC1_OUTPUT(buck4_ranges, ARRAY_SIZE(buck4_ranges)),
135 static const struct dm_regulator_mode buck_modes[] = {
136 STPMIC1_MODE(STPMIC1_PREG_MODE_HP, STPMIC1_PREG_MODE_HP, "HP"),
137 STPMIC1_MODE(STPMIC1_PREG_MODE_LP, STPMIC1_PREG_MODE_LP, "LP"),
140 static int stpmic1_buck_get_uv(struct udevice *dev, int buck)
144 sel = pmic_reg_read(dev, STPMIC1_BUCKX_MAIN_CR(buck));
148 sel &= STPMIC1_BUCK_VOUT_MASK;
149 sel >>= STPMIC1_BUCK_VOUT_SHIFT;
151 return stpmic1_output_find_uv(sel, &buck_voltage_range[buck]);
154 static int stpmic1_buck_get_value(struct udevice *dev)
156 return stpmic1_buck_get_uv(dev->parent, dev->driver_data - 1);
159 static int stpmic1_buck_set_value(struct udevice *dev, int uv)
161 int sel, buck = dev->driver_data - 1;
163 sel = stpmic1_output_find_sel(uv, &buck_voltage_range[buck]);
167 return pmic_clrsetbits(dev->parent,
168 STPMIC1_BUCKX_MAIN_CR(buck),
169 STPMIC1_BUCK_VOUT_MASK,
170 sel << STPMIC1_BUCK_VOUT_SHIFT);
173 static int stpmic1_buck_get_enable(struct udevice *dev)
177 ret = pmic_reg_read(dev->parent,
178 STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1));
182 return ret & STPMIC1_BUCK_ENA ? true : false;
185 static int stpmic1_buck_set_enable(struct udevice *dev, bool enable)
187 struct dm_regulator_uclass_platdata *uc_pdata;
188 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
189 STPMIC1_DEFAULT_STOP_DELAY_MS;
192 /* if regulator is already in the wanted state, nothing to do */
193 if (stpmic1_buck_get_enable(dev) == enable)
197 uc_pdata = dev_get_uclass_platdata(dev);
198 uv = stpmic1_buck_get_value(dev);
199 if (uv < uc_pdata->min_uV || uv > uc_pdata->max_uV)
200 stpmic1_buck_set_value(dev, uc_pdata->min_uV);
203 ret = pmic_clrsetbits(dev->parent,
204 STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1),
205 STPMIC1_BUCK_ENA, enable ? STPMIC1_BUCK_ENA : 0);
211 static int stpmic1_buck_get_mode(struct udevice *dev)
215 ret = pmic_reg_read(dev->parent,
216 STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1));
220 return ret & STPMIC1_BUCK_PREG_MODE ? STPMIC1_PREG_MODE_LP :
221 STPMIC1_PREG_MODE_HP;
224 static int stpmic1_buck_set_mode(struct udevice *dev, int mode)
226 return pmic_clrsetbits(dev->parent,
227 STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1),
228 STPMIC1_BUCK_PREG_MODE,
229 mode ? STPMIC1_BUCK_PREG_MODE : 0);
232 static int stpmic1_buck_probe(struct udevice *dev)
234 struct dm_regulator_uclass_platdata *uc_pdata;
236 if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_BUCK)
239 uc_pdata = dev_get_uclass_platdata(dev);
241 uc_pdata->type = REGULATOR_TYPE_BUCK;
242 uc_pdata->mode = (struct dm_regulator_mode *)buck_modes;
243 uc_pdata->mode_count = ARRAY_SIZE(buck_modes);
248 static const struct dm_regulator_ops stpmic1_buck_ops = {
249 .get_value = stpmic1_buck_get_value,
250 .set_value = stpmic1_buck_set_value,
251 .get_enable = stpmic1_buck_get_enable,
252 .set_enable = stpmic1_buck_set_enable,
253 .get_mode = stpmic1_buck_get_mode,
254 .set_mode = stpmic1_buck_set_mode,
257 U_BOOT_DRIVER(stpmic1_buck) = {
258 .name = "stpmic1_buck",
259 .id = UCLASS_REGULATOR,
260 .ops = &stpmic1_buck_ops,
261 .probe = stpmic1_buck_probe,
268 static const struct stpmic1_range ldo12_ranges[] = {
269 STPMIC1_RANGE(1700000, 0, 7, 0),
270 STPMIC1_RANGE(1700000, 8, 24, 100000),
271 STPMIC1_RANGE(3300000, 25, 31, 0),
274 static const struct stpmic1_range ldo3_ranges[] = {
275 STPMIC1_RANGE(1700000, 0, 7, 0),
276 STPMIC1_RANGE(1700000, 8, 24, 100000),
277 STPMIC1_RANGE(3300000, 25, 30, 0),
278 /* Sel 31 is special case when LDO3 is in mode sync_source (BUCK2/2) */
281 static const struct stpmic1_range ldo5_ranges[] = {
282 STPMIC1_RANGE(1700000, 0, 7, 0),
283 STPMIC1_RANGE(1700000, 8, 30, 100000),
284 STPMIC1_RANGE(3900000, 31, 31, 0),
287 static const struct stpmic1_range ldo6_ranges[] = {
288 STPMIC1_RANGE(900000, 0, 24, 100000),
289 STPMIC1_RANGE(3300000, 25, 31, 0),
292 /* LDO: 1,2,3,4,5,6 - voltage ranges */
293 static const struct stpmic1_output ldo_voltage_range[] = {
294 STPMIC1_OUTPUT(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)),
295 STPMIC1_OUTPUT(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)),
296 STPMIC1_OUTPUT(ldo3_ranges, ARRAY_SIZE(ldo3_ranges)),
297 STPMIC1_OUTPUT(NULL, 0),
298 STPMIC1_OUTPUT(ldo5_ranges, ARRAY_SIZE(ldo5_ranges)),
299 STPMIC1_OUTPUT(ldo6_ranges, ARRAY_SIZE(ldo6_ranges)),
303 static const struct dm_regulator_mode ldo_modes[] = {
304 STPMIC1_MODE(STPMIC1_LDO_MODE_NORMAL,
305 STPMIC1_LDO_MODE_NORMAL, "NORMAL"),
306 STPMIC1_MODE(STPMIC1_LDO_MODE_BYPASS,
307 STPMIC1_LDO_MODE_BYPASS, "BYPASS"),
308 STPMIC1_MODE(STPMIC1_LDO_MODE_SINK_SOURCE,
309 STPMIC1_LDO_MODE_SINK_SOURCE, "SINK SOURCE"),
312 static int stpmic1_ldo_get_value(struct udevice *dev)
314 int sel, ldo = dev->driver_data - 1;
316 sel = pmic_reg_read(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo));
321 if (ldo == STPMIC1_LDO4)
322 return STPMIC1_LDO4_UV;
324 sel &= STPMIC1_LDO12356_VOUT_MASK;
325 sel >>= STPMIC1_LDO12356_VOUT_SHIFT;
327 /* ldo3, sel = 31 => BUCK2/2 */
328 if (ldo == STPMIC1_LDO3 && sel == STPMIC1_LDO3_DDR_SEL)
329 return stpmic1_buck_get_uv(dev->parent, STPMIC1_BUCK2) / 2;
331 return stpmic1_output_find_uv(sel, &ldo_voltage_range[ldo]);
334 static int stpmic1_ldo_set_value(struct udevice *dev, int uv)
336 int sel, ldo = dev->driver_data - 1;
338 /* ldo4 => not possible */
339 if (ldo == STPMIC1_LDO4)
342 sel = stpmic1_output_find_sel(uv, &ldo_voltage_range[ldo]);
346 return pmic_clrsetbits(dev->parent,
347 STPMIC1_LDOX_MAIN_CR(ldo),
348 STPMIC1_LDO12356_VOUT_MASK,
349 sel << STPMIC1_LDO12356_VOUT_SHIFT);
352 static int stpmic1_ldo_get_enable(struct udevice *dev)
356 ret = pmic_reg_read(dev->parent,
357 STPMIC1_LDOX_MAIN_CR(dev->driver_data - 1));
361 return ret & STPMIC1_LDO_ENA ? true : false;
364 static int stpmic1_ldo_set_enable(struct udevice *dev, bool enable)
366 struct dm_regulator_uclass_platdata *uc_pdata;
367 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
368 STPMIC1_DEFAULT_STOP_DELAY_MS;
371 /* if regulator is already in the wanted state, nothing to do */
372 if (stpmic1_ldo_get_enable(dev) == enable)
376 uc_pdata = dev_get_uclass_platdata(dev);
377 uv = stpmic1_ldo_get_value(dev);
378 if (uv < uc_pdata->min_uV || uv > uc_pdata->max_uV)
379 stpmic1_ldo_set_value(dev, uc_pdata->min_uV);
382 ret = pmic_clrsetbits(dev->parent,
383 STPMIC1_LDOX_MAIN_CR(dev->driver_data - 1),
384 STPMIC1_LDO_ENA, enable ? STPMIC1_LDO_ENA : 0);
390 static int stpmic1_ldo_get_mode(struct udevice *dev)
392 int ret, ldo = dev->driver_data - 1;
394 if (ldo != STPMIC1_LDO3)
397 ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo));
401 if (ret & STPMIC1_LDO3_MODE)
402 return STPMIC1_LDO_MODE_BYPASS;
404 ret &= STPMIC1_LDO12356_VOUT_MASK;
405 ret >>= STPMIC1_LDO12356_VOUT_SHIFT;
407 return ret == STPMIC1_LDO3_DDR_SEL ? STPMIC1_LDO_MODE_SINK_SOURCE :
408 STPMIC1_LDO_MODE_NORMAL;
411 static int stpmic1_ldo_set_mode(struct udevice *dev, int mode)
413 int ret, ldo = dev->driver_data - 1;
415 if (ldo != STPMIC1_LDO3)
418 ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo));
423 case STPMIC1_LDO_MODE_SINK_SOURCE:
424 ret &= ~STPMIC1_LDO12356_VOUT_MASK;
425 ret |= STPMIC1_LDO3_DDR_SEL << STPMIC1_LDO12356_VOUT_SHIFT;
427 case STPMIC1_LDO_MODE_NORMAL:
428 ret &= ~STPMIC1_LDO3_MODE;
430 case STPMIC1_LDO_MODE_BYPASS:
431 ret |= STPMIC1_LDO3_MODE;
435 return pmic_reg_write(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo), ret);
438 static int stpmic1_ldo_probe(struct udevice *dev)
440 struct dm_regulator_uclass_platdata *uc_pdata;
442 if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_LDO)
445 uc_pdata = dev_get_uclass_platdata(dev);
447 uc_pdata->type = REGULATOR_TYPE_LDO;
448 if (dev->driver_data - 1 == STPMIC1_LDO3) {
449 uc_pdata->mode = (struct dm_regulator_mode *)ldo_modes;
450 uc_pdata->mode_count = ARRAY_SIZE(ldo_modes);
452 uc_pdata->mode_count = 0;
458 static const struct dm_regulator_ops stpmic1_ldo_ops = {
459 .get_value = stpmic1_ldo_get_value,
460 .set_value = stpmic1_ldo_set_value,
461 .get_enable = stpmic1_ldo_get_enable,
462 .set_enable = stpmic1_ldo_set_enable,
463 .get_mode = stpmic1_ldo_get_mode,
464 .set_mode = stpmic1_ldo_set_mode,
467 U_BOOT_DRIVER(stpmic1_ldo) = {
468 .name = "stpmic1_ldo",
469 .id = UCLASS_REGULATOR,
470 .ops = &stpmic1_ldo_ops,
471 .probe = stpmic1_ldo_probe,
478 static int stpmic1_vref_ddr_get_value(struct udevice *dev)
481 return stpmic1_buck_get_uv(dev->parent, STPMIC1_BUCK2) / 2;
484 static int stpmic1_vref_ddr_get_enable(struct udevice *dev)
488 ret = pmic_reg_read(dev->parent, STPMIC1_REFDDR_MAIN_CR);
492 return ret & STPMIC1_VREF_ENA ? true : false;
495 static int stpmic1_vref_ddr_set_enable(struct udevice *dev, bool enable)
497 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
498 STPMIC1_DEFAULT_STOP_DELAY_MS;
501 /* if regulator is already in the wanted state, nothing to do */
502 if (stpmic1_vref_ddr_get_enable(dev) == enable)
505 ret = pmic_clrsetbits(dev->parent, STPMIC1_REFDDR_MAIN_CR,
506 STPMIC1_VREF_ENA, enable ? STPMIC1_VREF_ENA : 0);
512 static int stpmic1_vref_ddr_probe(struct udevice *dev)
514 struct dm_regulator_uclass_platdata *uc_pdata;
516 uc_pdata = dev_get_uclass_platdata(dev);
518 uc_pdata->type = REGULATOR_TYPE_FIXED;
519 uc_pdata->mode_count = 0;
524 static const struct dm_regulator_ops stpmic1_vref_ddr_ops = {
525 .get_value = stpmic1_vref_ddr_get_value,
526 .get_enable = stpmic1_vref_ddr_get_enable,
527 .set_enable = stpmic1_vref_ddr_set_enable,
530 U_BOOT_DRIVER(stpmic1_vref_ddr) = {
531 .name = "stpmic1_vref_ddr",
532 .id = UCLASS_REGULATOR,
533 .ops = &stpmic1_vref_ddr_ops,
534 .probe = stpmic1_vref_ddr_probe,
541 static int stpmic1_boost_get_enable(struct udevice *dev)
545 ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR);
549 return ret & STPMIC1_BST_ON ? true : false;
552 static int stpmic1_boost_set_enable(struct udevice *dev, bool enable)
556 ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR);
560 if (!enable && ret & STPMIC1_PWR_SW_ON)
563 /* if regulator is already in the wanted state, nothing to do */
564 if (!!(ret & STPMIC1_BST_ON) == enable)
567 ret = pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR,
569 enable ? STPMIC1_BST_ON : 0);
571 mdelay(STPMIC1_USB_BOOST_START_UP_DELAY_MS);
576 static int stpmic1_boost_probe(struct udevice *dev)
578 struct dm_regulator_uclass_platdata *uc_pdata;
580 uc_pdata = dev_get_uclass_platdata(dev);
582 uc_pdata->type = REGULATOR_TYPE_FIXED;
583 uc_pdata->mode_count = 0;
588 static const struct dm_regulator_ops stpmic1_boost_ops = {
589 .get_enable = stpmic1_boost_get_enable,
590 .set_enable = stpmic1_boost_set_enable,
593 U_BOOT_DRIVER(stpmic1_boost) = {
594 .name = "stpmic1_boost",
595 .id = UCLASS_REGULATOR,
596 .ops = &stpmic1_boost_ops,
597 .probe = stpmic1_boost_probe,
604 static int stpmic1_pwr_sw_get_enable(struct udevice *dev)
606 uint mask = 1 << dev->driver_data;
609 ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR);
613 return ret & mask ? true : false;
616 static int stpmic1_pwr_sw_set_enable(struct udevice *dev, bool enable)
618 uint mask = 1 << dev->driver_data;
619 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
620 STPMIC1_DEFAULT_STOP_DELAY_MS;
623 ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR);
627 /* if regulator is already in the wanted state, nothing to do */
628 if (!!(ret & mask) == enable)
631 /* Boost management */
632 if (enable && !(ret & STPMIC1_BST_ON)) {
633 pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR,
634 STPMIC1_BST_ON, STPMIC1_BST_ON);
635 mdelay(STPMIC1_USB_BOOST_START_UP_DELAY_MS);
636 } else if (!enable && ret & STPMIC1_BST_ON &&
637 (ret & STPMIC1_PWR_SW_ON) != STPMIC1_PWR_SW_ON) {
638 pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR,
642 ret = pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR,
643 mask, enable ? mask : 0);
649 static int stpmic1_pwr_sw_probe(struct udevice *dev)
651 struct dm_regulator_uclass_platdata *uc_pdata;
653 if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_PWR_SW)
656 uc_pdata = dev_get_uclass_platdata(dev);
658 uc_pdata->type = REGULATOR_TYPE_FIXED;
659 uc_pdata->mode_count = 0;
664 static const struct dm_regulator_ops stpmic1_pwr_sw_ops = {
665 .get_enable = stpmic1_pwr_sw_get_enable,
666 .set_enable = stpmic1_pwr_sw_set_enable,
669 U_BOOT_DRIVER(stpmic1_pwr_sw) = {
670 .name = "stpmic1_pwr_sw",
671 .id = UCLASS_REGULATOR,
672 .ops = &stpmic1_pwr_sw_ops,
673 .probe = stpmic1_pwr_sw_probe,