1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
5 * Derived from linux/arch/mips/bcm63xx/usb-common.c:
6 * Copyright 2008 Maxime Bizon <mbizon@freebox.fr>
7 * Copyright 2013 Florian Fainelli <florian@openwrt.org>
13 #include <generic-phy.h>
16 #include <power-domain.h>
19 #include <dm/device.h>
21 /* USBH Setup register */
22 #define USBH_SETUP_REG 0x00
23 #define USBH_SETUP_IOC BIT(4)
25 /* USBH PLL Control register */
26 #define USBH_PLL_REG 0x04
27 #define USBH_PLL_SUSP_EN BIT(27)
28 #define USBH_PLL_IDDQ_PWRDN BIT(31)
30 /* USBH Swap Control register */
31 #define USBH_SWAP_REG 0x0c
32 #define USBH_SWAP_OHCI_DATA BIT(0)
33 #define USBH_SWAP_OHCI_ENDIAN BIT(1)
34 #define USBH_SWAP_EHCI_DATA BIT(3)
35 #define USBH_SWAP_EHCI_ENDIAN BIT(4)
37 /* USBH Sim Control register */
38 #define USBH_SIM_REG 0x20
39 #define USBH_SIM_LADDR BIT(5)
41 struct bcm6318_usbh_priv {
45 static int bcm6318_usbh_init(struct phy *phy)
47 struct bcm6318_usbh_priv *priv = dev_get_priv(phy->dev);
49 /* enable pll control susp */
50 setbits_be32(priv->regs + USBH_PLL_REG, USBH_PLL_SUSP_EN);
52 /* configure to work in native cpu endian */
53 clrsetbits_be32(priv->regs + USBH_SWAP_REG,
54 USBH_SWAP_EHCI_ENDIAN | USBH_SWAP_OHCI_ENDIAN,
55 USBH_SWAP_EHCI_DATA | USBH_SWAP_OHCI_DATA);
58 setbits_be32(priv->regs + USBH_SETUP_REG, USBH_SETUP_IOC);
60 /* disable pll control pwrdn */
61 clrbits_be32(priv->regs + USBH_PLL_REG, USBH_PLL_IDDQ_PWRDN);
63 /* sim control config */
64 setbits_be32(priv->regs + USBH_SIM_REG, USBH_SIM_LADDR);
69 static struct phy_ops bcm6318_usbh_ops = {
70 .init = bcm6318_usbh_init,
73 static const struct udevice_id bcm6318_usbh_ids[] = {
74 { .compatible = "brcm,bcm6318-usbh" },
78 static int bcm6318_usbh_probe(struct udevice *dev)
80 struct bcm6318_usbh_priv *priv = dev_get_priv(dev);
81 struct power_domain pwr_dom;
82 struct reset_ctl rst_ctl;
86 priv->regs = dev_remap_addr(dev);
90 /* enable usbh clock */
91 ret = clk_get_by_name(dev, "usbh", &clk);
95 ret = clk_enable(&clk);
103 /* enable power domain */
104 ret = power_domain_get(dev, &pwr_dom);
108 ret = power_domain_on(&pwr_dom);
112 ret = power_domain_free(&pwr_dom);
117 ret = reset_get_by_index(dev, 0, &rst_ctl);
121 ret = reset_deassert(&rst_ctl);
125 ret = reset_free(&rst_ctl);
134 U_BOOT_DRIVER(bcm6318_usbh) = {
135 .name = "bcm6318-usbh",
137 .of_match = bcm6318_usbh_ids,
138 .ops = &bcm6318_usbh_ops,
139 .priv_auto_alloc_size = sizeof(struct bcm6318_usbh_priv),
140 .probe = bcm6318_usbh_probe,