1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2010-2011, 2015 Freescale Semiconductor, Inc.
7 * Copyright 2016 Karsten Merker <merker@debian.org>
10 #include <linux/bitops.h>
13 #define PHY_RTL8211x_FORCE_MASTER BIT(1)
14 #define PHY_RTL8211E_PINE64_GIGABIT_FIX BIT(2)
15 #define PHY_RTL8211F_FORCE_EEE_RXC_ON BIT(3)
17 #define PHY_AUTONEGOTIATE_TIMEOUT 5000
19 /* RTL8211x 1000BASE-T Control Register */
20 #define MIIM_RTL8211x_CTRL1000T_MSCE BIT(12);
21 #define MIIM_RTL8211x_CTRL1000T_MASTER BIT(11);
23 /* RTL8211x PHY Status Register */
24 #define MIIM_RTL8211x_PHY_STATUS 0x11
25 #define MIIM_RTL8211x_PHYSTAT_SPEED 0xc000
26 #define MIIM_RTL8211x_PHYSTAT_GBIT 0x8000
27 #define MIIM_RTL8211x_PHYSTAT_100 0x4000
28 #define MIIM_RTL8211x_PHYSTAT_DUPLEX 0x2000
29 #define MIIM_RTL8211x_PHYSTAT_SPDDONE 0x0800
30 #define MIIM_RTL8211x_PHYSTAT_LINK 0x0400
32 /* RTL8211x PHY Interrupt Enable Register */
33 #define MIIM_RTL8211x_PHY_INER 0x12
34 #define MIIM_RTL8211x_PHY_INTR_ENA 0x9f01
35 #define MIIM_RTL8211x_PHY_INTR_DIS 0x0000
37 /* RTL8211x PHY Interrupt Status Register */
38 #define MIIM_RTL8211x_PHY_INSR 0x13
40 /* RTL8211F PHY Status Register */
41 #define MIIM_RTL8211F_PHY_STATUS 0x1a
42 #define MIIM_RTL8211F_AUTONEG_ENABLE 0x1000
43 #define MIIM_RTL8211F_PHYSTAT_SPEED 0x0030
44 #define MIIM_RTL8211F_PHYSTAT_GBIT 0x0020
45 #define MIIM_RTL8211F_PHYSTAT_100 0x0010
46 #define MIIM_RTL8211F_PHYSTAT_DUPLEX 0x0008
47 #define MIIM_RTL8211F_PHYSTAT_SPDDONE 0x0800
48 #define MIIM_RTL8211F_PHYSTAT_LINK 0x0004
50 #define MIIM_RTL8211E_CONFREG 0x1c
51 #define MIIM_RTL8211E_CONFREG_TXD 0x0002
52 #define MIIM_RTL8211E_CONFREG_RXD 0x0004
53 #define MIIM_RTL8211E_CONFREG_MAGIC 0xb400 /* Undocumented */
55 #define MIIM_RTL8211E_EXT_PAGE_SELECT 0x1e
57 #define MIIM_RTL8211F_PAGE_SELECT 0x1f
58 #define MIIM_RTL8211F_TX_DELAY 0x100
59 #define MIIM_RTL8211F_RX_DELAY 0x8
60 #define MIIM_RTL8211F_LCR 0x10
62 static int rtl8211f_phy_extread(struct phy_device *phydev, int addr,
63 int devaddr, int regnum)
65 int oldpage = phy_read(phydev, MDIO_DEVAD_NONE,
66 MIIM_RTL8211F_PAGE_SELECT);
69 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, devaddr);
70 val = phy_read(phydev, MDIO_DEVAD_NONE, regnum);
71 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, oldpage);
76 static int rtl8211f_phy_extwrite(struct phy_device *phydev, int addr,
77 int devaddr, int regnum, u16 val)
79 int oldpage = phy_read(phydev, MDIO_DEVAD_NONE,
80 MIIM_RTL8211F_PAGE_SELECT);
82 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, devaddr);
83 phy_write(phydev, MDIO_DEVAD_NONE, regnum, val);
84 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, oldpage);
89 static int rtl8211b_probe(struct phy_device *phydev)
91 #ifdef CONFIG_RTL8211X_PHY_FORCE_MASTER
92 phydev->flags |= PHY_RTL8211x_FORCE_MASTER;
98 static int rtl8211e_probe(struct phy_device *phydev)
100 #ifdef CONFIG_RTL8211E_PINE64_GIGABIT_FIX
101 phydev->flags |= PHY_RTL8211E_PINE64_GIGABIT_FIX;
107 static int rtl8211f_probe(struct phy_device *phydev)
109 #ifdef CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON
110 phydev->flags |= PHY_RTL8211F_FORCE_EEE_RXC_ON;
116 /* RealTek RTL8211x */
117 static int rtl8211x_config(struct phy_device *phydev)
119 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
121 /* mask interrupt at init; if the interrupt is
122 * needed indeed, it should be explicitly enabled
124 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER,
125 MIIM_RTL8211x_PHY_INTR_DIS);
127 if (phydev->flags & PHY_RTL8211x_FORCE_MASTER) {
130 reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
131 /* force manual master/slave configuration */
132 reg |= MIIM_RTL8211x_CTRL1000T_MSCE;
133 /* force master mode */
134 reg |= MIIM_RTL8211x_CTRL1000T_MASTER;
135 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, reg);
137 if (phydev->flags & PHY_RTL8211E_PINE64_GIGABIT_FIX) {
140 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT,
142 phy_write(phydev, MDIO_DEVAD_NONE,
143 MIIM_RTL8211E_EXT_PAGE_SELECT, 0xa4);
144 reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG);
145 /* Ensure both internal delays are turned off */
146 reg &= ~(MIIM_RTL8211E_CONFREG_TXD | MIIM_RTL8211E_CONFREG_RXD);
147 /* Flip the magic undocumented bits */
148 reg |= MIIM_RTL8211E_CONFREG_MAGIC;
149 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG, reg);
150 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT,
153 /* read interrupt status just to clear it */
154 phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER);
156 genphy_config_aneg(phydev);
161 static int rtl8211f_config(struct phy_device *phydev)
165 if (phydev->flags & PHY_RTL8211F_FORCE_EEE_RXC_ON) {
168 reg = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1);
169 reg &= ~MDIO_PCS_CTRL1_CLKSTOP_EN;
170 phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, reg);
173 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
175 phy_write(phydev, MDIO_DEVAD_NONE,
176 MIIM_RTL8211F_PAGE_SELECT, 0xd08);
177 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x11);
179 /* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */
180 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
181 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
182 reg |= MIIM_RTL8211F_TX_DELAY;
184 reg &= ~MIIM_RTL8211F_TX_DELAY;
186 phy_write(phydev, MDIO_DEVAD_NONE, 0x11, reg);
188 /* enable RX-delay for rgmii-id and rgmii-rxid, otherwise disable it */
189 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x15);
190 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
191 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
192 reg |= MIIM_RTL8211F_RX_DELAY;
194 reg &= ~MIIM_RTL8211F_RX_DELAY;
195 phy_write(phydev, MDIO_DEVAD_NONE, 0x15, reg);
197 /* restore to default page 0 */
198 phy_write(phydev, MDIO_DEVAD_NONE,
199 MIIM_RTL8211F_PAGE_SELECT, 0x0);
201 /* Set green LED for Link, yellow LED for Active */
202 phy_write(phydev, MDIO_DEVAD_NONE,
203 MIIM_RTL8211F_PAGE_SELECT, 0xd04);
204 phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x617f);
205 phy_write(phydev, MDIO_DEVAD_NONE,
206 MIIM_RTL8211F_PAGE_SELECT, 0x0);
208 genphy_config_aneg(phydev);
213 static int rtl8211x_parse_status(struct phy_device *phydev)
216 unsigned int mii_reg;
218 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_STATUS);
220 if (!(mii_reg & MIIM_RTL8211x_PHYSTAT_SPDDONE)) {
223 /* in case of timeout ->link is cleared */
225 puts("Waiting for PHY realtime link");
226 while (!(mii_reg & MIIM_RTL8211x_PHYSTAT_SPDDONE)) {
227 /* Timeout reached ? */
228 if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
229 puts(" TIMEOUT !\n");
234 if ((i++ % 1000) == 0)
236 udelay(1000); /* 1 ms */
237 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
238 MIIM_RTL8211x_PHY_STATUS);
241 udelay(500000); /* another 500 ms (results in faster booting) */
243 if (mii_reg & MIIM_RTL8211x_PHYSTAT_LINK)
249 if (mii_reg & MIIM_RTL8211x_PHYSTAT_DUPLEX)
250 phydev->duplex = DUPLEX_FULL;
252 phydev->duplex = DUPLEX_HALF;
254 speed = (mii_reg & MIIM_RTL8211x_PHYSTAT_SPEED);
257 case MIIM_RTL8211x_PHYSTAT_GBIT:
258 phydev->speed = SPEED_1000;
260 case MIIM_RTL8211x_PHYSTAT_100:
261 phydev->speed = SPEED_100;
264 phydev->speed = SPEED_10;
270 static int rtl8211f_parse_status(struct phy_device *phydev)
273 unsigned int mii_reg;
276 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, 0xa43);
277 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PHY_STATUS);
280 while (!(mii_reg & MIIM_RTL8211F_PHYSTAT_LINK)) {
281 if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
282 puts(" TIMEOUT !\n");
287 if ((i++ % 1000) == 0)
290 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
291 MIIM_RTL8211F_PHY_STATUS);
294 if (mii_reg & MIIM_RTL8211F_PHYSTAT_DUPLEX)
295 phydev->duplex = DUPLEX_FULL;
297 phydev->duplex = DUPLEX_HALF;
299 speed = (mii_reg & MIIM_RTL8211F_PHYSTAT_SPEED);
302 case MIIM_RTL8211F_PHYSTAT_GBIT:
303 phydev->speed = SPEED_1000;
305 case MIIM_RTL8211F_PHYSTAT_100:
306 phydev->speed = SPEED_100;
309 phydev->speed = SPEED_10;
315 static int rtl8211x_startup(struct phy_device *phydev)
319 /* Read the Status (2x to make sure link is right) */
320 ret = genphy_update_link(phydev);
324 return rtl8211x_parse_status(phydev);
327 static int rtl8211e_startup(struct phy_device *phydev)
331 ret = genphy_update_link(phydev);
335 return genphy_parse_link(phydev);
338 static int rtl8211f_startup(struct phy_device *phydev)
342 /* Read the Status (2x to make sure link is right) */
343 ret = genphy_update_link(phydev);
346 /* Read the Status (2x to make sure link is right) */
348 return rtl8211f_parse_status(phydev);
351 /* Support for RTL8211B PHY */
352 static struct phy_driver RTL8211B_driver = {
353 .name = "RealTek RTL8211B",
356 .features = PHY_GBIT_FEATURES,
357 .probe = &rtl8211b_probe,
358 .config = &rtl8211x_config,
359 .startup = &rtl8211x_startup,
360 .shutdown = &genphy_shutdown,
363 /* Support for RTL8211E-VB-CG, RTL8211E-VL-CG and RTL8211EG-VB-CG PHYs */
364 static struct phy_driver RTL8211E_driver = {
365 .name = "RealTek RTL8211E",
368 .features = PHY_GBIT_FEATURES,
369 .probe = &rtl8211e_probe,
370 .config = &rtl8211x_config,
371 .startup = &rtl8211e_startup,
372 .shutdown = &genphy_shutdown,
375 /* Support for RTL8211DN PHY */
376 static struct phy_driver RTL8211DN_driver = {
377 .name = "RealTek RTL8211DN",
380 .features = PHY_GBIT_FEATURES,
381 .config = &rtl8211x_config,
382 .startup = &rtl8211x_startup,
383 .shutdown = &genphy_shutdown,
386 /* Support for RTL8211F PHY */
387 static struct phy_driver RTL8211F_driver = {
388 .name = "RealTek RTL8211F",
391 .features = PHY_GBIT_FEATURES,
392 .probe = &rtl8211f_probe,
393 .config = &rtl8211f_config,
394 .startup = &rtl8211f_startup,
395 .shutdown = &genphy_shutdown,
396 .readext = &rtl8211f_phy_extread,
397 .writeext = &rtl8211f_phy_extwrite,
400 int phy_realtek_init(void)
402 phy_register(&RTL8211B_driver);
403 phy_register(&RTL8211E_driver);
404 phy_register(&RTL8211F_driver);
405 phy_register(&RTL8211DN_driver);