6c4381ec6ce6c28c2e6327d649ab69002f82a7b6
[oweals/u-boot.git] / drivers / net / phy / phy.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Generic PHY Management code
4  *
5  * Copyright 2011 Freescale Semiconductor, Inc.
6  * author Andy Fleming
7  *
8  * Based loosely off of Linux's PHY Lib
9  */
10 #include <common.h>
11 #include <console.h>
12 #include <dm.h>
13 #include <log.h>
14 #include <malloc.h>
15 #include <net.h>
16 #include <command.h>
17 #include <miiphy.h>
18 #include <phy.h>
19 #include <errno.h>
20 #include <linux/err.h>
21 #include <linux/compiler.h>
22
23 DECLARE_GLOBAL_DATA_PTR;
24
25 /* Generic PHY support and helper functions */
26
27 /**
28  * genphy_config_advert - sanitize and advertise auto-negotiation parameters
29  * @phydev: target phy_device struct
30  *
31  * Description: Writes MII_ADVERTISE with the appropriate values,
32  *   after sanitizing the values to make sure we only advertise
33  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
34  *   hasn't changed, and > 0 if it has changed.
35  */
36 static int genphy_config_advert(struct phy_device *phydev)
37 {
38         u32 advertise;
39         int oldadv, adv, bmsr;
40         int err, changed = 0;
41
42         /* Only allow advertising what this PHY supports */
43         phydev->advertising &= phydev->supported;
44         advertise = phydev->advertising;
45
46         /* Setup standard advertisement */
47         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
48         oldadv = adv;
49
50         if (adv < 0)
51                 return adv;
52
53         adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
54                  ADVERTISE_PAUSE_ASYM);
55         if (advertise & ADVERTISED_10baseT_Half)
56                 adv |= ADVERTISE_10HALF;
57         if (advertise & ADVERTISED_10baseT_Full)
58                 adv |= ADVERTISE_10FULL;
59         if (advertise & ADVERTISED_100baseT_Half)
60                 adv |= ADVERTISE_100HALF;
61         if (advertise & ADVERTISED_100baseT_Full)
62                 adv |= ADVERTISE_100FULL;
63         if (advertise & ADVERTISED_Pause)
64                 adv |= ADVERTISE_PAUSE_CAP;
65         if (advertise & ADVERTISED_Asym_Pause)
66                 adv |= ADVERTISE_PAUSE_ASYM;
67         if (advertise & ADVERTISED_1000baseX_Half)
68                 adv |= ADVERTISE_1000XHALF;
69         if (advertise & ADVERTISED_1000baseX_Full)
70                 adv |= ADVERTISE_1000XFULL;
71
72         if (adv != oldadv) {
73                 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
74
75                 if (err < 0)
76                         return err;
77                 changed = 1;
78         }
79
80         bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
81         if (bmsr < 0)
82                 return bmsr;
83
84         /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
85          * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
86          * logical 1.
87          */
88         if (!(bmsr & BMSR_ESTATEN))
89                 return changed;
90
91         /* Configure gigabit if it's supported */
92         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
93         oldadv = adv;
94
95         if (adv < 0)
96                 return adv;
97
98         adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
99
100         if (phydev->supported & (SUPPORTED_1000baseT_Half |
101                                 SUPPORTED_1000baseT_Full)) {
102                 if (advertise & SUPPORTED_1000baseT_Half)
103                         adv |= ADVERTISE_1000HALF;
104                 if (advertise & SUPPORTED_1000baseT_Full)
105                         adv |= ADVERTISE_1000FULL;
106         }
107
108         if (adv != oldadv)
109                 changed = 1;
110
111         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
112         if (err < 0)
113                 return err;
114
115         return changed;
116 }
117
118 /**
119  * genphy_setup_forced - configures/forces speed/duplex from @phydev
120  * @phydev: target phy_device struct
121  *
122  * Description: Configures MII_BMCR to force speed/duplex
123  *   to the values in phydev. Assumes that the values are valid.
124  */
125 static int genphy_setup_forced(struct phy_device *phydev)
126 {
127         int err;
128         int ctl = BMCR_ANRESTART;
129
130         phydev->pause = 0;
131         phydev->asym_pause = 0;
132
133         if (phydev->speed == SPEED_1000)
134                 ctl |= BMCR_SPEED1000;
135         else if (phydev->speed == SPEED_100)
136                 ctl |= BMCR_SPEED100;
137
138         if (phydev->duplex == DUPLEX_FULL)
139                 ctl |= BMCR_FULLDPLX;
140
141         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
142
143         return err;
144 }
145
146 /**
147  * genphy_restart_aneg - Enable and Restart Autonegotiation
148  * @phydev: target phy_device struct
149  */
150 int genphy_restart_aneg(struct phy_device *phydev)
151 {
152         int ctl;
153
154         ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
155
156         if (ctl < 0)
157                 return ctl;
158
159         ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
160
161         /* Don't isolate the PHY if we're negotiating */
162         ctl &= ~(BMCR_ISOLATE);
163
164         ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
165
166         return ctl;
167 }
168
169 /**
170  * genphy_config_aneg - restart auto-negotiation or write BMCR
171  * @phydev: target phy_device struct
172  *
173  * Description: If auto-negotiation is enabled, we configure the
174  *   advertising, and then restart auto-negotiation.  If it is not
175  *   enabled, then we write the BMCR.
176  */
177 int genphy_config_aneg(struct phy_device *phydev)
178 {
179         int result;
180
181         if (phydev->autoneg != AUTONEG_ENABLE)
182                 return genphy_setup_forced(phydev);
183
184         result = genphy_config_advert(phydev);
185
186         if (result < 0) /* error */
187                 return result;
188
189         if (result == 0) {
190                 /*
191                  * Advertisment hasn't changed, but maybe aneg was never on to
192                  * begin with?  Or maybe phy was isolated?
193                  */
194                 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
195
196                 if (ctl < 0)
197                         return ctl;
198
199                 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
200                         result = 1; /* do restart aneg */
201         }
202
203         /*
204          * Only restart aneg if we are advertising something different
205          * than we were before.
206          */
207         if (result > 0)
208                 result = genphy_restart_aneg(phydev);
209
210         return result;
211 }
212
213 /**
214  * genphy_update_link - update link status in @phydev
215  * @phydev: target phy_device struct
216  *
217  * Description: Update the value in phydev->link to reflect the
218  *   current link value.  In order to do this, we need to read
219  *   the status register twice, keeping the second value.
220  */
221 int genphy_update_link(struct phy_device *phydev)
222 {
223         unsigned int mii_reg;
224
225         /*
226          * Wait if the link is up, and autonegotiation is in progress
227          * (ie - we're capable and it's not done)
228          */
229         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
230
231         /*
232          * If we already saw the link up, and it hasn't gone down, then
233          * we don't need to wait for autoneg again
234          */
235         if (phydev->link && mii_reg & BMSR_LSTATUS)
236                 return 0;
237
238         if ((phydev->autoneg == AUTONEG_ENABLE) &&
239             !(mii_reg & BMSR_ANEGCOMPLETE)) {
240                 int i = 0;
241
242                 printf("%s Waiting for PHY auto negotiation to complete",
243                        phydev->dev->name);
244                 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
245                         /*
246                          * Timeout reached ?
247                          */
248                         if (i > (PHY_ANEG_TIMEOUT / 50)) {
249                                 printf(" TIMEOUT !\n");
250                                 phydev->link = 0;
251                                 return -ETIMEDOUT;
252                         }
253
254                         if (ctrlc()) {
255                                 puts("user interrupt!\n");
256                                 phydev->link = 0;
257                                 return -EINTR;
258                         }
259
260                         if ((i++ % 10) == 0)
261                                 printf(".");
262
263                         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
264                         mdelay(50);     /* 50 ms */
265                 }
266                 printf(" done\n");
267                 phydev->link = 1;
268         } else {
269                 /* Read the link a second time to clear the latched state */
270                 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
271
272                 if (mii_reg & BMSR_LSTATUS)
273                         phydev->link = 1;
274                 else
275                         phydev->link = 0;
276         }
277
278         return 0;
279 }
280
281 /*
282  * Generic function which updates the speed and duplex.  If
283  * autonegotiation is enabled, it uses the AND of the link
284  * partner's advertised capabilities and our advertised
285  * capabilities.  If autonegotiation is disabled, we use the
286  * appropriate bits in the control register.
287  *
288  * Stolen from Linux's mii.c and phy_device.c
289  */
290 int genphy_parse_link(struct phy_device *phydev)
291 {
292         int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
293
294         /* We're using autonegotiation */
295         if (phydev->autoneg == AUTONEG_ENABLE) {
296                 u32 lpa = 0;
297                 int gblpa = 0;
298                 u32 estatus = 0;
299
300                 /* Check for gigabit capability */
301                 if (phydev->supported & (SUPPORTED_1000baseT_Full |
302                                         SUPPORTED_1000baseT_Half)) {
303                         /* We want a list of states supported by
304                          * both PHYs in the link
305                          */
306                         gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
307                         if (gblpa < 0) {
308                                 debug("Could not read MII_STAT1000. ");
309                                 debug("Ignoring gigabit capability\n");
310                                 gblpa = 0;
311                         }
312                         gblpa &= phy_read(phydev,
313                                         MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
314                 }
315
316                 /* Set the baseline so we only have to set them
317                  * if they're different
318                  */
319                 phydev->speed = SPEED_10;
320                 phydev->duplex = DUPLEX_HALF;
321
322                 /* Check the gigabit fields */
323                 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
324                         phydev->speed = SPEED_1000;
325
326                         if (gblpa & PHY_1000BTSR_1000FD)
327                                 phydev->duplex = DUPLEX_FULL;
328
329                         /* We're done! */
330                         return 0;
331                 }
332
333                 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
334                 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
335
336                 if (lpa & (LPA_100FULL | LPA_100HALF)) {
337                         phydev->speed = SPEED_100;
338
339                         if (lpa & LPA_100FULL)
340                                 phydev->duplex = DUPLEX_FULL;
341
342                 } else if (lpa & LPA_10FULL) {
343                         phydev->duplex = DUPLEX_FULL;
344                 }
345
346                 /*
347                  * Extended status may indicate that the PHY supports
348                  * 1000BASE-T/X even though the 1000BASE-T registers
349                  * are missing. In this case we can't tell whether the
350                  * peer also supports it, so we only check extended
351                  * status if the 1000BASE-T registers are actually
352                  * missing.
353                  */
354                 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
355                         estatus = phy_read(phydev, MDIO_DEVAD_NONE,
356                                            MII_ESTATUS);
357
358                 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
359                                 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
360                         phydev->speed = SPEED_1000;
361                         if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
362                                 phydev->duplex = DUPLEX_FULL;
363                 }
364
365         } else {
366                 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
367
368                 phydev->speed = SPEED_10;
369                 phydev->duplex = DUPLEX_HALF;
370
371                 if (bmcr & BMCR_FULLDPLX)
372                         phydev->duplex = DUPLEX_FULL;
373
374                 if (bmcr & BMCR_SPEED1000)
375                         phydev->speed = SPEED_1000;
376                 else if (bmcr & BMCR_SPEED100)
377                         phydev->speed = SPEED_100;
378         }
379
380         return 0;
381 }
382
383 int genphy_config(struct phy_device *phydev)
384 {
385         int val;
386         u32 features;
387
388         features = (SUPPORTED_TP | SUPPORTED_MII
389                         | SUPPORTED_AUI | SUPPORTED_FIBRE |
390                         SUPPORTED_BNC);
391
392         /* Do we support autonegotiation? */
393         val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
394
395         if (val < 0)
396                 return val;
397
398         if (val & BMSR_ANEGCAPABLE)
399                 features |= SUPPORTED_Autoneg;
400
401         if (val & BMSR_100FULL)
402                 features |= SUPPORTED_100baseT_Full;
403         if (val & BMSR_100HALF)
404                 features |= SUPPORTED_100baseT_Half;
405         if (val & BMSR_10FULL)
406                 features |= SUPPORTED_10baseT_Full;
407         if (val & BMSR_10HALF)
408                 features |= SUPPORTED_10baseT_Half;
409
410         if (val & BMSR_ESTATEN) {
411                 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
412
413                 if (val < 0)
414                         return val;
415
416                 if (val & ESTATUS_1000_TFULL)
417                         features |= SUPPORTED_1000baseT_Full;
418                 if (val & ESTATUS_1000_THALF)
419                         features |= SUPPORTED_1000baseT_Half;
420                 if (val & ESTATUS_1000_XFULL)
421                         features |= SUPPORTED_1000baseX_Full;
422                 if (val & ESTATUS_1000_XHALF)
423                         features |= SUPPORTED_1000baseX_Half;
424         }
425
426         phydev->supported &= features;
427         phydev->advertising &= features;
428
429         genphy_config_aneg(phydev);
430
431         return 0;
432 }
433
434 int genphy_startup(struct phy_device *phydev)
435 {
436         int ret;
437
438         ret = genphy_update_link(phydev);
439         if (ret)
440                 return ret;
441
442         return genphy_parse_link(phydev);
443 }
444
445 int genphy_shutdown(struct phy_device *phydev)
446 {
447         return 0;
448 }
449
450 static struct phy_driver genphy_driver = {
451         .uid            = 0xffffffff,
452         .mask           = 0xffffffff,
453         .name           = "Generic PHY",
454         .features       = PHY_GBIT_FEATURES | SUPPORTED_MII |
455                           SUPPORTED_AUI | SUPPORTED_FIBRE |
456                           SUPPORTED_BNC,
457         .config         = genphy_config,
458         .startup        = genphy_startup,
459         .shutdown       = genphy_shutdown,
460 };
461
462 int genphy_init(void)
463 {
464         return phy_register(&genphy_driver);
465 }
466
467 static LIST_HEAD(phy_drivers);
468
469 int phy_init(void)
470 {
471 #ifdef CONFIG_NEEDS_MANUAL_RELOC
472         /*
473          * The pointers inside phy_drivers also needs to be updated incase of
474          * manual reloc, without which these points to some invalid
475          * pre reloc address and leads to invalid accesses, hangs.
476          */
477         struct list_head *head = &phy_drivers;
478
479         head->next = (void *)head->next + gd->reloc_off;
480         head->prev = (void *)head->prev + gd->reloc_off;
481 #endif
482
483 #ifdef CONFIG_B53_SWITCH
484         phy_b53_init();
485 #endif
486 #ifdef CONFIG_MV88E61XX_SWITCH
487         phy_mv88e61xx_init();
488 #endif
489 #ifdef CONFIG_PHY_AQUANTIA
490         phy_aquantia_init();
491 #endif
492 #ifdef CONFIG_PHY_ATHEROS
493         phy_atheros_init();
494 #endif
495 #ifdef CONFIG_PHY_BROADCOM
496         phy_broadcom_init();
497 #endif
498 #ifdef CONFIG_PHY_CORTINA
499         phy_cortina_init();
500 #endif
501 #ifdef CONFIG_PHY_DAVICOM
502         phy_davicom_init();
503 #endif
504 #ifdef CONFIG_PHY_ET1011C
505         phy_et1011c_init();
506 #endif
507 #ifdef CONFIG_PHY_LXT
508         phy_lxt_init();
509 #endif
510 #ifdef CONFIG_PHY_MARVELL
511         phy_marvell_init();
512 #endif
513 #ifdef CONFIG_PHY_MICREL_KSZ8XXX
514         phy_micrel_ksz8xxx_init();
515 #endif
516 #ifdef CONFIG_PHY_MICREL_KSZ90X1
517         phy_micrel_ksz90x1_init();
518 #endif
519 #ifdef CONFIG_PHY_MESON_GXL
520         phy_meson_gxl_init();
521 #endif
522 #ifdef CONFIG_PHY_NATSEMI
523         phy_natsemi_init();
524 #endif
525 #ifdef CONFIG_PHY_REALTEK
526         phy_realtek_init();
527 #endif
528 #ifdef CONFIG_PHY_SMSC
529         phy_smsc_init();
530 #endif
531 #ifdef CONFIG_PHY_TERANETICS
532         phy_teranetics_init();
533 #endif
534 #ifdef CONFIG_PHY_TI
535         phy_ti_init();
536 #endif
537 #ifdef CONFIG_PHY_VITESSE
538         phy_vitesse_init();
539 #endif
540 #ifdef CONFIG_PHY_XILINX
541         phy_xilinx_init();
542 #endif
543 #ifdef CONFIG_PHY_MSCC
544         phy_mscc_init();
545 #endif
546 #ifdef CONFIG_PHY_FIXED
547         phy_fixed_init();
548 #endif
549 #ifdef CONFIG_PHY_NCSI
550         phy_ncsi_init();
551 #endif
552 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
553         phy_xilinx_gmii2rgmii_init();
554 #endif
555         genphy_init();
556
557         return 0;
558 }
559
560 int phy_register(struct phy_driver *drv)
561 {
562         INIT_LIST_HEAD(&drv->list);
563         list_add_tail(&drv->list, &phy_drivers);
564
565 #ifdef CONFIG_NEEDS_MANUAL_RELOC
566         if (drv->probe)
567                 drv->probe += gd->reloc_off;
568         if (drv->config)
569                 drv->config += gd->reloc_off;
570         if (drv->startup)
571                 drv->startup += gd->reloc_off;
572         if (drv->shutdown)
573                 drv->shutdown += gd->reloc_off;
574         if (drv->readext)
575                 drv->readext += gd->reloc_off;
576         if (drv->writeext)
577                 drv->writeext += gd->reloc_off;
578         if (drv->read_mmd)
579                 drv->read_mmd += gd->reloc_off;
580         if (drv->write_mmd)
581                 drv->write_mmd += gd->reloc_off;
582 #endif
583         return 0;
584 }
585
586 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
587 {
588         /* The default values for phydev->supported are provided by the PHY
589          * driver "features" member, we want to reset to sane defaults first
590          * before supporting higher speeds.
591          */
592         phydev->supported &= PHY_DEFAULT_FEATURES;
593
594         switch (max_speed) {
595         default:
596                 return -ENOTSUPP;
597         case SPEED_1000:
598                 phydev->supported |= PHY_1000BT_FEATURES;
599                 /* fall through */
600         case SPEED_100:
601                 phydev->supported |= PHY_100BT_FEATURES;
602                 /* fall through */
603         case SPEED_10:
604                 phydev->supported |= PHY_10BT_FEATURES;
605         }
606
607         return 0;
608 }
609
610 static int phy_probe(struct phy_device *phydev)
611 {
612         int err = 0;
613
614         phydev->advertising = phydev->drv->features;
615         phydev->supported = phydev->drv->features;
616
617         phydev->mmds = phydev->drv->mmds;
618
619         if (phydev->drv->probe)
620                 err = phydev->drv->probe(phydev);
621
622         return err;
623 }
624
625 static struct phy_driver *generic_for_interface(phy_interface_t interface)
626 {
627 #ifdef CONFIG_PHYLIB_10G
628         if (is_10g_interface(interface))
629                 return &gen10g_driver;
630 #endif
631
632         return &genphy_driver;
633 }
634
635 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
636                                          phy_interface_t interface)
637 {
638         struct list_head *entry;
639         int phy_id = phydev->phy_id;
640         struct phy_driver *drv = NULL;
641
642         list_for_each(entry, &phy_drivers) {
643                 drv = list_entry(entry, struct phy_driver, list);
644                 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
645                         return drv;
646         }
647
648         /* If we made it here, there's no driver for this PHY */
649         return generic_for_interface(interface);
650 }
651
652 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
653                                             u32 phy_id, bool is_c45,
654                                             phy_interface_t interface)
655 {
656         struct phy_device *dev;
657
658         /*
659          * We allocate the device, and initialize the
660          * default values
661          */
662         dev = malloc(sizeof(*dev));
663         if (!dev) {
664                 printf("Failed to allocate PHY device for %s:%d\n",
665                        bus->name, addr);
666                 return NULL;
667         }
668
669         memset(dev, 0, sizeof(*dev));
670
671         dev->duplex = -1;
672         dev->link = 0;
673         dev->interface = interface;
674
675 #ifdef CONFIG_DM_ETH
676         dev->node = ofnode_null();
677 #endif
678
679         dev->autoneg = AUTONEG_ENABLE;
680
681         dev->addr = addr;
682         dev->phy_id = phy_id;
683         dev->is_c45 = is_c45;
684         dev->bus = bus;
685
686         dev->drv = get_phy_driver(dev, interface);
687
688         if (phy_probe(dev)) {
689                 printf("%s, PHY probe failed\n", __func__);
690                 return NULL;
691         }
692
693         if (addr >= 0 && addr < PHY_MAX_ADDR)
694                 bus->phymap[addr] = dev;
695
696         return dev;
697 }
698
699 /**
700  * get_phy_id - reads the specified addr for its ID.
701  * @bus: the target MII bus
702  * @addr: PHY address on the MII bus
703  * @phy_id: where to store the ID retrieved.
704  *
705  * Description: Reads the ID registers of the PHY at @addr on the
706  *   @bus, stores it in @phy_id and returns zero on success.
707  */
708 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
709 {
710         int phy_reg;
711
712         /*
713          * Grab the bits from PHYIR1, and put them
714          * in the upper half
715          */
716         phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
717
718         if (phy_reg < 0)
719                 return -EIO;
720
721         *phy_id = (phy_reg & 0xffff) << 16;
722
723         /* Grab the bits from PHYIR2, and put them in the lower half */
724         phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
725
726         if (phy_reg < 0)
727                 return -EIO;
728
729         *phy_id |= (phy_reg & 0xffff);
730
731         return 0;
732 }
733
734 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
735                                              uint phy_mask, int devad,
736                                              phy_interface_t interface)
737 {
738         u32 phy_id = 0xffffffff;
739         bool is_c45;
740
741         while (phy_mask) {
742                 int addr = ffs(phy_mask) - 1;
743                 int r = get_phy_id(bus, addr, devad, &phy_id);
744
745                 /*
746                  * If the PHY ID is flat 0 we ignore it.  There are C45 PHYs
747                  * that return all 0s for C22 reads (like Aquantia AQR112) and
748                  * there are C22 PHYs that return all 0s for C45 reads (like
749                  * Atheros AR8035).
750                  */
751                 if (r == 0 && phy_id == 0)
752                         goto next;
753
754                 /* If the PHY ID is mostly f's, we didn't find anything */
755                 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
756                         is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
757                         return phy_device_create(bus, addr, phy_id, is_c45,
758                                                  interface);
759                 }
760 next:
761                 phy_mask &= ~(1 << addr);
762         }
763         return NULL;
764 }
765
766 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
767                                                   uint phy_mask,
768                                                   phy_interface_t interface)
769 {
770         /* If we have one, return the existing device, with new interface */
771         while (phy_mask) {
772                 int addr = ffs(phy_mask) - 1;
773
774                 if (bus->phymap[addr]) {
775                         bus->phymap[addr]->interface = interface;
776                         return bus->phymap[addr];
777                 }
778                 phy_mask &= ~(1 << addr);
779         }
780         return NULL;
781 }
782
783 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
784                                                  uint phy_mask,
785                                                  phy_interface_t interface)
786 {
787         int i;
788         struct phy_device *phydev;
789
790         phydev = search_for_existing_phy(bus, phy_mask, interface);
791         if (phydev)
792                 return phydev;
793         /* Try Standard (ie Clause 22) access */
794         /* Otherwise we have to try Clause 45 */
795         for (i = 0; i < 5; i++) {
796                 phydev = create_phy_by_mask(bus, phy_mask,
797                                             i ? i : MDIO_DEVAD_NONE, interface);
798                 if (IS_ERR(phydev))
799                         return NULL;
800                 if (phydev)
801                         return phydev;
802         }
803
804         debug("\n%s PHY: ", bus->name);
805         while (phy_mask) {
806                 int addr = ffs(phy_mask) - 1;
807
808                 debug("%d ", addr);
809                 phy_mask &= ~(1 << addr);
810         }
811         debug("not found\n");
812
813         return NULL;
814 }
815
816 /**
817  * get_phy_device - reads the specified PHY device and returns its
818  *                  @phy_device struct
819  * @bus: the target MII bus
820  * @addr: PHY address on the MII bus
821  *
822  * Description: Reads the ID registers of the PHY at @addr on the
823  *   @bus, then allocates and returns the phy_device to represent it.
824  */
825 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
826                                          phy_interface_t interface)
827 {
828         return get_phy_device_by_mask(bus, 1 << addr, interface);
829 }
830
831 int phy_reset(struct phy_device *phydev)
832 {
833         int reg;
834         int timeout = 500;
835         int devad = MDIO_DEVAD_NONE;
836
837         if (phydev->flags & PHY_FLAG_BROKEN_RESET)
838                 return 0;
839
840 #ifdef CONFIG_PHYLIB_10G
841         /* If it's 10G, we need to issue reset through one of the MMDs */
842         if (is_10g_interface(phydev->interface)) {
843                 if (!phydev->mmds)
844                         gen10g_discover_mmds(phydev);
845
846                 devad = ffs(phydev->mmds) - 1;
847         }
848 #endif
849
850         if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
851                 debug("PHY reset failed\n");
852                 return -1;
853         }
854
855 #ifdef CONFIG_PHY_RESET_DELAY
856         udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
857 #endif
858         /*
859          * Poll the control register for the reset bit to go to 0 (it is
860          * auto-clearing).  This should happen within 0.5 seconds per the
861          * IEEE spec.
862          */
863         reg = phy_read(phydev, devad, MII_BMCR);
864         while ((reg & BMCR_RESET) && timeout--) {
865                 reg = phy_read(phydev, devad, MII_BMCR);
866
867                 if (reg < 0) {
868                         debug("PHY status read failed\n");
869                         return -1;
870                 }
871                 udelay(1000);
872         }
873
874         if (reg & BMCR_RESET) {
875                 puts("PHY reset timed out\n");
876                 return -1;
877         }
878
879         return 0;
880 }
881
882 int miiphy_reset(const char *devname, unsigned char addr)
883 {
884         struct mii_dev *bus = miiphy_get_dev_by_name(devname);
885         struct phy_device *phydev;
886
887         /*
888          * miiphy_reset was only used on standard PHYs, so we'll fake it here.
889          * If later code tries to connect with the right interface, this will
890          * be corrected by get_phy_device in phy_connect()
891          */
892         phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
893
894         return phy_reset(phydev);
895 }
896
897 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
898                                     phy_interface_t interface)
899 {
900         /* Reset the bus */
901         if (bus->reset) {
902                 bus->reset(bus);
903
904                 /* Wait 15ms to make sure the PHY has come out of hard reset */
905                 mdelay(15);
906         }
907
908         return get_phy_device_by_mask(bus, phy_mask, interface);
909 }
910
911 #ifdef CONFIG_DM_ETH
912 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
913 #else
914 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
915 #endif
916 {
917         /* Soft Reset the PHY */
918         phy_reset(phydev);
919         if (phydev->dev && phydev->dev != dev) {
920                 printf("%s:%d is connected to %s.  Reconnecting to %s\n",
921                        phydev->bus->name, phydev->addr,
922                        phydev->dev->name, dev->name);
923         }
924         phydev->dev = dev;
925         debug("%s connected to %s\n", dev->name, phydev->drv->name);
926 }
927
928 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
929 #ifdef CONFIG_DM_ETH
930 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
931                                                  struct udevice *dev,
932                                                  phy_interface_t interface)
933 #else
934 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
935                                                  struct eth_device *dev,
936                                                  phy_interface_t interface)
937 #endif
938 {
939         struct phy_device *phydev = NULL;
940         int sn = dev_of_offset(dev);
941         int off;
942
943         while (sn > 0) {
944                 off = fdt_node_offset_by_compatible(gd->fdt_blob, sn,
945                                                     "xlnx,gmii-to-rgmii-1.0");
946                 if (off > 0) {
947                         phydev = phy_device_create(bus, off,
948                                                    PHY_GMII2RGMII_ID, false,
949                                                    interface);
950                         break;
951                 }
952                 if (off == -FDT_ERR_NOTFOUND)
953                         sn = fdt_first_subnode(gd->fdt_blob, sn);
954                 else
955                         printf("%s: Error finding compat string:%d\n",
956                                __func__, off);
957         }
958
959         return phydev;
960 }
961 #endif
962
963 #ifdef CONFIG_PHY_FIXED
964 #ifdef CONFIG_DM_ETH
965 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
966                                             struct udevice *dev,
967                                             phy_interface_t interface)
968 #else
969 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
970                                             struct eth_device *dev,
971                                             phy_interface_t interface)
972 #endif
973 {
974         struct phy_device *phydev = NULL;
975         int sn;
976         const char *name;
977
978         sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
979         while (sn > 0) {
980                 name = fdt_get_name(gd->fdt_blob, sn, NULL);
981                 if (name && strcmp(name, "fixed-link") == 0) {
982                         phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
983                                                    interface);
984                         break;
985                 }
986                 sn = fdt_next_subnode(gd->fdt_blob, sn);
987         }
988
989         return phydev;
990 }
991 #endif
992
993 #ifdef CONFIG_DM_ETH
994 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
995                                struct udevice *dev,
996                                phy_interface_t interface)
997 #else
998 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
999                                struct eth_device *dev,
1000                                phy_interface_t interface)
1001 #endif
1002 {
1003         struct phy_device *phydev = NULL;
1004         uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff;
1005
1006 #ifdef CONFIG_PHY_FIXED
1007         phydev = phy_connect_fixed(bus, dev, interface);
1008 #endif
1009
1010 #ifdef CONFIG_PHY_NCSI
1011         if (!phydev)
1012                 phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false, interface);
1013 #endif
1014
1015 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
1016         if (!phydev)
1017                 phydev = phy_connect_gmii2rgmii(bus, dev, interface);
1018 #endif
1019
1020         if (!phydev)
1021                 phydev = phy_find_by_mask(bus, mask, interface);
1022
1023         if (phydev)
1024                 phy_connect_dev(phydev, dev);
1025         else
1026                 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
1027         return phydev;
1028 }
1029
1030 /*
1031  * Start the PHY.  Returns 0 on success, or a negative error code.
1032  */
1033 int phy_startup(struct phy_device *phydev)
1034 {
1035         if (phydev->drv->startup)
1036                 return phydev->drv->startup(phydev);
1037
1038         return 0;
1039 }
1040
1041 __weak int board_phy_config(struct phy_device *phydev)
1042 {
1043         if (phydev->drv->config)
1044                 return phydev->drv->config(phydev);
1045         return 0;
1046 }
1047
1048 int phy_config(struct phy_device *phydev)
1049 {
1050         /* Invoke an optional board-specific helper */
1051         return board_phy_config(phydev);
1052 }
1053
1054 int phy_shutdown(struct phy_device *phydev)
1055 {
1056         if (phydev->drv->shutdown)
1057                 phydev->drv->shutdown(phydev);
1058
1059         return 0;
1060 }
1061
1062 int phy_get_interface_by_name(const char *str)
1063 {
1064         int i;
1065
1066         for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
1067                 if (!strcmp(str, phy_interface_strings[i]))
1068                         return i;
1069         }
1070
1071         return -1;
1072 }