2 * Dave Ethernet Controller driver
4 * Copyright (C) 2008 Dave S.r.l. <www.dave.eu>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
14 #ifndef CONFIG_DNET_AUTONEG_TIMEOUT
15 #define CONFIG_DNET_AUTONEG_TIMEOUT 5000000 /* default value */
20 #include <linux/mii.h>
24 #include <asm/unaligned.h>
29 struct dnet_registers *regs;
30 const struct device *dev;
31 struct eth_device netdev;
32 unsigned short phy_addr;
35 /* get struct dnet_device from given struct netdev */
36 #define to_dnet(_nd) container_of(_nd, struct dnet_device, netdev)
38 /* function for reading internal MAC register */
39 u16 dnet_readw_mac(struct dnet_device *dnet, u16 reg)
44 writel(reg, &dnet->regs->MACREG_ADDR);
46 /* since a read/write op to the MAC is very slow,
47 * we must wait before reading the data */
50 /* read data read from the MAC register */
51 data_read = readl(&dnet->regs->MACREG_DATA);
57 /* function for writing internal MAC register */
58 void dnet_writew_mac(struct dnet_device *dnet, u16 reg, u16 val)
60 /* load data to write */
61 writel(val, &dnet->regs->MACREG_DATA);
64 writel(reg | DNET_INTERNAL_WRITE, &dnet->regs->MACREG_ADDR);
66 /* since a read/write op to the MAC is very slow,
67 * we must wait before exiting */
71 static void dnet_mdio_write(struct dnet_device *dnet, u8 reg, u16 value)
75 debug(DRIVERNAME "dnet_mdio_write %02x:%02x <- %04x\n",
76 dnet->phy_addr, reg, value);
78 while (!(dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG) &
79 DNET_INTERNAL_GMII_MNG_CMD_FIN))
82 /* prepare for a write operation */
85 /* only 5 bits allowed for register offset */
88 /* prepare reg_value for a write */
89 tmp |= (dnet->phy_addr << 8);
92 /* write data to write first */
93 dnet_writew_mac(dnet, DNET_INTERNAL_GMII_MNG_DAT_REG, value);
95 /* write control word */
96 dnet_writew_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG, tmp);
98 while (!(dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG) &
99 DNET_INTERNAL_GMII_MNG_CMD_FIN))
103 static u16 dnet_mdio_read(struct dnet_device *dnet, u8 reg)
107 while (!(dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG) &
108 DNET_INTERNAL_GMII_MNG_CMD_FIN))
111 /* only 5 bits allowed for register offset*/
114 /* prepare reg_value for a read */
115 value = (dnet->phy_addr << 8);
118 /* write control word */
119 dnet_writew_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG, value);
121 /* wait for end of transfer */
122 while (!(dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG) &
123 DNET_INTERNAL_GMII_MNG_CMD_FIN))
126 value = dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_DAT_REG);
128 debug(DRIVERNAME "dnet_mdio_read %02x:%02x <- %04x\n",
129 dnet->phy_addr, reg, value);
134 static int dnet_send(struct eth_device *netdev, void *packet, int length)
136 struct dnet_device *dnet = to_dnet(netdev);
141 debug(DRIVERNAME "[%s] Sending %u bytes\n", __func__, length);
143 bufp = (unsigned int *) (((u32)packet) & 0xFFFFFFFC);
144 wrsz = (u32)length + 3;
145 wrsz += ((u32)packet) & 0x3;
147 tx_cmd = ((((unsigned int)(packet)) & 0x03) << 16) | (u32)length;
149 /* check if there is enough room for the current frame */
150 if (wrsz < (DNET_FIFO_SIZE - readl(&dnet->regs->TX_FIFO_WCNT))) {
151 for (i = 0; i < wrsz; i++)
152 writel(*bufp++, &dnet->regs->TX_DATA_FIFO);
154 * inform MAC that a packet's written and ready
157 writel(tx_cmd, &dnet->regs->TX_LEN_FIFO);
159 printf(DRIVERNAME "No free space (actual %d, required %d "
160 "(words))\n", DNET_FIFO_SIZE -
161 readl(&dnet->regs->TX_FIFO_WCNT), wrsz);
164 /* No one cares anyway */
169 static int dnet_recv(struct eth_device *netdev)
171 struct dnet_device *dnet = to_dnet(netdev);
172 unsigned int *data_ptr;
173 int pkt_len, poll, i;
176 debug("Waiting for pkt (polling)\n");
178 while ((readl(&dnet->regs->RX_FIFO_WCNT) >> 16) == 0) {
179 udelay(10); /* wait 10 usec */
181 return 0; /* no pkt available */
184 cmd_word = readl(&dnet->regs->RX_LEN_FIFO);
185 pkt_len = cmd_word & 0xFFFF;
187 debug("Got pkt with size %d bytes\n", pkt_len);
189 if (cmd_word & 0xDF180000)
190 printf("%s packet receive error %x\n", __func__, cmd_word);
192 data_ptr = (unsigned int *)net_rx_packets[0];
194 for (i = 0; i < (pkt_len + 3) >> 2; i++)
195 *data_ptr++ = readl(&dnet->regs->RX_DATA_FIFO);
198 net_process_received_packet(net_rx_packets[0], pkt_len + 5);
203 static void dnet_set_hwaddr(struct eth_device *netdev)
205 struct dnet_device *dnet = to_dnet(netdev);
208 tmp = get_unaligned_be16(netdev->enetaddr);
209 dnet_writew_mac(dnet, DNET_INTERNAL_MAC_ADDR_0_REG, tmp);
210 tmp = get_unaligned_be16(&netdev->enetaddr[2]);
211 dnet_writew_mac(dnet, DNET_INTERNAL_MAC_ADDR_1_REG, tmp);
212 tmp = get_unaligned_be16(&netdev->enetaddr[4]);
213 dnet_writew_mac(dnet, DNET_INTERNAL_MAC_ADDR_2_REG, tmp);
216 static void dnet_phy_reset(struct dnet_device *dnet)
218 struct eth_device *netdev = &dnet->netdev;
222 adv = ADVERTISE_CSMA | ADVERTISE_ALL;
223 dnet_mdio_write(dnet, MII_ADVERTISE, adv);
224 printf("%s: Starting autonegotiation...\n", netdev->name);
225 dnet_mdio_write(dnet, MII_BMCR, (BMCR_ANENABLE
228 for (i = 0; i < CONFIG_DNET_AUTONEG_TIMEOUT / 100; i++) {
229 status = dnet_mdio_read(dnet, MII_BMSR);
230 if (status & BMSR_ANEGCOMPLETE)
235 if (status & BMSR_ANEGCOMPLETE)
236 printf("%s: Autonegotiation complete\n", netdev->name);
238 printf("%s: Autonegotiation timed out (status=0x%04x)\n",
239 netdev->name, status);
242 static int dnet_phy_init(struct dnet_device *dnet)
244 struct eth_device *netdev = &dnet->netdev;
245 u16 phy_id, status, adv, lpa;
246 int media, speed, duplex;
251 for (i = 0; i < 32; i++) {
253 phy_id = dnet_mdio_read(dnet, MII_PHYSID1);
254 if (phy_id != 0xffff) {
256 printf("Found PHY at address %d PHYID (%04x:%04x)\n",
258 dnet_mdio_read(dnet, MII_PHYSID2));
263 /* Check if the PHY is up to snuff... */
264 phy_id = dnet_mdio_read(dnet, MII_PHYSID1);
265 if (phy_id == 0xffff) {
266 printf("%s: No PHY present\n", netdev->name);
270 status = dnet_mdio_read(dnet, MII_BMSR);
271 if (!(status & BMSR_LSTATUS)) {
272 /* Try to re-negotiate if we don't have link already. */
273 dnet_phy_reset(dnet);
275 for (i = 0; i < CONFIG_DNET_AUTONEG_TIMEOUT / 100; i++) {
276 status = dnet_mdio_read(dnet, MII_BMSR);
277 if (status & BMSR_LSTATUS)
283 if (!(status & BMSR_LSTATUS)) {
284 printf("%s: link down (status: 0x%04x)\n",
285 netdev->name, status);
288 adv = dnet_mdio_read(dnet, MII_ADVERTISE);
289 lpa = dnet_mdio_read(dnet, MII_LPA);
290 media = mii_nway_result(lpa & adv);
291 speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
293 duplex = (media & ADVERTISE_FULL) ? 1 : 0;
294 /* 1000BaseT ethernet is not supported */
295 printf("%s: link up, %sMbps %s-duplex (lpa: 0x%04x)\n",
297 speed ? "100" : "10",
298 duplex ? "full" : "half",
301 ctl_reg = dnet_readw_mac(dnet, DNET_INTERNAL_RXTX_CONTROL_REG);
304 ctl_reg &= ~(DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP);
306 ctl_reg |= DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP;
308 dnet_writew_mac(dnet, DNET_INTERNAL_RXTX_CONTROL_REG, ctl_reg);
314 static int dnet_init(struct eth_device *netdev, bd_t *bd)
316 struct dnet_device *dnet = to_dnet(netdev);
320 * dnet_halt should have been called at some point before now,
321 * so we'll assume the controller is idle.
324 /* set hardware address */
325 dnet_set_hwaddr(netdev);
327 if (dnet_phy_init(dnet) < 0)
330 /* flush rx/tx fifos */
331 writel(DNET_SYS_CTL_RXFIFOFLUSH | DNET_SYS_CTL_TXFIFOFLUSH,
332 &dnet->regs->SYS_CTL);
334 writel(0, &dnet->regs->SYS_CTL);
336 config = dnet_readw_mac(dnet, DNET_INTERNAL_RXTX_CONTROL_REG);
338 config |= DNET_INTERNAL_RXTX_CONTROL_RXPAUSE |
339 DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST |
340 DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL |
341 DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS;
343 dnet_writew_mac(dnet, DNET_INTERNAL_RXTX_CONTROL_REG, config);
345 /* Enable TX and RX */
346 dnet_writew_mac(dnet, DNET_INTERNAL_MODE_REG,
347 DNET_INTERNAL_MODE_RXEN | DNET_INTERNAL_MODE_TXEN);
352 static void dnet_halt(struct eth_device *netdev)
354 struct dnet_device *dnet = to_dnet(netdev);
356 /* Disable TX and RX */
357 dnet_writew_mac(dnet, DNET_INTERNAL_MODE_REG, 0);
360 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr)
362 struct dnet_device *dnet;
363 struct eth_device *netdev;
364 unsigned int dev_capa;
366 dnet = malloc(sizeof(struct dnet_device));
368 printf("Error: Failed to allocate memory for DNET%d\n", id);
371 memset(dnet, 0, sizeof(struct dnet_device));
373 netdev = &dnet->netdev;
375 dnet->regs = (struct dnet_registers *)regs;
376 dnet->phy_addr = phy_addr;
378 sprintf(netdev->name, "dnet%d", id);
379 netdev->init = dnet_init;
380 netdev->halt = dnet_halt;
381 netdev->send = dnet_send;
382 netdev->recv = dnet_recv;
384 dev_capa = readl(&dnet->regs->VERCAPS) & 0xFFFF;
385 debug("%s: has %smdio, %sirq, %sgigabit, %sdma \n", netdev->name,
386 (dev_capa & DNET_HAS_MDIO) ? "" : "no ",
387 (dev_capa & DNET_HAS_IRQ) ? "" : "no ",
388 (dev_capa & DNET_HAS_GIGABIT) ? "" : "no ",
389 (dev_capa & DNET_HAS_DMA) ? "" : "no ");
391 eth_register(netdev);