1 // SPDX-License-Identifier: GPL-2.0+
3 * Atmel DataFlash probing
5 * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc.
6 * Haikun Wang (haikun.wang@freescale.com)
16 #include <spi_flash.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/math64.h>
22 #include "sf_internal.h"
24 #define CMD_READ_ID 0x9f
25 /* reads can bypass the buffers */
26 #define OP_READ_CONTINUOUS 0xE8
27 #define OP_READ_PAGE 0xD2
29 /* group B requests can run even while status reports "busy" */
30 #define OP_READ_STATUS 0xD7 /* group B */
32 /* move data between host and buffer */
33 #define OP_READ_BUFFER1 0xD4 /* group B */
34 #define OP_READ_BUFFER2 0xD6 /* group B */
35 #define OP_WRITE_BUFFER1 0x84 /* group B */
36 #define OP_WRITE_BUFFER2 0x87 /* group B */
39 #define OP_ERASE_PAGE 0x81
40 #define OP_ERASE_BLOCK 0x50
42 /* move data between buffer and flash */
43 #define OP_TRANSFER_BUF1 0x53
44 #define OP_TRANSFER_BUF2 0x55
45 #define OP_MREAD_BUFFER1 0xD4
46 #define OP_MREAD_BUFFER2 0xD6
47 #define OP_MWERASE_BUFFER1 0x83
48 #define OP_MWERASE_BUFFER2 0x86
49 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
50 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
52 /* write to buffer, then write-erase to flash */
53 #define OP_PROGRAM_VIA_BUF1 0x82
54 #define OP_PROGRAM_VIA_BUF2 0x85
56 /* compare buffer to flash */
57 #define OP_COMPARE_BUF1 0x60
58 #define OP_COMPARE_BUF2 0x61
60 /* read flash to buffer, then write-erase to flash */
61 #define OP_REWRITE_VIA_BUF1 0x58
62 #define OP_REWRITE_VIA_BUF2 0x59
65 * newer chips report JEDEC manufacturer and device IDs; chip
66 * serial number and OTP bits; and per-sector writeprotect.
68 #define OP_READ_ID 0x9F
69 #define OP_READ_SECURITY 0x77
70 #define OP_WRITE_SECURITY_REVC 0x9A
71 #define OP_WRITE_SECURITY 0x9B /* revision D */
75 unsigned short page_offset; /* offset in flash address */
78 /* Return the status of the DataFlash device */
79 static inline int dataflash_status(struct spi_slave *spi)
82 u8 opcode = OP_READ_STATUS;
86 * NOTE: at45db321c over 25 MHz wants to write
87 * a dummy byte after the opcode...
89 ret = spi_write_then_read(spi, &opcode, 1, NULL, &status, 1);
90 return ret ? -EIO : status;
94 * Poll the DataFlash device until it is READY.
95 * This usually takes 5-20 msec or so; more for sector erase.
98 static int dataflash_waitready(struct spi_slave *spi)
101 int timeout = 2 * CONFIG_SYS_HZ;
104 timebase = get_timer(0);
106 status = dataflash_status(spi);
110 if (status & (1 << 7)) /* RDY/nBSY */
114 } while (get_timer(timebase) < timeout);
119 /* Erase pages of flash */
120 static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len)
122 struct dataflash *dataflash;
123 struct spi_flash *spi_flash;
124 struct spi_slave *spi;
130 dataflash = dev_get_priv(dev);
131 spi_flash = dev_get_uclass_priv(dev);
132 spi = spi_flash->spi;
134 blocksize = spi_flash->page_size << 3;
136 memset(dataflash->command, 0 , sizeof(dataflash->command));
137 command = dataflash->command;
139 debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
141 div_u64_rem(len, spi_flash->page_size, &rem);
143 printf("%s: len(0x%x) isn't the multiple of page size(0x%x)\n",
144 dev->name, len, spi_flash->page_size);
147 div_u64_rem(offset, spi_flash->page_size, &rem);
149 printf("%s: offset(0x%x) isn't the multiple of page size(0x%x)\n",
150 dev->name, offset, spi_flash->page_size);
154 status = spi_claim_bus(spi);
156 debug("dataflash: unable to claim SPI bus\n");
161 unsigned int pageaddr;
164 * Calculate flash page address; use block erase (for speed) if
165 * we're at a block boundary and need to erase the whole block.
167 pageaddr = div_u64(offset, spi_flash->page_size);
168 do_block = (pageaddr & 0x7) == 0 && len >= blocksize;
169 pageaddr = pageaddr << dataflash->page_offset;
171 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
172 command[1] = (uint8_t)(pageaddr >> 16);
173 command[2] = (uint8_t)(pageaddr >> 8);
176 debug("%s ERASE %s: (%x) %x %x %x [%d]\n",
177 dev->name, do_block ? "block" : "page",
178 command[0], command[1], command[2], command[3],
181 status = spi_write_then_read(spi, command, 4, NULL, NULL, 0);
183 debug("%s: erase send command error!\n", dev->name);
187 status = dataflash_waitready(spi);
189 debug("%s: erase waitready error!\n", dev->name);
197 offset += spi_flash->page_size;
198 len -= spi_flash->page_size;
202 spi_release_bus(spi);
208 * Read from the DataFlash device.
209 * offset : Start offset in flash device
210 * len : Amount to read
211 * buf : Buffer containing the data
213 static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len,
216 struct dataflash *dataflash;
217 struct spi_flash *spi_flash;
218 struct spi_slave *spi;
223 dataflash = dev_get_priv(dev);
224 spi_flash = dev_get_uclass_priv(dev);
225 spi = spi_flash->spi;
227 memset(dataflash->command, 0 , sizeof(dataflash->command));
228 command = dataflash->command;
230 debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
231 debug("READ: (%x) %x %x %x\n",
232 command[0], command[1], command[2], command[3]);
234 /* Calculate flash page/byte address */
235 addr = (((unsigned)offset / spi_flash->page_size)
236 << dataflash->page_offset)
237 + ((unsigned)offset % spi_flash->page_size);
239 status = spi_claim_bus(spi);
241 debug("dataflash: unable to claim SPI bus\n");
246 * Continuous read, max clock = f(car) which may be less than
247 * the peak rate available. Some chips support commands with
248 * fewer "don't care" bytes. Both buffers stay unchanged.
250 command[0] = OP_READ_CONTINUOUS;
251 command[1] = (uint8_t)(addr >> 16);
252 command[2] = (uint8_t)(addr >> 8);
253 command[3] = (uint8_t)(addr >> 0);
255 /* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */
256 status = spi_write_then_read(spi, command, 8, NULL, buf, len);
258 spi_release_bus(spi);
264 * Write to the DataFlash device.
265 * offset : Start offset in flash device
266 * len : Amount to write
267 * buf : Buffer containing the data
269 int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len,
272 struct dataflash *dataflash;
273 struct spi_flash *spi_flash;
274 struct spi_slave *spi;
276 unsigned int pageaddr, addr, to, writelen;
277 size_t remaining = len;
278 u_char *writebuf = (u_char *)buf;
279 int status = -EINVAL;
281 dataflash = dev_get_priv(dev);
282 spi_flash = dev_get_uclass_priv(dev);
283 spi = spi_flash->spi;
285 memset(dataflash->command, 0 , sizeof(dataflash->command));
286 command = dataflash->command;
288 debug("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len));
290 pageaddr = ((unsigned)offset / spi_flash->page_size);
291 to = ((unsigned)offset % spi_flash->page_size);
292 if (to + len > spi_flash->page_size)
293 writelen = spi_flash->page_size - to;
297 status = spi_claim_bus(spi);
299 debug("dataflash: unable to claim SPI bus\n");
303 while (remaining > 0) {
304 debug("write @ %d:%d len=%d\n", pageaddr, to, writelen);
308 * (a) each page in a sector must be rewritten at least
309 * once every 10K sibling erase/program operations.
310 * (b) for pages that are already erased, we could
311 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
312 * (c) WRITE to buffer could be done while waiting for
313 * a previous MWRITE/MWERASE to complete ...
314 * (d) error handling here seems to be mostly missing.
316 * Two persistent bits per page, plus a per-sector counter,
317 * could support (a) and (b) ... we might consider using
318 * the second half of sector zero, which is just one block,
319 * to track that state. (On AT91, that sector should also
320 * support boot-from-DataFlash.)
323 addr = pageaddr << dataflash->page_offset;
325 /* (1) Maybe transfer partial page to Buffer1 */
326 if (writelen != spi_flash->page_size) {
327 command[0] = OP_TRANSFER_BUF1;
328 command[1] = (addr & 0x00FF0000) >> 16;
329 command[2] = (addr & 0x0000FF00) >> 8;
332 debug("TRANSFER: (%x) %x %x %x\n",
333 command[0], command[1], command[2], command[3]);
335 status = spi_write_then_read(spi, command, 4,
338 debug("%s: write(<pagesize) command error!\n",
343 status = dataflash_waitready(spi);
345 debug("%s: write(<pagesize) waitready error!\n",
351 /* (2) Program full page via Buffer1 */
353 command[0] = OP_PROGRAM_VIA_BUF1;
354 command[1] = (addr & 0x00FF0000) >> 16;
355 command[2] = (addr & 0x0000FF00) >> 8;
356 command[3] = (addr & 0x000000FF);
358 debug("PROGRAM: (%x) %x %x %x\n",
359 command[0], command[1], command[2], command[3]);
361 status = spi_write_then_read(spi, command, 4,
362 writebuf, NULL, writelen);
364 debug("%s: write send command error!\n", dev->name);
368 status = dataflash_waitready(spi);
370 debug("%s: write waitready error!\n", dev->name);
374 #ifdef CONFIG_SPI_DATAFLASH_WRITE_VERIFY
375 /* (3) Compare to Buffer1 */
376 addr = pageaddr << dataflash->page_offset;
377 command[0] = OP_COMPARE_BUF1;
378 command[1] = (addr & 0x00FF0000) >> 16;
379 command[2] = (addr & 0x0000FF00) >> 8;
382 debug("COMPARE: (%x) %x %x %x\n",
383 command[0], command[1], command[2], command[3]);
385 status = spi_write_then_read(spi, command, 4,
386 writebuf, NULL, writelen);
388 debug("%s: write(compare) send command error!\n",
393 status = dataflash_waitready(spi);
395 /* Check result of the compare operation */
396 if (status & (1 << 6)) {
397 printf("dataflash: write compare page %u, err %d\n",
406 #endif /* CONFIG_SPI_DATAFLASH_WRITE_VERIFY */
407 remaining = remaining - writelen;
410 writebuf += writelen;
412 if (remaining > spi_flash->page_size)
413 writelen = spi_flash->page_size;
415 writelen = remaining;
418 spi_release_bus(spi);
423 static int add_dataflash(struct udevice *dev, char *name, int nr_pages,
424 int pagesize, int pageoffset, char revision)
426 struct spi_flash *spi_flash;
427 struct dataflash *dataflash;
429 dataflash = dev_get_priv(dev);
430 spi_flash = dev_get_uclass_priv(dev);
432 dataflash->page_offset = pageoffset;
434 spi_flash->name = name;
435 spi_flash->page_size = pagesize;
436 spi_flash->size = nr_pages * pagesize;
437 spi_flash->erase_size = pagesize;
439 #ifndef CONFIG_SPL_BUILD
440 printf("SPI DataFlash: Detected %s with page size ", spi_flash->name);
441 print_size(spi_flash->page_size, ", erase size ");
442 print_size(spi_flash->erase_size, ", total ");
443 print_size(spi_flash->size, "");
444 printf(", revision %c", revision);
451 struct data_flash_info {
455 * JEDEC id has a high byte of zero plus three data bytes:
456 * the manufacturer id, then a two byte device id.
460 /* The size listed here is what works with OP_ERASE_PAGE. */
466 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
467 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
470 static struct data_flash_info dataflash_data[] = {
472 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
473 * one with IS_POW2PS and the other without. The entry with the
474 * non-2^N byte page size can't name exact chip revisions without
475 * losing backwards compatibility for cmdlinepart.
477 * Those two entries have different name spelling format in order to
478 * show their difference obviously.
479 * The upper case refer to the chip isn't in normal 2^N bytes page-size
481 * The lower case refer to the chip is in normal 2^N bytes page-size
484 * These newer chips also support 128-byte security registers (with
485 * 64 bytes one-time-programmable) and software write-protection.
487 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
488 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
490 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
491 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
493 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
494 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
496 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
497 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
499 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
500 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
502 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
504 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
505 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
507 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
508 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
511 static struct data_flash_info *jedec_probe(struct spi_slave *spi)
516 struct data_flash_info *info;
517 u8 opcode = CMD_READ_ID;
521 * JEDEC also defines an optional "extended device information"
522 * string for after vendor-specific data, after the three bytes
523 * we use here. Supporting some chips might require using it.
525 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
526 * That's not an error; only rev C and newer chips handle it, and
527 * only Atmel sells these chips.
529 tmp = spi_write_then_read(spi, &opcode, 1, NULL, id, sizeof(id));
531 printf("dataflash: error %d reading JEDEC ID\n", tmp);
543 for (tmp = 0, info = dataflash_data;
544 tmp < ARRAY_SIZE(dataflash_data);
546 if (info->jedec_id == jedec) {
547 if (info->flags & SUP_POW2PS) {
548 status = dataflash_status(spi);
550 debug("dataflash: status error %d\n",
555 if (info->flags & IS_POW2PS)
558 if (!(info->flags & IS_POW2PS))
568 * Treat other chips as errors ... we won't know the right page
569 * size (it might be binary) even when we can tell which density
570 * class is involved (legacy chip id scheme).
572 printf("dataflash: JEDEC id %06x not handled\n", jedec);
573 return ERR_PTR(-ENODEV);
577 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
578 * or else the ID code embedded in the status bits:
580 * Device Density ID code #Pages PageSize Offset
581 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
582 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
583 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
584 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
585 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
586 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
587 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
588 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
590 static int spi_dataflash_probe(struct udevice *dev)
592 struct spi_slave *spi = dev_get_parent_priv(dev);
593 struct spi_flash *spi_flash;
594 struct data_flash_info *info;
597 spi_flash = dev_get_uclass_priv(dev);
598 spi_flash->spi = spi;
599 spi_flash->dev = dev;
601 status = spi_claim_bus(spi);
606 * Try to detect dataflash by JEDEC ID.
607 * If it succeeds we know we have either a C or D part.
608 * D will support power of 2 pagesize option.
609 * Both support the security register, though with different
612 info = jedec_probe(spi);
614 goto err_jedec_probe;
616 status = add_dataflash(dev, info->name, info->nr_pages,
617 info->pagesize, info->pageoffset,
618 (info->flags & SUP_POW2PS) ? 'd' : 'c');
624 * Older chips support only legacy commands, identifing
625 * capacity using bits in the status byte.
627 status = dataflash_status(spi);
628 if (status <= 0 || status == 0xff) {
629 printf("dataflash: read status error %d\n", status);
630 if (status == 0 || status == 0xff)
632 goto err_jedec_probe;
636 * if there's a device there, assume it's dataflash.
637 * board setup should have set spi->max_speed_max to
638 * match f(car) for continuous reads, mode 0 or 3.
640 switch (status & 0x3c) {
641 case 0x0c: /* 0 0 1 1 x x */
642 status = add_dataflash(dev, "AT45DB011B", 512, 264, 9, 0);
644 case 0x14: /* 0 1 0 1 x x */
645 status = add_dataflash(dev, "AT45DB021B", 1024, 264, 9, 0);
647 case 0x1c: /* 0 1 1 1 x x */
648 status = add_dataflash(dev, "AT45DB041x", 2048, 264, 9, 0);
650 case 0x24: /* 1 0 0 1 x x */
651 status = add_dataflash(dev, "AT45DB081B", 4096, 264, 9, 0);
653 case 0x2c: /* 1 0 1 1 x x */
654 status = add_dataflash(dev, "AT45DB161x", 4096, 528, 10, 0);
656 case 0x34: /* 1 1 0 1 x x */
657 status = add_dataflash(dev, "AT45DB321x", 8192, 528, 10, 0);
659 case 0x38: /* 1 1 1 x x x */
661 status = add_dataflash(dev, "AT45DB642x", 8192, 1056, 11, 0);
663 /* obsolete AT45DB1282 not (yet?) supported */
665 printf("dataflash: unsupported device (%x)\n", status & 0x3c);
675 spi_release_bus(spi);
679 static const struct dm_spi_flash_ops spi_dataflash_ops = {
680 .read = spi_dataflash_read,
681 .write = spi_dataflash_write,
682 .erase = spi_dataflash_erase,
685 static const struct udevice_id spi_dataflash_ids[] = {
686 { .compatible = "atmel,at45", },
687 { .compatible = "atmel,dataflash", },
691 U_BOOT_DRIVER(spi_dataflash) = {
692 .name = "spi_dataflash",
693 .id = UCLASS_SPI_FLASH,
694 .of_match = spi_dataflash_ids,
695 .probe = spi_dataflash_probe,
696 .priv_auto_alloc_size = sizeof(struct dataflash),
697 .ops = &spi_dataflash_ops,