drivers/mtd/cfi_flash.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2002-2004
   4  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   5  *
   6  * Copyright (C) 2003 Arabella Software Ltd.
   7  * Yuli Barcohen <yuli@arabellasw.com>
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  *
  12  * Copyright (C) 2006
  13  * Tolunay Orkun <listmember@orkun.us>
  14  */
  15
  16 /* The DEBUG define must be before common to enable debugging */
  17 /* #define DEBUG        */
  18
  19 #include <common.h>
  20 #include <console.h>
  21 #include <dm.h>
  22 #include <env.h>
  23 #include <errno.h>
  24 #include <fdt_support.h>
  25 #include <flash.h>
  26 #include <init.h>
  27 #include <irq_func.h>
  28 #include <log.h>
  29 #include <asm/processor.h>
  30 #include <asm/io.h>
  31 #include <asm/byteorder.h>
  32 #include <asm/unaligned.h>
  33 #include <env_internal.h>
  34 #include <mtd/cfi_flash.h>
  35 #include <watchdog.h>
  36
  37 /*
  38  * This file implements a Common Flash Interface (CFI) driver for
  39  * U-Boot.
  40  *
  41  * The width of the port and the width of the chips are determined at
  42  * initialization.  These widths are used to calculate the address for
  43  * access CFI data structures.
  44  *
  45  * References
  46  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  47  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  48  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  49  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  50  * AMD CFI Specification, Release 2.0 December 1, 2001
  51  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  52  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  53  *
  54  * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  55  * reading and writing ... (yes there is such a Hardware).
  56  */
  57
  58 DECLARE_GLOBAL_DATA_PTR;
  59
  60 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  61 #ifdef CONFIG_FLASH_CFI_MTD
  62 static uint flash_verbose = 1;
  63 #else
  64 #define flash_verbose 1
  65 #endif
  66
  67 flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
  68
  69 /*
  70  * Check if chip width is defined. If not, start detecting with 8bit.
  71  */
  72 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  73 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
  74 #endif
  75
  76 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  77 #define __maybe_weak __weak
  78 #else
  79 #define __maybe_weak static
  80 #endif
  81
  82 /*
  83  * 0xffff is an undefined value for the configuration register. When
  84  * this value is returned, the configuration register shall not be
  85  * written at all (default mode).
  86  */
  87 static u16 cfi_flash_config_reg(int i)
  88 {
  89 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  90         return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  91 #else
  92         return 0xffff;
  93 #endif
  94 }
  95
  96 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  97 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  98 #else
  99 int cfi_flash_num_flash_banks;
 100 #endif
 101
 102 #ifdef CONFIG_CFI_FLASH /* for driver model */
 103 static void cfi_flash_init_dm(void)
 104 {
 105         struct udevice *dev;
 106
 107         cfi_flash_num_flash_banks = 0;
 108         /*
 109          * The uclass_first_device() will probe the first device and
 110          * uclass_next_device() will probe the rest if they exist. So
 111          * that cfi_flash_probe() will get called assigning the base
 112          * addresses that are available.
 113          */
 114         for (uclass_first_device(UCLASS_MTD, &dev);
 115              dev;
 116              uclass_next_device(&dev)) {
 117         }
 118 }
 119
 120 phys_addr_t cfi_flash_bank_addr(int i)
 121 {
 122         return flash_info[i].base;
 123 }
 124 #else
 125 __weak phys_addr_t cfi_flash_bank_addr(int i)
 126 {
 127         return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
 128 }
 129 #endif
 130
 131 __weak unsigned long cfi_flash_bank_size(int i)
 132 {
 133 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
 134         return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
 135 #else
 136         return 0;
 137 #endif
 138 }
 139
 140 __maybe_weak void flash_write8(u8 value, void *addr)
 141 {
 142         __raw_writeb(value, addr);
 143 }
 144
 145 __maybe_weak void flash_write16(u16 value, void *addr)
 146 {
 147         __raw_writew(value, addr);
 148 }
 149
 150 __maybe_weak void flash_write32(u32 value, void *addr)
 151 {
 152         __raw_writel(value, addr);
 153 }
 154
 155 __maybe_weak void flash_write64(u64 value, void *addr)
 156 {
 157         /* No architectures currently implement __raw_writeq() */
 158         *(volatile u64 *)addr = value;
 159 }
 160
 161 __maybe_weak u8 flash_read8(void *addr)
 162 {
 163         return __raw_readb(addr);
 164 }
 165
 166 __maybe_weak u16 flash_read16(void *addr)
 167 {
 168         return __raw_readw(addr);
 169 }
 170
 171 __maybe_weak u32 flash_read32(void *addr)
 172 {
 173         return __raw_readl(addr);
 174 }
 175
 176 __maybe_weak u64 flash_read64(void *addr)
 177 {
 178         /* No architectures currently implement __raw_readq() */
 179         return *(volatile u64 *)addr;
 180 }
 181
 182 /*-----------------------------------------------------------------------
 183  */
 184 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
 185         (defined(CONFIG_SYS_MONITOR_BASE) && \
 186         (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
 187 static flash_info_t *flash_get_info(ulong base)
 188 {
 189         int i;
 190         flash_info_t *info;
 191
 192         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 193                 info = &flash_info[i];
 194                 if (info->size && info->start[0] <= base &&
 195                     base <= info->start[0] + info->size - 1)
 196                         return info;
 197         }
 198
 199         return NULL;
 200 }
 201 #endif
 202
 203 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
 204 {
 205         if (sect != (info->sector_count - 1))
 206                 return info->start[sect + 1] - info->start[sect];
 207         else
 208                 return info->start[0] + info->size - info->start[sect];
 209 }
 210
 211 /*-----------------------------------------------------------------------
 212  * create an address based on the offset and the port width
 213  */
 214 static inline void *
 215 flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
 216 {
 217         unsigned int byte_offset = offset * info->portwidth;
 218
 219         return (void *)(info->start[sect] + byte_offset);
 220 }
 221
 222 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
 223                                unsigned int offset, void *addr)
 224 {
 225 }
 226
 227 /*-----------------------------------------------------------------------
 228  * make a proper sized command based on the port and chip widths
 229  */
 230 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 231 {
 232         int i;
 233         int cword_offset;
 234         int cp_offset;
 235 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 236         u32 cmd_le = cpu_to_le32(cmd);
 237 #endif
 238         uchar val;
 239         uchar *cp = (uchar *) cmdbuf;
 240
 241         for (i = info->portwidth; i > 0; i--) {
 242                 cword_offset = (info->portwidth - i) % info->chipwidth;
 243 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 244                 cp_offset = info->portwidth - i;
 245                 val = *((uchar *)&cmd_le + cword_offset);
 246 #else
 247                 cp_offset = i - 1;
 248                 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
 249 #endif
 250                 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 251         }
 252 }
 253
 254 #ifdef DEBUG
 255 /*-----------------------------------------------------------------------
 256  * Debug support
 257  */
 258 static void print_longlong(char *str, unsigned long long data)
 259 {
 260         int i;
 261         char *cp;
 262
 263         cp = (char *)&data;
 264         for (i = 0; i < 8; i++)
 265                 sprintf(&str[i * 2], "%2.2x", *cp++);
 266 }
 267
 268 static void flash_printqry(struct cfi_qry *qry)
 269 {
 270         u8 *p = (u8 *)qry;
 271         int x, y;
 272
 273         for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
 274                 debug("%02x : ", x);
 275                 for (y = 0; y < 16; y++)
 276                         debug("%2.2x ", p[x + y]);
 277                 debug(" ");
 278                 for (y = 0; y < 16; y++) {
 279                         unsigned char c = p[x + y];
 280
 281                         if (c >= 0x20 && c <= 0x7e)
 282                                 debug("%c", c);
 283                         else
 284                                 debug(".");
 285                 }
 286                 debug("\n");
 287         }
 288 }
 289 #endif
 290
 291 /*-----------------------------------------------------------------------
 292  * read a character at a port width address
 293  */
 294 static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
 295 {
 296         uchar *cp;
 297         uchar retval;
 298
 299         cp = flash_map(info, 0, offset);
 300 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 301         retval = flash_read8(cp);
 302 #else
 303         retval = flash_read8(cp + info->portwidth - 1);
 304 #endif
 305         flash_unmap(info, 0, offset, cp);
 306         return retval;
 307 }
 308
 309 /*-----------------------------------------------------------------------
 310  * read a word at a port width address, assume 16bit bus
 311  */
 312 static inline ushort flash_read_word(flash_info_t *info, uint offset)
 313 {
 314         ushort *addr, retval;
 315
 316         addr = flash_map(info, 0, offset);
 317         retval = flash_read16(addr);
 318         flash_unmap(info, 0, offset, addr);
 319         return retval;
 320 }
 321
 322 /*-----------------------------------------------------------------------
 323  * read a long word by picking the least significant byte of each maximum
 324  * port size word. Swap for ppc format.
 325  */
 326 static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 327                               uint offset)
 328 {
 329         uchar *addr;
 330         ulong retval;
 331
 332 #ifdef DEBUG
 333         int x;
 334 #endif
 335         addr = flash_map(info, sect, offset);
 336
 337 #ifdef DEBUG
 338         debug("long addr is at %p info->portwidth = %d\n", addr,
 339               info->portwidth);
 340         for (x = 0; x < 4 * info->portwidth; x++)
 341                 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 342 #endif
 343 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 344         retval = ((flash_read8(addr) << 16) |
 345                   (flash_read8(addr + info->portwidth) << 24) |
 346                   (flash_read8(addr + 2 * info->portwidth)) |
 347                   (flash_read8(addr + 3 * info->portwidth) << 8));
 348 #else
 349         retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
 350                   (flash_read8(addr + info->portwidth - 1) << 16) |
 351                   (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
 352                   (flash_read8(addr + 3 * info->portwidth - 1)));
 353 #endif
 354         flash_unmap(info, sect, offset, addr);
 355
 356         return retval;
 357 }
 358
 359 /*
 360  * Write a proper sized command to the correct address
 361  */
 362 static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 363                             uint offset, u32 cmd)
 364 {
 365         void *addr;
 366         cfiword_t cword;
 367
 368         addr = flash_map(info, sect, offset);
 369         flash_make_cmd(info, cmd, &cword);
 370         switch (info->portwidth) {
 371         case FLASH_CFI_8BIT:
 372                 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 373                       cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 374                 flash_write8(cword.w8, addr);
 375                 break;
 376         case FLASH_CFI_16BIT:
 377                 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 378                       cmd, cword.w16,
 379                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 380                 flash_write16(cword.w16, addr);
 381                 break;
 382         case FLASH_CFI_32BIT:
 383                 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
 384                       cmd, cword.w32,
 385                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 386                 flash_write32(cword.w32, addr);
 387                 break;
 388         case FLASH_CFI_64BIT:
 389 #ifdef DEBUG
 390                 {
 391                         char str[20];
 392
 393                         print_longlong(str, cword.w64);
 394
 395                         debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 396                               addr, cmd, str,
 397                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 398                 }
 399 #endif
 400                 flash_write64(cword.w64, addr);
 401                 break;
 402         }
 403
 404         /* Ensure all the instructions are fully finished */
 405         sync();
 406
 407         flash_unmap(info, sect, offset, addr);
 408 }
 409
 410 static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
 411 {
 412         flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 413         flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 414 }
 415
 416 /*-----------------------------------------------------------------------
 417  */
 418 static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
 419                          uchar cmd)
 420 {
 421         void *addr;
 422         cfiword_t cword;
 423         int retval;
 424
 425         addr = flash_map(info, sect, offset);
 426         flash_make_cmd(info, cmd, &cword);
 427
 428         debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 429         switch (info->portwidth) {
 430         case FLASH_CFI_8BIT:
 431                 debug("is= %x %x\n", flash_read8(addr), cword.w8);
 432                 retval = (flash_read8(addr) == cword.w8);
 433                 break;
 434         case FLASH_CFI_16BIT:
 435                 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
 436                 retval = (flash_read16(addr) == cword.w16);
 437                 break;
 438         case FLASH_CFI_32BIT:
 439                 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
 440                 retval = (flash_read32(addr) == cword.w32);
 441                 break;
 442         case FLASH_CFI_64BIT:
 443 #ifdef DEBUG
 444                 {
 445                         char str1[20];
 446                         char str2[20];
 447
 448                         print_longlong(str1, flash_read64(addr));
 449                         print_longlong(str2, cword.w64);
 450                         debug("is= %s %s\n", str1, str2);
 451                 }
 452 #endif
 453                 retval = (flash_read64(addr) == cword.w64);
 454                 break;
 455         default:
 456                 retval = 0;
 457                 break;
 458         }
 459         flash_unmap(info, sect, offset, addr);
 460
 461         return retval;
 462 }
 463
 464 /*-----------------------------------------------------------------------
 465  */
 466 static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
 467                        uchar cmd)
 468 {
 469         void *addr;
 470         cfiword_t cword;
 471         int retval;
 472
 473         addr = flash_map(info, sect, offset);
 474         flash_make_cmd(info, cmd, &cword);
 475         switch (info->portwidth) {
 476         case FLASH_CFI_8BIT:
 477                 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
 478                 break;
 479         case FLASH_CFI_16BIT:
 480                 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
 481                 break;
 482         case FLASH_CFI_32BIT:
 483                 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
 484                 break;
 485         case FLASH_CFI_64BIT:
 486                 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
 487                 break;
 488         default:
 489                 retval = 0;
 490                 break;
 491         }
 492         flash_unmap(info, sect, offset, addr);
 493
 494         return retval;
 495 }
 496
 497 /*-----------------------------------------------------------------------
 498  */
 499 static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
 500                         uchar cmd)
 501 {
 502         u8 *addr;
 503         cfiword_t cword;
 504         int retval;
 505
 506         addr = flash_map(info, sect, offset);
 507         flash_make_cmd(info, cmd, &cword);
 508         switch (info->portwidth) {
 509         case FLASH_CFI_8BIT:
 510                 retval = flash_read8(addr) != flash_read8(addr);
 511                 break;
 512         case FLASH_CFI_16BIT:
 513                 retval = flash_read16(addr) != flash_read16(addr);
 514                 break;
 515         case FLASH_CFI_32BIT:
 516                 retval = flash_read32(addr) != flash_read32(addr);
 517                 break;
 518         case FLASH_CFI_64BIT:
 519                 retval = ((flash_read32(addr) != flash_read32(addr)) ||
 520                            (flash_read32(addr + 4) != flash_read32(addr + 4)));
 521                 break;
 522         default:
 523                 retval = 0;
 524                 break;
 525         }
 526         flash_unmap(info, sect, offset, addr);
 527
 528         return retval;
 529 }
 530
 531 /*
 532  * flash_is_busy - check to see if the flash is busy
 533  *
 534  * This routine checks the status of the chip and returns true if the
 535  * chip is busy.
 536  */
 537 static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
 538 {
 539         int retval;
 540
 541         switch (info->vendor) {
 542         case CFI_CMDSET_INTEL_PROG_REGIONS:
 543         case CFI_CMDSET_INTEL_STANDARD:
 544         case CFI_CMDSET_INTEL_EXTENDED:
 545                 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
 546                 break;
 547         case CFI_CMDSET_AMD_STANDARD:
 548         case CFI_CMDSET_AMD_EXTENDED:
 549 #ifdef CONFIG_FLASH_CFI_LEGACY
 550         case CFI_CMDSET_AMD_LEGACY:
 551 #endif
 552                 if (info->sr_supported) {
 553                         flash_write_cmd(info, sect, info->addr_unlock1,
 554                                         FLASH_CMD_READ_STATUS);
 555                         retval = !flash_isset(info, sect, 0,
 556                                               FLASH_STATUS_DONE);
 557                 } else {
 558                         retval = flash_toggle(info, sect, 0,
 559                                               AMD_STATUS_TOGGLE);
 560                 }
 561
 562                 break;
 563         default:
 564                 retval = 0;
 565         }
 566         debug("%s: %d\n", __func__, retval);
 567         return retval;
 568 }
 569
 570 /*-----------------------------------------------------------------------
 571  *  wait for XSR.7 to be set. Time out with an error if it does not.
 572  *  This routine does not set the flash to read-array mode.
 573  */
 574 static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 575                               ulong tout, char *prompt)
 576 {
 577         ulong start;
 578
 579 #if CONFIG_SYS_HZ != 1000
 580         /* Avoid overflow for large HZ */
 581         if ((ulong)CONFIG_SYS_HZ > 100000)
 582                 tout *= (ulong)CONFIG_SYS_HZ / 1000;
 583         else
 584                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 585 #endif
 586
 587         /* Wait for command completion */
 588 #ifdef CONFIG_SYS_LOW_RES_TIMER
 589         reset_timer();
 590 #endif
 591         start = get_timer(0);
 592         WATCHDOG_RESET();
 593         while (flash_is_busy(info, sector)) {
 594                 if (get_timer(start) > tout) {
 595                         printf("Flash %s timeout at address %lx data %lx\n",
 596                                prompt, info->start[sector],
 597                                flash_read_long(info, sector, 0));
 598                         flash_write_cmd(info, sector, 0, info->cmd_reset);
 599                         udelay(1);
 600                         return ERR_TIMEOUT;
 601                 }
 602                 udelay(1);              /* also triggers watchdog */
 603         }
 604         return ERR_OK;
 605 }
 606
 607 /*-----------------------------------------------------------------------
 608  * Wait for XSR.7 to be set, if it times out print an error, otherwise
 609  * do a full status check.
 610  *
 611  * This routine sets the flash to read-array mode.
 612  */
 613 static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 614                                    ulong tout, char *prompt)
 615 {
 616         int retcode;
 617
 618         retcode = flash_status_check(info, sector, tout, prompt);
 619         switch (info->vendor) {
 620         case CFI_CMDSET_INTEL_PROG_REGIONS:
 621         case CFI_CMDSET_INTEL_EXTENDED:
 622         case CFI_CMDSET_INTEL_STANDARD:
 623                 if (retcode == ERR_OK &&
 624                     !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 625                         retcode = ERR_INVAL;
 626                         printf("Flash %s error at address %lx\n", prompt,
 627                                info->start[sector]);
 628                         if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
 629                                          FLASH_STATUS_PSLBS)) {
 630                                 puts("Command Sequence Error.\n");
 631                         } else if (flash_isset(info, sector, 0,
 632                                                 FLASH_STATUS_ECLBS)) {
 633                                 puts("Block Erase Error.\n");
 634                                 retcode = ERR_NOT_ERASED;
 635                         } else if (flash_isset(info, sector, 0,
 636                                                 FLASH_STATUS_PSLBS)) {
 637                                 puts("Locking Error\n");
 638                         }
 639                         if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
 640                                 puts("Block locked.\n");
 641                                 retcode = ERR_PROTECTED;
 642                         }
 643                         if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
 644                                 puts("Vpp Low Error.\n");
 645                 }
 646                 flash_write_cmd(info, sector, 0, info->cmd_reset);
 647                 udelay(1);
 648                 break;
 649         default:
 650                 break;
 651         }
 652         return retcode;
 653 }
 654
 655 static int use_flash_status_poll(flash_info_t *info)
 656 {
 657 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 658         if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
 659             info->vendor == CFI_CMDSET_AMD_STANDARD)
 660                 return 1;
 661 #endif
 662         return 0;
 663 }
 664
 665 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 666                              ulong tout, char *prompt)
 667 {
 668 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 669         ulong start;
 670         int ready;
 671
 672 #if CONFIG_SYS_HZ != 1000
 673         /* Avoid overflow for large HZ */
 674         if ((ulong)CONFIG_SYS_HZ > 100000)
 675                 tout *= (ulong)CONFIG_SYS_HZ / 1000;
 676         else
 677                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 678 #endif
 679
 680         /* Wait for command completion */
 681 #ifdef CONFIG_SYS_LOW_RES_TIMER
 682         reset_timer();
 683 #endif
 684         start = get_timer(0);
 685         WATCHDOG_RESET();
 686         while (1) {
 687                 switch (info->portwidth) {
 688                 case FLASH_CFI_8BIT:
 689                         ready = flash_read8(dst) == flash_read8(src);
 690                         break;
 691                 case FLASH_CFI_16BIT:
 692                         ready = flash_read16(dst) == flash_read16(src);
 693                         break;
 694                 case FLASH_CFI_32BIT:
 695                         ready = flash_read32(dst) == flash_read32(src);
 696                         break;
 697                 case FLASH_CFI_64BIT:
 698                         ready = flash_read64(dst) == flash_read64(src);
 699                         break;
 700                 default:
 701                         ready = 0;
 702                         break;
 703                 }
 704                 if (ready)
 705                         break;
 706                 if (get_timer(start) > tout) {
 707                         printf("Flash %s timeout at address %lx data %lx\n",
 708                                prompt, (ulong)dst, (ulong)flash_read8(dst));
 709                         return ERR_TIMEOUT;
 710                 }
 711                 udelay(1);              /* also triggers watchdog */
 712         }
 713 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
 714         return ERR_OK;
 715 }
 716
 717 /*-----------------------------------------------------------------------
 718  */
 719 static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
 720 {
 721 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 722         unsigned short  w;
 723         unsigned int    l;
 724         unsigned long long ll;
 725 #endif
 726
 727         switch (info->portwidth) {
 728         case FLASH_CFI_8BIT:
 729                 cword->w8 = c;
 730                 break;
 731         case FLASH_CFI_16BIT:
 732 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 733                 w = c;
 734                 w <<= 8;
 735                 cword->w16 = (cword->w16 >> 8) | w;
 736 #else
 737                 cword->w16 = (cword->w16 << 8) | c;
 738 #endif
 739                 break;
 740         case FLASH_CFI_32BIT:
 741 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 742                 l = c;
 743                 l <<= 24;
 744                 cword->w32 = (cword->w32 >> 8) | l;
 745 #else
 746                 cword->w32 = (cword->w32 << 8) | c;
 747 #endif
 748                 break;
 749         case FLASH_CFI_64BIT:
 750 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 751                 ll = c;
 752                 ll <<= 56;
 753                 cword->w64 = (cword->w64 >> 8) | ll;
 754 #else
 755                 cword->w64 = (cword->w64 << 8) | c;
 756 #endif
 757                 break;
 758         }
 759 }
 760
 761 /*
 762  * Loop through the sector table starting from the previously found sector.
 763  * Searches forwards or backwards, dependent on the passed address.
 764  */
 765 static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 766 {
 767         static flash_sect_t saved_sector; /* previously found sector */
 768         static flash_info_t *saved_info; /* previously used flash bank */
 769         flash_sect_t sector = saved_sector;
 770
 771         if (info != saved_info || sector >= info->sector_count)
 772                 sector = 0;
 773
 774         while ((sector < info->sector_count - 1) &&
 775                (info->start[sector] < addr))
 776                 sector++;
 777         while ((info->start[sector] > addr) && (sector > 0))
 778                 /*
 779                  * also decrements the sector in case of an overshot
 780                  * in the first loop
 781                  */
 782                 sector--;
 783
 784         saved_sector = sector;
 785         saved_info = info;
 786         return sector;
 787 }
 788
 789 /*-----------------------------------------------------------------------
 790  */
 791 static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
 792 {
 793         void *dstaddr = (void *)dest;
 794         int flag;
 795         flash_sect_t sect = 0;
 796         char sect_found = 0;
 797
 798         /* Check if Flash is (sufficiently) erased */
 799         switch (info->portwidth) {
 800         case FLASH_CFI_8BIT:
 801                 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
 802                 break;
 803         case FLASH_CFI_16BIT:
 804                 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
 805                 break;
 806         case FLASH_CFI_32BIT:
 807                 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
 808                 break;
 809         case FLASH_CFI_64BIT:
 810                 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
 811                 break;
 812         default:
 813                 flag = 0;
 814                 break;
 815         }
 816         if (!flag)
 817                 return ERR_NOT_ERASED;
 818
 819         /* Disable interrupts which might cause a timeout here */
 820         flag = disable_interrupts();
 821
 822         switch (info->vendor) {
 823         case CFI_CMDSET_INTEL_PROG_REGIONS:
 824         case CFI_CMDSET_INTEL_EXTENDED:
 825         case CFI_CMDSET_INTEL_STANDARD:
 826                 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
 827                 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
 828                 break;
 829         case CFI_CMDSET_AMD_EXTENDED:
 830         case CFI_CMDSET_AMD_STANDARD:
 831                 sect = find_sector(info, dest);
 832                 flash_unlock_seq(info, sect);
 833                 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
 834                 sect_found = 1;
 835                 break;
 836 #ifdef CONFIG_FLASH_CFI_LEGACY
 837         case CFI_CMDSET_AMD_LEGACY:
 838                 sect = find_sector(info, dest);
 839                 flash_unlock_seq(info, 0);
 840                 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 841                 sect_found = 1;
 842                 break;
 843 #endif
 844         }
 845
 846         switch (info->portwidth) {
 847         case FLASH_CFI_8BIT:
 848                 flash_write8(cword.w8, dstaddr);
 849                 break;
 850         case FLASH_CFI_16BIT:
 851                 flash_write16(cword.w16, dstaddr);
 852                 break;
 853         case FLASH_CFI_32BIT:
 854                 flash_write32(cword.w32, dstaddr);
 855                 break;
 856         case FLASH_CFI_64BIT:
 857                 flash_write64(cword.w64, dstaddr);
 858                 break;
 859         }
 860
 861         /* re-enable interrupts if necessary */
 862         if (flag)
 863                 enable_interrupts();
 864
 865         if (!sect_found)
 866                 sect = find_sector(info, dest);
 867
 868         if (use_flash_status_poll(info))
 869                 return flash_status_poll(info, &cword, dstaddr,
 870                                          info->write_tout, "write");
 871         else
 872                 return flash_full_status_check(info, sect,
 873                                                info->write_tout, "write");
 874 }
 875
 876 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 877
 878 static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 879                                  int len)
 880 {
 881         flash_sect_t sector;
 882         int cnt;
 883         int retcode;
 884         u8 *src = cp;
 885         u8 *dst = (u8 *)dest;
 886         u8 *dst2 = dst;
 887         int flag = 1;
 888         uint offset = 0;
 889         unsigned int shift;
 890         uchar write_cmd;
 891
 892         switch (info->portwidth) {
 893         case FLASH_CFI_8BIT:
 894                 shift = 0;
 895                 break;
 896         case FLASH_CFI_16BIT:
 897                 shift = 1;
 898                 break;
 899         case FLASH_CFI_32BIT:
 900                 shift = 2;
 901                 break;
 902         case FLASH_CFI_64BIT:
 903                 shift = 3;
 904                 break;
 905         default:
 906                 retcode = ERR_INVAL;
 907                 goto out_unmap;
 908         }
 909
 910         cnt = len >> shift;
 911
 912         while ((cnt-- > 0) && (flag == 1)) {
 913                 switch (info->portwidth) {
 914                 case FLASH_CFI_8BIT:
 915                         flag = ((flash_read8(dst2) & flash_read8(src)) ==
 916                                 flash_read8(src));
 917                         src += 1, dst2 += 1;
 918                         break;
 919                 case FLASH_CFI_16BIT:
 920                         flag = ((flash_read16(dst2) & flash_read16(src)) ==
 921                                 flash_read16(src));
 922                         src += 2, dst2 += 2;
 923                         break;
 924                 case FLASH_CFI_32BIT:
 925                         flag = ((flash_read32(dst2) & flash_read32(src)) ==
 926                                 flash_read32(src));
 927                         src += 4, dst2 += 4;
 928                         break;
 929                 case FLASH_CFI_64BIT:
 930                         flag = ((flash_read64(dst2) & flash_read64(src)) ==
 931                                 flash_read64(src));
 932                         src += 8, dst2 += 8;
 933                         break;
 934                 }
 935         }
 936         if (!flag) {
 937                 retcode = ERR_NOT_ERASED;
 938                 goto out_unmap;
 939         }
 940
 941         src = cp;
 942         sector = find_sector(info, dest);
 943
 944         switch (info->vendor) {
 945         case CFI_CMDSET_INTEL_PROG_REGIONS:
 946         case CFI_CMDSET_INTEL_STANDARD:
 947         case CFI_CMDSET_INTEL_EXTENDED:
 948                 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 949                             FLASH_CMD_WRITE_BUFFER_PROG :
 950                             FLASH_CMD_WRITE_TO_BUFFER;
 951                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 952                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 953                 flash_write_cmd(info, sector, 0, write_cmd);
 954                 retcode = flash_status_check(info, sector,
 955                                              info->buffer_write_tout,
 956                                              "write to buffer");
 957                 if (retcode == ERR_OK) {
 958                         /* reduce the number of loops by the width of
 959                          * the port
 960                          */
 961                         cnt = len >> shift;
 962                         flash_write_cmd(info, sector, 0, cnt - 1);
 963                         while (cnt-- > 0) {
 964                                 switch (info->portwidth) {
 965                                 case FLASH_CFI_8BIT:
 966                                         flash_write8(flash_read8(src), dst);
 967                                         src += 1, dst += 1;
 968                                         break;
 969                                 case FLASH_CFI_16BIT:
 970                                         flash_write16(flash_read16(src), dst);
 971                                         src += 2, dst += 2;
 972                                         break;
 973                                 case FLASH_CFI_32BIT:
 974                                         flash_write32(flash_read32(src), dst);
 975                                         src += 4, dst += 4;
 976                                         break;
 977                                 case FLASH_CFI_64BIT:
 978                                         flash_write64(flash_read64(src), dst);
 979                                         src += 8, dst += 8;
 980                                         break;
 981                                 default:
 982                                         retcode = ERR_INVAL;
 983                                         goto out_unmap;
 984                                 }
 985                         }
 986                         flash_write_cmd(info, sector, 0,
 987                                         FLASH_CMD_WRITE_BUFFER_CONFIRM);
 988                         retcode = flash_full_status_check(
 989                                 info, sector, info->buffer_write_tout,
 990                                 "buffer write");
 991                 }
 992
 993                 break;
 994
 995         case CFI_CMDSET_AMD_STANDARD:
 996         case CFI_CMDSET_AMD_EXTENDED:
 997                 flash_unlock_seq(info, sector);
 998
 999 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
1000                 offset = ((unsigned long)dst - info->start[sector]) >> shift;
1001 #endif
1002                 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
1003                 cnt = len >> shift;
1004                 flash_write_cmd(info, sector, offset, cnt - 1);
1005
1006                 switch (info->portwidth) {
1007                 case FLASH_CFI_8BIT:
1008                         while (cnt-- > 0) {
1009                                 flash_write8(flash_read8(src), dst);
1010                                 src += 1, dst += 1;
1011                         }
1012                         break;
1013                 case FLASH_CFI_16BIT:
1014                         while (cnt-- > 0) {
1015                                 flash_write16(flash_read16(src), dst);
1016                                 src += 2, dst += 2;
1017                         }
1018                         break;
1019                 case FLASH_CFI_32BIT:
1020                         while (cnt-- > 0) {
1021                                 flash_write32(flash_read32(src), dst);
1022                                 src += 4, dst += 4;
1023                         }
1024                         break;
1025                 case FLASH_CFI_64BIT:
1026                         while (cnt-- > 0) {
1027                                 flash_write64(flash_read64(src), dst);
1028                                 src += 8, dst += 8;
1029                         }
1030                         break;
1031                 default:
1032                         retcode = ERR_INVAL;
1033                         goto out_unmap;
1034                 }
1035
1036                 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1037                 if (use_flash_status_poll(info))
1038                         retcode = flash_status_poll(info, src - (1 << shift),
1039                                                     dst - (1 << shift),
1040                                                     info->buffer_write_tout,
1041                                                     "buffer write");
1042                 else
1043                         retcode = flash_full_status_check(info, sector,
1044                                                           info->buffer_write_tout,
1045                                                           "buffer write");
1046                 break;
1047
1048         default:
1049                 debug("Unknown Command Set\n");
1050                 retcode = ERR_INVAL;
1051                 break;
1052         }
1053
1054 out_unmap:
1055         return retcode;
1056 }
1057 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1058
1059 /*-----------------------------------------------------------------------
1060  */
1061 int flash_erase(flash_info_t *info, int s_first, int s_last)
1062 {
1063         int rcode = 0;
1064         int prot;
1065         flash_sect_t sect;
1066         int st;
1067
1068         if (info->flash_id != FLASH_MAN_CFI) {
1069                 puts("Can't erase unknown flash type - aborted\n");
1070                 return 1;
1071         }
1072         if (s_first < 0 || s_first > s_last) {
1073                 puts("- no sectors to erase\n");
1074                 return 1;
1075         }
1076
1077         prot = 0;
1078         for (sect = s_first; sect <= s_last; ++sect)
1079                 if (info->protect[sect])
1080                         prot++;
1081         if (prot) {
1082                 printf("- Warning: %d protected sectors will not be erased!\n",
1083                        prot);
1084         } else if (flash_verbose) {
1085                 putc('\n');
1086         }
1087
1088         for (sect = s_first; sect <= s_last; sect++) {
1089                 if (ctrlc()) {
1090                         printf("\n");
1091                         return 1;
1092                 }
1093
1094                 if (info->protect[sect] == 0) { /* not protected */
1095 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1096                         int k;
1097                         int size;
1098                         int erased;
1099                         u32 *flash;
1100
1101                         /*
1102                          * Check if whole sector is erased
1103                          */
1104                         size = flash_sector_size(info, sect);
1105                         erased = 1;
1106                         flash = (u32 *)info->start[sect];
1107                         /* divide by 4 for longword access */
1108                         size = size >> 2;
1109                         for (k = 0; k < size; k++) {
1110                                 if (flash_read32(flash++) != 0xffffffff) {
1111                                         erased = 0;
1112                                         break;
1113                                 }
1114                         }
1115                         if (erased) {
1116                                 if (flash_verbose)
1117                                         putc(',');
1118                                 continue;
1119                         }
1120 #endif
1121                         switch (info->vendor) {
1122                         case CFI_CMDSET_INTEL_PROG_REGIONS:
1123                         case CFI_CMDSET_INTEL_STANDARD:
1124                         case CFI_CMDSET_INTEL_EXTENDED:
1125                                 flash_write_cmd(info, sect, 0,
1126                                                 FLASH_CMD_CLEAR_STATUS);
1127                                 flash_write_cmd(info, sect, 0,
1128                                                 FLASH_CMD_BLOCK_ERASE);
1129                                 flash_write_cmd(info, sect, 0,
1130                                                 FLASH_CMD_ERASE_CONFIRM);
1131                                 break;
1132                         case CFI_CMDSET_AMD_STANDARD:
1133                         case CFI_CMDSET_AMD_EXTENDED:
1134                                 flash_unlock_seq(info, sect);
1135                                 flash_write_cmd(info, sect,
1136                                                 info->addr_unlock1,
1137                                                 AMD_CMD_ERASE_START);
1138                                 flash_unlock_seq(info, sect);
1139                                 flash_write_cmd(info, sect, 0,
1140                                                 info->cmd_erase_sector);
1141                                 break;
1142 #ifdef CONFIG_FLASH_CFI_LEGACY
1143                         case CFI_CMDSET_AMD_LEGACY:
1144                                 flash_unlock_seq(info, 0);
1145                                 flash_write_cmd(info, 0, info->addr_unlock1,
1146                                                 AMD_CMD_ERASE_START);
1147                                 flash_unlock_seq(info, 0);
1148                                 flash_write_cmd(info, sect, 0,
1149                                                 AMD_CMD_ERASE_SECTOR);
1150                                 break;
1151 #endif
1152                         default:
1153                                 debug("Unknown flash vendor %d\n",
1154                                       info->vendor);
1155                                 break;
1156                         }
1157
1158                         if (use_flash_status_poll(info)) {
1159                                 cfiword_t cword;
1160                                 void *dest;
1161
1162                                 cword.w64 = 0xffffffffffffffffULL;
1163                                 dest = flash_map(info, sect, 0);
1164                                 st = flash_status_poll(info, &cword, dest,
1165                                                        info->erase_blk_tout,
1166                                                        "erase");
1167                                 flash_unmap(info, sect, 0, dest);
1168                         } else {
1169                                 st = flash_full_status_check(info, sect,
1170                                                              info->erase_blk_tout,
1171                                                              "erase");
1172                         }
1173
1174                         if (st)
1175                                 rcode = 1;
1176                         else if (flash_verbose)
1177                                 putc('.');
1178                 }
1179         }
1180
1181         if (flash_verbose)
1182                 puts(" done\n");
1183
1184         return rcode;
1185 }
1186
1187 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1188 static int sector_erased(flash_info_t *info, int i)
1189 {
1190         int k;
1191         int size;
1192         u32 *flash;
1193
1194         /*
1195          * Check if whole sector is erased
1196          */
1197         size = flash_sector_size(info, i);
1198         flash = (u32 *)info->start[i];
1199         /* divide by 4 for longword access */
1200         size = size >> 2;
1201
1202         for (k = 0; k < size; k++) {
1203                 if (flash_read32(flash++) != 0xffffffff)
1204                         return 0;       /* not erased */
1205         }
1206
1207         return 1;                       /* erased */
1208 }
1209 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1210
1211 void flash_print_info(flash_info_t *info)
1212 {
1213         int i;
1214
1215         if (info->flash_id != FLASH_MAN_CFI) {
1216                 puts("missing or unknown FLASH type\n");
1217                 return;
1218         }
1219
1220         printf("%s flash (%d x %d)",
1221                info->name,
1222                (info->portwidth << 3), (info->chipwidth << 3));
1223         if (info->size < 1024 * 1024)
1224                 printf("  Size: %ld kB in %d Sectors\n",
1225                        info->size >> 10, info->sector_count);
1226         else
1227                 printf("  Size: %ld MB in %d Sectors\n",
1228                        info->size >> 20, info->sector_count);
1229         printf("  ");
1230         switch (info->vendor) {
1231         case CFI_CMDSET_INTEL_PROG_REGIONS:
1232                 printf("Intel Prog Regions");
1233                 break;
1234         case CFI_CMDSET_INTEL_STANDARD:
1235                 printf("Intel Standard");
1236                 break;
1237         case CFI_CMDSET_INTEL_EXTENDED:
1238                 printf("Intel Extended");
1239                 break;
1240         case CFI_CMDSET_AMD_STANDARD:
1241                 printf("AMD Standard");
1242                 break;
1243         case CFI_CMDSET_AMD_EXTENDED:
1244                 printf("AMD Extended");
1245                 break;
1246 #ifdef CONFIG_FLASH_CFI_LEGACY
1247         case CFI_CMDSET_AMD_LEGACY:
1248                 printf("AMD Legacy");
1249                 break;
1250 #endif
1251         default:
1252                 printf("Unknown (%d)", info->vendor);
1253                 break;
1254         }
1255         printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1256                info->manufacturer_id);
1257         printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1258                info->device_id);
1259         if ((info->device_id & 0xff) == 0x7E) {
1260                 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1261                        info->device_id2);
1262         }
1263         if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
1264                 printf("\n  Advanced Sector Protection (PPB) enabled");
1265         printf("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1266                info->erase_blk_tout, info->write_tout);
1267         if (info->buffer_size > 1) {
1268                 printf("  Buffer write timeout: %ld ms, ",
1269                        info->buffer_write_tout);
1270                 printf("buffer size: %d bytes\n", info->buffer_size);
1271         }
1272
1273         puts("\n  Sector Start Addresses:");
1274         for (i = 0; i < info->sector_count; ++i) {
1275                 if (ctrlc())
1276                         break;
1277                 if ((i % 5) == 0)
1278                         putc('\n');
1279 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1280                 /* print empty and read-only info */
1281                 printf("  %08lX %c %s ",
1282                        info->start[i],
1283                        sector_erased(info, i) ? 'E' : ' ',
1284                        info->protect[i] ? "RO" : "  ");
1285 #else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1286                 printf("  %08lX   %s ",
1287                        info->start[i],
1288                        info->protect[i] ? "RO" : "  ");
1289 #endif
1290         }
1291         putc('\n');
1292 }
1293
1294 /*-----------------------------------------------------------------------
1295  * This is used in a few places in write_buf() to show programming
1296  * progress.  Making it a function is nasty because it needs to do side
1297  * effect updates to digit and dots.  Repeated code is nasty too, so
1298  * we define it once here.
1299  */
1300 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1301 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1302         if (flash_verbose) { \
1303                 dots -= dots_sub; \
1304                 if (scale > 0 && dots <= 0) { \
1305                         if ((digit % 5) == 0) \
1306                                 printf("%d", digit / 5); \
1307                         else \
1308                                 putc('.'); \
1309                         digit--; \
1310                         dots += scale; \
1311                 } \
1312         }
1313 #else
1314 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1315 #endif
1316
1317 /*-----------------------------------------------------------------------
1318  * Copy memory to flash, returns:
1319  * 0 - OK
1320  * 1 - write timeout
1321  * 2 - Flash not erased
1322  */
1323 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
1324 {
1325         ulong wp;
1326         uchar *p;
1327         int aln;
1328         cfiword_t cword;
1329         int i, rc;
1330 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1331         int buffered_size;
1332 #endif
1333 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1334         int digit = CONFIG_FLASH_SHOW_PROGRESS;
1335         int scale = 0;
1336         int dots  = 0;
1337
1338         /*
1339          * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1340          */
1341         if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1342                 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1343                         CONFIG_FLASH_SHOW_PROGRESS);
1344         }
1345 #endif
1346
1347         /* get lower aligned address */
1348         wp = (addr & ~(info->portwidth - 1));
1349
1350         /* handle unaligned start */
1351         aln = addr - wp;
1352         if (aln != 0) {
1353                 cword.w32 = 0;
1354                 p = (uchar *)wp;
1355                 for (i = 0; i < aln; ++i)
1356                         flash_add_byte(info, &cword, flash_read8(p + i));
1357
1358                 for (; (i < info->portwidth) && (cnt > 0); i++) {
1359                         flash_add_byte(info, &cword, *src++);
1360                         cnt--;
1361                 }
1362                 for (; (cnt == 0) && (i < info->portwidth); ++i)
1363                         flash_add_byte(info, &cword, flash_read8(p + i));
1364
1365                 rc = flash_write_cfiword(info, wp, cword);
1366                 if (rc != 0)
1367                         return rc;
1368
1369                 wp += i;
1370                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1371         }
1372
1373         /* handle the aligned part */
1374 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1375         buffered_size = (info->portwidth / info->chipwidth);
1376         buffered_size *= info->buffer_size;
1377         while (cnt >= info->portwidth) {
1378                 /* prohibit buffer write when buffer_size is 1 */
1379                 if (info->buffer_size == 1) {
1380                         cword.w32 = 0;
1381                         for (i = 0; i < info->portwidth; i++)
1382                                 flash_add_byte(info, &cword, *src++);
1383                         rc = flash_write_cfiword(info, wp, cword);
1384                         if (rc != 0)
1385                                 return rc;
1386                         wp += info->portwidth;
1387                         cnt -= info->portwidth;
1388                         continue;
1389                 }
1390
1391                 /* write buffer until next buffered_size aligned boundary */
1392                 i = buffered_size - (wp % buffered_size);
1393                 if (i > cnt)
1394                         i = cnt;
1395                 rc = flash_write_cfibuffer(info, wp, src, i);
1396                 if (rc != ERR_OK)
1397                         return rc;
1398                 i -= i & (info->portwidth - 1);
1399                 wp += i;
1400                 src += i;
1401                 cnt -= i;
1402                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1403                 /* Only check every once in a while */
1404                 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1405                         return ERR_ABORTED;
1406         }
1407 #else
1408         while (cnt >= info->portwidth) {
1409                 cword.w32 = 0;
1410                 for (i = 0; i < info->portwidth; i++)
1411                         flash_add_byte(info, &cword, *src++);
1412                 rc = flash_write_cfiword(info, wp, cword);
1413                 if (rc != 0)
1414                         return rc;
1415                 wp += info->portwidth;
1416                 cnt -= info->portwidth;
1417                 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1418                 /* Only check every once in a while */
1419                 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1420                         return ERR_ABORTED;
1421         }
1422 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1423
1424         if (cnt == 0)
1425                 return (0);
1426
1427         /*
1428          * handle unaligned tail bytes
1429          */
1430         cword.w32 = 0;
1431         p = (uchar *)wp;
1432         for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1433                 flash_add_byte(info, &cword, *src++);
1434                 --cnt;
1435         }
1436         for (; i < info->portwidth; ++i)
1437                 flash_add_byte(info, &cword, flash_read8(p + i));
1438
1439         return flash_write_cfiword(info, wp, cword);
1440 }
1441
1442 static inline int manufact_match(flash_info_t *info, u32 manu)
1443 {
1444         return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1445 }
1446
1447 /*-----------------------------------------------------------------------
1448  */
1449 #ifdef CONFIG_SYS_FLASH_PROTECTION
1450
1451 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1452 {
1453         if (manufact_match(info, INTEL_MANUFACT) &&
1454             info->device_id == NUMONYX_256MBIT) {
1455                 /*
1456                  * see errata called
1457                  * "Numonyx Axcell P33/P30 Specification Update" :)
1458                  */
1459                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1460                 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1461                                    prot)) {
1462                         /*
1463                          * cmd must come before FLASH_CMD_PROTECT + 20us
1464                          * Disable interrupts which might cause a timeout here.
1465                          */
1466                         int flag = disable_interrupts();
1467                         unsigned short cmd;
1468
1469                         if (prot)
1470                                 cmd = FLASH_CMD_PROTECT_SET;
1471                         else
1472                                 cmd = FLASH_CMD_PROTECT_CLEAR;
1473
1474                         flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1475                         flash_write_cmd(info, sector, 0, cmd);
1476                         /* re-enable interrupts if necessary */
1477                         if (flag)
1478                                 enable_interrupts();
1479                 }
1480                 return 1;
1481         }
1482         return 0;
1483 }
1484
1485 int flash_real_protect(flash_info_t *info, long sector, int prot)
1486 {
1487         int retcode = 0;
1488
1489         switch (info->vendor) {
1490         case CFI_CMDSET_INTEL_PROG_REGIONS:
1491         case CFI_CMDSET_INTEL_STANDARD:
1492         case CFI_CMDSET_INTEL_EXTENDED:
1493                 if (!cfi_protect_bugfix(info, sector, prot)) {
1494                         flash_write_cmd(info, sector, 0,
1495                                         FLASH_CMD_CLEAR_STATUS);
1496                         flash_write_cmd(info, sector, 0,
1497                                         FLASH_CMD_PROTECT);
1498                         if (prot)
1499                                 flash_write_cmd(info, sector, 0,
1500                                                 FLASH_CMD_PROTECT_SET);
1501                         else
1502                                 flash_write_cmd(info, sector, 0,
1503                                                 FLASH_CMD_PROTECT_CLEAR);
1504                 }
1505                 break;
1506         case CFI_CMDSET_AMD_EXTENDED:
1507         case CFI_CMDSET_AMD_STANDARD:
1508                 /* U-Boot only checks the first byte */
1509                 if (manufact_match(info, ATM_MANUFACT)) {
1510                         if (prot) {
1511                                 flash_unlock_seq(info, 0);
1512                                 flash_write_cmd(info, 0,
1513                                                 info->addr_unlock1,
1514                                                 ATM_CMD_SOFTLOCK_START);
1515                                 flash_unlock_seq(info, 0);
1516                                 flash_write_cmd(info, sector, 0,
1517                                                 ATM_CMD_LOCK_SECT);
1518                         } else {
1519                                 flash_write_cmd(info, 0,
1520                                                 info->addr_unlock1,
1521                                                 AMD_CMD_UNLOCK_START);
1522                                 if (info->device_id == ATM_ID_BV6416)
1523                                         flash_write_cmd(info, sector,
1524                                                         0, ATM_CMD_UNLOCK_SECT);
1525                         }
1526                 }
1527                 if (info->legacy_unlock) {
1528                         int flag = disable_interrupts();
1529                         int lock_flag;
1530
1531                         flash_unlock_seq(info, 0);
1532                         flash_write_cmd(info, 0, info->addr_unlock1,
1533                                         AMD_CMD_SET_PPB_ENTRY);
1534                         lock_flag = flash_isset(info, sector, 0, 0x01);
1535                         if (prot) {
1536                                 if (lock_flag) {
1537                                         flash_write_cmd(info, sector, 0,
1538                                                         AMD_CMD_PPB_LOCK_BC1);
1539                                         flash_write_cmd(info, sector, 0,
1540                                                         AMD_CMD_PPB_LOCK_BC2);
1541                                 }
1542                                 debug("sector %ld %slocked\n", sector,
1543                                       lock_flag ? "" : "already ");
1544                         } else {
1545                                 if (!lock_flag) {
1546                                         debug("unlock %ld\n", sector);
1547                                         flash_write_cmd(info, 0, 0,
1548                                                         AMD_CMD_PPB_UNLOCK_BC1);
1549                                         flash_write_cmd(info, 0, 0,
1550                                                         AMD_CMD_PPB_UNLOCK_BC2);
1551                                 }
1552                                 debug("sector %ld %sunlocked\n", sector,
1553                                       !lock_flag ? "" : "already ");
1554                         }
1555                         if (flag)
1556                                 enable_interrupts();
1557
1558                         if (flash_status_check(info, sector,
1559                                                info->erase_blk_tout,
1560                                                prot ? "protect" : "unprotect"))
1561                                 printf("status check error\n");
1562
1563                         flash_write_cmd(info, 0, 0,
1564                                         AMD_CMD_SET_PPB_EXIT_BC1);
1565                         flash_write_cmd(info, 0, 0,
1566                                         AMD_CMD_SET_PPB_EXIT_BC2);
1567                 }
1568                 break;
1569 #ifdef CONFIG_FLASH_CFI_LEGACY
1570         case CFI_CMDSET_AMD_LEGACY:
1571                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1572                 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1573                 if (prot)
1574                         flash_write_cmd(info, sector, 0,
1575                                         FLASH_CMD_PROTECT_SET);
1576                 else
1577                         flash_write_cmd(info, sector, 0,
1578                                         FLASH_CMD_PROTECT_CLEAR);
1579 #endif
1580         };
1581
1582         /*
1583          * Flash needs to be in status register read mode for
1584          * flash_full_status_check() to work correctly
1585          */
1586         flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1587         retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
1588                                           prot ? "protect" : "unprotect");
1589         if (retcode == 0) {
1590                 info->protect[sector] = prot;
1591
1592                 /*
1593                  * On some of Intel's flash chips (marked via legacy_unlock)
1594                  * unprotect unprotects all locking.
1595                  */
1596                 if (prot == 0 && info->legacy_unlock) {
1597                         flash_sect_t i;
1598
1599                         for (i = 0; i < info->sector_count; i++) {
1600                                 if (info->protect[i])
1601                                         flash_real_protect(info, i, 1);
1602                         }
1603                 }
1604         }
1605         return retcode;
1606 }
1607
1608 /*-----------------------------------------------------------------------
1609  * flash_read_user_serial - read the OneTimeProgramming cells
1610  */
1611 void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
1612                             int len)
1613 {
1614         uchar *src;
1615         uchar *dst;
1616
1617         dst = buffer;
1618         src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1619         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1620         memcpy(dst, src + offset, len);
1621         flash_write_cmd(info, 0, 0, info->cmd_reset);
1622         udelay(1);
1623         flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1624 }
1625
1626 /*
1627  * flash_read_factory_serial - read the device Id from the protection area
1628  */
1629 void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
1630                                int len)
1631 {
1632         uchar *src;
1633
1634         src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1635         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1636         memcpy(buffer, src + offset, len);
1637         flash_write_cmd(info, 0, 0, info->cmd_reset);
1638         udelay(1);
1639         flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1640 }
1641
1642 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1643
1644 /*-----------------------------------------------------------------------
1645  * Reverse the order of the erase regions in the CFI QRY structure.
1646  * This is needed for chips that are either a) correctly detected as
1647  * top-boot, or b) buggy.
1648  */
1649 static void cfi_reverse_geometry(struct cfi_qry *qry)
1650 {
1651         unsigned int i, j;
1652         u32 tmp;
1653
1654         for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1655                 tmp = get_unaligned(&qry->erase_region_info[i]);
1656                 put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1657                               &qry->erase_region_info[i]);
1658                 put_unaligned(tmp, &qry->erase_region_info[j]);
1659         }
1660 }
1661
1662 /*-----------------------------------------------------------------------
1663  * read jedec ids from device and set corresponding fields in info struct
1664  *
1665  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1666  *
1667  */
1668 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1669 {
1670         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1671         udelay(1);
1672         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1673         udelay(1000); /* some flash are slow to respond */
1674         info->manufacturer_id = flash_read_uchar(info,
1675                                                  FLASH_OFFSET_MANUFACTURER_ID);
1676         info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1677                         flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1678                         flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
1679         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1680 }
1681
1682 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1683 {
1684         info->cmd_reset = FLASH_CMD_RESET;
1685
1686         cmdset_intel_read_jedec_ids(info);
1687         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1688
1689 #ifdef CONFIG_SYS_FLASH_PROTECTION
1690         /* read legacy lock/unlock bit from intel flash */
1691         if (info->ext_addr) {
1692                 info->legacy_unlock =
1693                         flash_read_uchar(info, info->ext_addr + 5) & 0x08;
1694         }
1695 #endif
1696
1697         return 0;
1698 }
1699
1700 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1701 {
1702         ushort bank_id = 0;
1703         uchar  manu_id;
1704         uchar  feature;
1705
1706         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1707         flash_unlock_seq(info, 0);
1708         flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1709         udelay(1000); /* some flash are slow to respond */
1710
1711         manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
1712         /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1713         while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
1714                 bank_id += 0x100;
1715                 manu_id = flash_read_uchar(info,
1716                                            bank_id | FLASH_OFFSET_MANUFACTURER_ID);
1717         }
1718         info->manufacturer_id = manu_id;
1719
1720         debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1721               info->ext_addr, info->cfi_version);
1722         if (info->ext_addr && info->cfi_version >= 0x3134) {
1723                 /* read software feature (at 0x53) */
1724                 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1725                 debug("feature = 0x%x\n", feature);
1726                 info->sr_supported = feature & 0x1;
1727         }
1728
1729         switch (info->chipwidth) {
1730         case FLASH_CFI_8BIT:
1731                 info->device_id = flash_read_uchar(info,
1732                                                    FLASH_OFFSET_DEVICE_ID);
1733                 if (info->device_id == 0x7E) {
1734                         /* AMD 3-byte (expanded) device ids */
1735                         info->device_id2 = flash_read_uchar(info,
1736                                                             FLASH_OFFSET_DEVICE_ID2);
1737                         info->device_id2 <<= 8;
1738                         info->device_id2 |= flash_read_uchar(info,
1739                                                 FLASH_OFFSET_DEVICE_ID3);
1740                 }
1741                 break;
1742         case FLASH_CFI_16BIT:
1743                 info->device_id = flash_read_word(info,
1744                                                   FLASH_OFFSET_DEVICE_ID);
1745                 if ((info->device_id & 0xff) == 0x7E) {
1746                         /* AMD 3-byte (expanded) device ids */
1747                         info->device_id2 = flash_read_uchar(info,
1748                                                             FLASH_OFFSET_DEVICE_ID2);
1749                         info->device_id2 <<= 8;
1750                         info->device_id2 |= flash_read_uchar(info,
1751                                                 FLASH_OFFSET_DEVICE_ID3);
1752                 }
1753                 break;
1754         default:
1755                 break;
1756         }
1757         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1758         udelay(1);
1759 }
1760
1761 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1762 {
1763         info->cmd_reset = AMD_CMD_RESET;
1764         info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1765
1766         cmdset_amd_read_jedec_ids(info);
1767         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1768
1769 #ifdef CONFIG_SYS_FLASH_PROTECTION
1770         if (info->ext_addr) {
1771                 /* read sector protect/unprotect scheme (at 0x49) */
1772                 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1773                         info->legacy_unlock = 1;
1774         }
1775 #endif
1776
1777         return 0;
1778 }
1779
1780 #ifdef CONFIG_FLASH_CFI_LEGACY
1781 static void flash_read_jedec_ids(flash_info_t *info)
1782 {
1783         info->manufacturer_id = 0;
1784         info->device_id       = 0;
1785         info->device_id2      = 0;
1786
1787         switch (info->vendor) {
1788         case CFI_CMDSET_INTEL_PROG_REGIONS:
1789         case CFI_CMDSET_INTEL_STANDARD:
1790         case CFI_CMDSET_INTEL_EXTENDED:
1791                 cmdset_intel_read_jedec_ids(info);
1792                 break;
1793         case CFI_CMDSET_AMD_STANDARD:
1794         case CFI_CMDSET_AMD_EXTENDED:
1795                 cmdset_amd_read_jedec_ids(info);
1796                 break;
1797         default:
1798                 break;
1799         }
1800 }
1801
1802 /*-----------------------------------------------------------------------
1803  * Call board code to request info about non-CFI flash.
1804  * board_flash_get_legacy needs to fill in at least:
1805  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1806  */
1807 static int flash_detect_legacy(phys_addr_t base, int banknum)
1808 {
1809         flash_info_t *info = &flash_info[banknum];
1810
1811         if (board_flash_get_legacy(base, banknum, info)) {
1812                 /* board code may have filled info completely. If not, we
1813                  * use JEDEC ID probing.
1814                  */
1815                 if (!info->vendor) {
1816                         int modes[] = {
1817                                 CFI_CMDSET_AMD_STANDARD,
1818                                 CFI_CMDSET_INTEL_STANDARD
1819                         };
1820                         int i;
1821
1822                         for (i = 0; i < ARRAY_SIZE(modes); i++) {
1823                                 info->vendor = modes[i];
1824                                 info->start[0] =
1825                                         (ulong)map_physmem(base,
1826                                                            info->portwidth,
1827                                                            MAP_NOCACHE);
1828                                 if (info->portwidth == FLASH_CFI_8BIT &&
1829                                     info->interface == FLASH_CFI_X8X16) {
1830                                         info->addr_unlock1 = 0x2AAA;
1831                                         info->addr_unlock2 = 0x5555;
1832                                 } else {
1833                                         info->addr_unlock1 = 0x5555;
1834                                         info->addr_unlock2 = 0x2AAA;
1835                                 }
1836                                 flash_read_jedec_ids(info);
1837                                 debug("JEDEC PROBE: ID %x %x %x\n",
1838                                       info->manufacturer_id,
1839                                       info->device_id,
1840                                       info->device_id2);
1841                                 if (jedec_flash_match(info, info->start[0]))
1842                                         break;
1843
1844                                 unmap_physmem((void *)info->start[0],
1845                                               info->portwidth);
1846                         }
1847                 }
1848
1849                 switch (info->vendor) {
1850                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1851                 case CFI_CMDSET_INTEL_STANDARD:
1852                 case CFI_CMDSET_INTEL_EXTENDED:
1853                         info->cmd_reset = FLASH_CMD_RESET;
1854                         break;
1855                 case CFI_CMDSET_AMD_STANDARD:
1856                 case CFI_CMDSET_AMD_EXTENDED:
1857                 case CFI_CMDSET_AMD_LEGACY:
1858                         info->cmd_reset = AMD_CMD_RESET;
1859                         break;
1860                 }
1861                 info->flash_id = FLASH_MAN_CFI;
1862                 return 1;
1863         }
1864         return 0; /* use CFI */
1865 }
1866 #else
1867 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1868 {
1869         return 0; /* use CFI */
1870 }
1871 #endif
1872
1873 /*-----------------------------------------------------------------------
1874  * detect if flash is compatible with the Common Flash Interface (CFI)
1875  * http://www.jedec.org/download/search/jesd68.pdf
1876  */
1877 static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
1878                            size_t len)
1879 {
1880         u8 *p = buf;
1881         unsigned int i;
1882
1883         for (i = 0; i < len; i++)
1884                 p[i] = flash_read_uchar(info, start + i);
1885 }
1886
1887 static void __flash_cmd_reset(flash_info_t *info)
1888 {
1889         /*
1890          * We do not yet know what kind of commandset to use, so we issue
1891          * the reset command in both Intel and AMD variants, in the hope
1892          * that AMD flash roms ignore the Intel command.
1893          */
1894         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1895         udelay(1);
1896         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1897 }
1898
1899 void flash_cmd_reset(flash_info_t *info)
1900         __attribute__((weak, alias("__flash_cmd_reset")));
1901
1902 static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1903 {
1904         int cfi_offset;
1905
1906         /* Issue FLASH reset command */
1907         flash_cmd_reset(info);
1908
1909         for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1910              cfi_offset++) {
1911                 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
1912                                 FLASH_CMD_CFI);
1913                 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
1914                     flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1915                     flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1916                         flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1917                                        sizeof(struct cfi_qry));
1918                         info->interface = le16_to_cpu(qry->interface_desc);
1919
1920                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1921                         debug("device interface is %d\n",
1922                               info->interface);
1923                         debug("found port %d chip %d ",
1924                               info->portwidth, info->chipwidth);
1925                         debug("port %d bits chip %d bits\n",
1926                               info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1927                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1928
1929                         /* calculate command offsets as in the Linux driver */
1930                         info->addr_unlock1 = 0x555;
1931                         info->addr_unlock2 = 0x2aa;
1932
1933                         /*
1934                          * modify the unlock address if we are
1935                          * in compatibility mode
1936                          */
1937                         if (/* x8/x16 in x8 mode */
1938                             (info->chipwidth == FLASH_CFI_BY8 &&
1939                                 info->interface == FLASH_CFI_X8X16) ||
1940                             /* x16/x32 in x16 mode */
1941                             (info->chipwidth == FLASH_CFI_BY16 &&
1942                                 info->interface == FLASH_CFI_X16X32)) {
1943                                 info->addr_unlock1 = 0xaaa;
1944                                 info->addr_unlock2 = 0x555;
1945                         }
1946
1947                         info->name = "CFI conformant";
1948                         return 1;
1949                 }
1950         }
1951
1952         return 0;
1953 }
1954
1955 static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1956 {
1957         debug("flash detect cfi\n");
1958
1959         for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1960              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1961                 for (info->chipwidth = FLASH_CFI_BY8;
1962                      info->chipwidth <= info->portwidth;
1963                      info->chipwidth <<= 1)
1964                         if (__flash_detect_cfi(info, qry))
1965                                 return 1;
1966         }
1967         debug("not found\n");
1968         return 0;
1969 }
1970
1971 /*
1972  * Manufacturer-specific quirks. Add workarounds for geometry
1973  * reversal, etc. here.
1974  */
1975 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1976 {
1977         /* check if flash geometry needs reversal */
1978         if (qry->num_erase_regions > 1) {
1979                 /* reverse geometry if top boot part */
1980                 if (info->cfi_version < 0x3131) {
1981                         /* CFI < 1.1, try to guess from device id */
1982                         if ((info->device_id & 0x80) != 0)
1983                                 cfi_reverse_geometry(qry);
1984                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1985                         /* CFI >= 1.1, deduct from top/bottom flag */
1986                         /* note: ext_addr is valid since cfi_version > 0 */
1987                         cfi_reverse_geometry(qry);
1988                 }
1989         }
1990 }
1991
1992 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1993 {
1994         int reverse_geometry = 0;
1995
1996         /* Check the "top boot" bit in the PRI */
1997         if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1998                 reverse_geometry = 1;
1999
2000         /* AT49BV6416(T) list the erase regions in the wrong order.
2001          * However, the device ID is identical with the non-broken
2002          * AT49BV642D they differ in the high byte.
2003          */
2004         if (info->device_id == 0xd6 || info->device_id == 0xd2)
2005                 reverse_geometry = !reverse_geometry;
2006
2007         if (reverse_geometry)
2008                 cfi_reverse_geometry(qry);
2009 }
2010
2011 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2012 {
2013         /* check if flash geometry needs reversal */
2014         if (qry->num_erase_regions > 1) {
2015                 /* reverse geometry if top boot part */
2016                 if (info->cfi_version < 0x3131) {
2017                         /* CFI < 1.1, guess by device id */
2018                         if (info->device_id == 0x22CA || /* M29W320DT */
2019                             info->device_id == 0x2256 || /* M29W320ET */
2020                             info->device_id == 0x22D7) { /* M29W800DT */
2021                                 cfi_reverse_geometry(qry);
2022                         }
2023                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2024                         /* CFI >= 1.1, deduct from top/bottom flag */
2025                         /* note: ext_addr is valid since cfi_version > 0 */
2026                         cfi_reverse_geometry(qry);
2027                 }
2028         }
2029 }
2030
2031 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2032 {
2033         /*
2034          * SST, for many recent nor parallel flashes, says they are
2035          * CFI-conformant. This is not true, since qry struct.
2036          * reports a std. AMD command set (0x0002), while SST allows to
2037          * erase two different sector sizes for the same memory.
2038          * 64KB sector (SST call it block)  needs 0x30 to be erased.
2039          * 4KB  sector (SST call it sector) needs 0x50 to be erased.
2040          * Since CFI query detect the 4KB number of sectors, users expects
2041          * a sector granularity of 4KB, and it is here set.
2042          */
2043         if (info->device_id == 0x5D23 || /* SST39VF3201B */
2044             info->device_id == 0x5C23) { /* SST39VF3202B */
2045                 /* set sector granularity to 4KB */
2046                 info->cmd_erase_sector = 0x50;
2047         }
2048 }
2049
2050 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2051 {
2052         /*
2053          * The M29EW devices seem to report the CFI information wrong
2054          * when it's in 8 bit mode.
2055          * There's an app note from Numonyx on this issue.
2056          * So adjust the buffer size for M29EW while operating in 8-bit mode
2057          */
2058         if (qry->max_buf_write_size > 0x8 &&
2059             info->device_id == 0x7E &&
2060             (info->device_id2 == 0x2201 ||
2061              info->device_id2 == 0x2301 ||
2062              info->device_id2 == 0x2801 ||
2063              info->device_id2 == 0x4801)) {
2064                 debug("Adjusted buffer size on Numonyx flash");
2065                 debug(" M29EW family in 8 bit mode\n");
2066                 qry->max_buf_write_size = 0x8;
2067         }
2068 }
2069
2070 /*
2071  * The following code cannot be run from FLASH!
2072  *
2073  */
2074 ulong flash_get_size(phys_addr_t base, int banknum)
2075 {
2076         flash_info_t *info = &flash_info[banknum];
2077         int i, j;
2078         flash_sect_t sect_cnt;
2079         phys_addr_t sector;
2080         unsigned long tmp;
2081         int size_ratio;
2082         uchar num_erase_regions;
2083         int erase_region_size;
2084         int erase_region_count;
2085         struct cfi_qry qry;
2086         unsigned long max_size;
2087
2088         memset(&qry, 0, sizeof(qry));
2089
2090         info->ext_addr = 0;
2091         info->cfi_version = 0;
2092 #ifdef CONFIG_SYS_FLASH_PROTECTION
2093         info->legacy_unlock = 0;
2094 #endif
2095
2096         info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2097
2098         if (flash_detect_cfi(info, &qry)) {
2099                 info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2100                 info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
2101                 num_erase_regions = qry.num_erase_regions;
2102
2103                 if (info->ext_addr) {
2104                         info->cfi_version = (ushort)flash_read_uchar(info,
2105                                                 info->ext_addr + 3) << 8;
2106                         info->cfi_version |= (ushort)flash_read_uchar(info,
2107                                                 info->ext_addr + 4);
2108                 }
2109
2110 #ifdef DEBUG
2111                 flash_printqry(&qry);
2112 #endif
2113
2114                 switch (info->vendor) {
2115                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2116                 case CFI_CMDSET_INTEL_STANDARD:
2117                 case CFI_CMDSET_INTEL_EXTENDED:
2118                         cmdset_intel_init(info, &qry);
2119                         break;
2120                 case CFI_CMDSET_AMD_STANDARD:
2121                 case CFI_CMDSET_AMD_EXTENDED:
2122                         cmdset_amd_init(info, &qry);
2123                         break;
2124                 default:
2125                         printf("CFI: Unknown command set 0x%x\n",
2126                                info->vendor);
2127                         /*
2128                          * Unfortunately, this means we don't know how
2129                          * to get the chip back to Read mode. Might
2130                          * as well try an Intel-style reset...
2131                          */
2132                         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2133                         return 0;
2134                 }
2135
2136                 /* Do manufacturer-specific fixups */
2137                 switch (info->manufacturer_id) {
2138                 case 0x0001: /* AMD */
2139                 case 0x0037: /* AMIC */
2140                         flash_fixup_amd(info, &qry);
2141                         break;
2142                 case 0x001f:
2143                         flash_fixup_atmel(info, &qry);
2144                         break;
2145                 case 0x0020:
2146                         flash_fixup_stm(info, &qry);
2147                         break;
2148                 case 0x00bf: /* SST */
2149                         flash_fixup_sst(info, &qry);
2150                         break;
2151                 case 0x0089: /* Numonyx */
2152                         flash_fixup_num(info, &qry);
2153                         break;
2154                 }
2155
2156                 debug("manufacturer is %d\n", info->vendor);
2157                 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2158                 debug("device id is 0x%x\n", info->device_id);
2159                 debug("device id2 is 0x%x\n", info->device_id2);
2160                 debug("cfi version is 0x%04x\n", info->cfi_version);
2161
2162                 size_ratio = info->portwidth / info->chipwidth;
2163                 /* if the chip is x8/x16 reduce the ratio by half */
2164                 if (info->interface == FLASH_CFI_X8X16 &&
2165                     info->chipwidth == FLASH_CFI_BY8) {
2166                         size_ratio >>= 1;
2167                 }
2168                 debug("size_ratio %d port %d bits chip %d bits\n",
2169                       size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2170                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2171                 info->size = 1 << qry.dev_size;
2172                 /* multiply the size by the number of chips */
2173                 info->size *= size_ratio;
2174                 max_size = cfi_flash_bank_size(banknum);
2175                 if (max_size && info->size > max_size) {
2176                         debug("[truncated from %ldMiB]", info->size >> 20);
2177                         info->size = max_size;
2178                 }
2179                 debug("found %d erase regions\n", num_erase_regions);
2180                 sect_cnt = 0;
2181                 sector = base;
2182                 for (i = 0; i < num_erase_regions; i++) {
2183                         if (i > NUM_ERASE_REGIONS) {
2184                                 printf("%d erase regions found, only %d used\n",
2185                                        num_erase_regions, NUM_ERASE_REGIONS);
2186                                 break;
2187                         }
2188
2189                         tmp = le32_to_cpu(get_unaligned(
2190                                                 &qry.erase_region_info[i]));
2191                         debug("erase region %u: 0x%08lx\n", i, tmp);
2192
2193                         erase_region_count = (tmp & 0xffff) + 1;
2194                         tmp >>= 16;
2195                         erase_region_size =
2196                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2197                         debug("erase_region_count = %d ", erase_region_count);
2198                         debug("erase_region_size = %d\n", erase_region_size);
2199                         for (j = 0; j < erase_region_count; j++) {
2200                                 if (sector - base >= info->size)
2201                                         break;
2202                                 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2203                                         printf("ERROR: too many flash sectors\n");
2204                                         break;
2205                                 }
2206                                 info->start[sect_cnt] =
2207                                         (ulong)map_physmem(sector,
2208                                                            info->portwidth,
2209                                                            MAP_NOCACHE);
2210                                 sector += (erase_region_size * size_ratio);
2211
2212                                 /*
2213                                  * Only read protection status from
2214                                  * supported devices (intel...)
2215                                  */
2216                                 switch (info->vendor) {
2217                                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2218                                 case CFI_CMDSET_INTEL_EXTENDED:
2219                                 case CFI_CMDSET_INTEL_STANDARD:
2220                                         /*
2221                                          * Set flash to read-id mode. Otherwise
2222                                          * reading protected status is not
2223                                          * guaranteed.
2224                                          */
2225                                         flash_write_cmd(info, sect_cnt, 0,
2226                                                         FLASH_CMD_READ_ID);
2227                                         info->protect[sect_cnt] =
2228                                                 flash_isset(info, sect_cnt,
2229                                                             FLASH_OFFSET_PROTECT,
2230                                                             FLASH_STATUS_PROTECT);
2231                                         flash_write_cmd(info, sect_cnt, 0,
2232                                                         FLASH_CMD_RESET);
2233                                         break;
2234                                 case CFI_CMDSET_AMD_EXTENDED:
2235                                 case CFI_CMDSET_AMD_STANDARD:
2236                                         if (!info->legacy_unlock) {
2237                                                 /* default: not protected */
2238                                                 info->protect[sect_cnt] = 0;
2239                                                 break;
2240                                         }
2241
2242                                         /* Read protection (PPB) from sector */
2243                                         flash_write_cmd(info, 0, 0,
2244                                                         info->cmd_reset);
2245                                         flash_unlock_seq(info, 0);
2246                                         flash_write_cmd(info, 0,
2247                                                         info->addr_unlock1,
2248                                                         FLASH_CMD_READ_ID);
2249                                         info->protect[sect_cnt] =
2250                                                 flash_isset(
2251                                                         info, sect_cnt,
2252                                                         FLASH_OFFSET_PROTECT,
2253                                                         FLASH_STATUS_PROTECT);
2254                                         break;
2255                                 default:
2256                                         /* default: not protected */
2257                                         info->protect[sect_cnt] = 0;
2258                                 }
2259
2260                                 sect_cnt++;
2261                         }
2262                 }
2263
2264                 info->sector_count = sect_cnt;
2265                 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2266                 tmp = 1 << qry.block_erase_timeout_typ;
2267                 info->erase_blk_tout = tmp *
2268                         (1 << qry.block_erase_timeout_max);
2269                 tmp = (1 << qry.buf_write_timeout_typ) *
2270                         (1 << qry.buf_write_timeout_max);
2271
2272                 /* round up when converting to ms */
2273                 info->buffer_write_tout = (tmp + 999) / 1000;
2274                 tmp = (1 << qry.word_write_timeout_typ) *
2275                         (1 << qry.word_write_timeout_max);
2276                 /* round up when converting to ms */
2277                 info->write_tout = (tmp + 999) / 1000;
2278                 info->flash_id = FLASH_MAN_CFI;
2279                 if (info->interface == FLASH_CFI_X8X16 &&
2280                     info->chipwidth == FLASH_CFI_BY8) {
2281                         /* XXX - Need to test on x8/x16 in parallel. */
2282                         info->portwidth >>= 1;
2283                 }
2284
2285                 flash_write_cmd(info, 0, 0, info->cmd_reset);
2286         }
2287
2288         return (info->size);
2289 }
2290
2291 #ifdef CONFIG_FLASH_CFI_MTD
2292 void flash_set_verbose(uint v)
2293 {
2294         flash_verbose = v;
2295 }
2296 #endif
2297
2298 static void cfi_flash_set_config_reg(u32 base, u16 val)
2299 {
2300 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2301         /*
2302          * Only set this config register if really defined
2303          * to a valid value (0xffff is invalid)
2304          */
2305         if (val == 0xffff)
2306                 return;
2307
2308         /*
2309          * Set configuration register. Data is "encrypted" in the 16 lower
2310          * address bits.
2311          */
2312         flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2313         flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2314
2315         /*
2316          * Finally issue reset-command to bring device back to
2317          * read-array mode
2318          */
2319         flash_write16(FLASH_CMD_RESET, (void *)base);
2320 #endif
2321 }
2322
2323 /*-----------------------------------------------------------------------
2324  */
2325
2326 static void flash_protect_default(void)
2327 {
2328 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2329         int i;
2330         struct apl_s {
2331                 ulong start;
2332                 ulong size;
2333         } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2334 #endif
2335
2336         /* Monitor protection ON by default */
2337 #if defined(CONFIG_SYS_MONITOR_BASE) && \
2338         (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2339         (!defined(CONFIG_MONITOR_IS_IN_RAM))
2340         flash_protect(FLAG_PROTECT_SET,
2341                       CONFIG_SYS_MONITOR_BASE,
2342                       CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2343                       flash_get_info(CONFIG_SYS_MONITOR_BASE));
2344 #endif
2345
2346         /* Environment protection ON by default */
2347 #ifdef CONFIG_ENV_IS_IN_FLASH
2348         flash_protect(FLAG_PROTECT_SET,
2349                       CONFIG_ENV_ADDR,
2350                       CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2351                       flash_get_info(CONFIG_ENV_ADDR));
2352 #endif
2353
2354         /* Redundant environment protection ON by default */
2355 #ifdef CONFIG_ENV_ADDR_REDUND
2356         flash_protect(FLAG_PROTECT_SET,
2357                       CONFIG_ENV_ADDR_REDUND,
2358                       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2359                       flash_get_info(CONFIG_ENV_ADDR_REDUND));
2360 #endif
2361
2362 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2363         for (i = 0; i < ARRAY_SIZE(apl); i++) {
2364                 debug("autoprotecting from %08lx to %08lx\n",
2365                       apl[i].start, apl[i].start + apl[i].size - 1);
2366                 flash_protect(FLAG_PROTECT_SET,
2367                               apl[i].start,
2368                               apl[i].start + apl[i].size - 1,
2369                               flash_get_info(apl[i].start));
2370         }
2371 #endif
2372 }
2373
2374 unsigned long flash_init(void)
2375 {
2376         unsigned long size = 0;
2377         int i;
2378
2379 #ifdef CONFIG_SYS_FLASH_PROTECTION
2380         /* read environment from EEPROM */
2381         char s[64];
2382
2383         env_get_f("unlock", s, sizeof(s));
2384 #endif
2385
2386 #ifdef CONFIG_CFI_FLASH /* for driver model */
2387         cfi_flash_init_dm();
2388 #endif
2389
2390         /* Init: no FLASHes known */
2391         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2392                 flash_info[i].flash_id = FLASH_UNKNOWN;
2393
2394                 /* Optionally write flash configuration register */
2395                 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2396                                          cfi_flash_config_reg(i));
2397
2398                 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2399                         flash_get_size(cfi_flash_bank_addr(i), i);
2400                 size += flash_info[i].size;
2401                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2402 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2403                         printf("## Unknown flash on Bank %d ", i + 1);
2404                         printf("- Size = 0x%08lx = %ld MB\n",
2405                                flash_info[i].size,
2406                                flash_info[i].size >> 20);
2407 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2408                 }
2409 #ifdef CONFIG_SYS_FLASH_PROTECTION
2410                 else if (strcmp(s, "yes") == 0) {
2411                         /*
2412                          * Only the U-Boot image and it's environment
2413                          * is protected, all other sectors are
2414                          * unprotected (unlocked) if flash hardware
2415                          * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2416                          * and the environment variable "unlock" is
2417                          * set to "yes".
2418                          */
2419                         if (flash_info[i].legacy_unlock) {
2420                                 int k;
2421
2422                                 /*
2423                                  * Disable legacy_unlock temporarily,
2424                                  * since flash_real_protect would
2425                                  * relock all other sectors again
2426                                  * otherwise.
2427                                  */
2428                                 flash_info[i].legacy_unlock = 0;
2429
2430                                 /*
2431                                  * Legacy unlocking (e.g. Intel J3) ->
2432                                  * unlock only one sector. This will
2433                                  * unlock all sectors.
2434                                  */
2435                                 flash_real_protect(&flash_info[i], 0, 0);
2436
2437                                 flash_info[i].legacy_unlock = 1;
2438
2439                                 /*
2440                                  * Manually mark other sectors as
2441                                  * unlocked (unprotected)
2442                                  */
2443                                 for (k = 1; k < flash_info[i].sector_count; k++)
2444                                         flash_info[i].protect[k] = 0;
2445                         } else {
2446                                 /*
2447                                  * No legancy unlocking -> unlock all sectors
2448                                  */
2449                                 flash_protect(FLAG_PROTECT_CLEAR,
2450                                               flash_info[i].start[0],
2451                                               flash_info[i].start[0]
2452                                               + flash_info[i].size - 1,
2453                                               &flash_info[i]);
2454                         }
2455                 }
2456 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2457         }
2458
2459         flash_protect_default();
2460 #ifdef CONFIG_FLASH_CFI_MTD
2461         cfi_mtd_init();
2462 #endif
2463
2464         return (size);
2465 }
2466
2467 #ifdef CONFIG_CFI_FLASH /* for driver model */
2468 static int cfi_flash_probe(struct udevice *dev)
2469 {
2470         const fdt32_t *cell;
2471         int addrc, sizec;
2472         int len, idx;
2473
2474         addrc = dev_read_addr_cells(dev);
2475         sizec = dev_read_size_cells(dev);
2476
2477         /* decode regs; there may be multiple reg tuples. */
2478         cell = dev_read_prop(dev, "reg", &len);
2479         if (!cell)
2480                 return -ENOENT;
2481         idx = 0;
2482         len /= sizeof(fdt32_t);
2483         while (idx < len) {
2484                 phys_addr_t addr;
2485
2486                 addr = dev_translate_address(dev, cell + idx);
2487
2488                 flash_info[cfi_flash_num_flash_banks].dev = dev;
2489                 flash_info[cfi_flash_num_flash_banks].base = addr;
2490                 cfi_flash_num_flash_banks++;
2491
2492                 idx += addrc + sizec;
2493         }
2494         gd->bd->bi_flashstart = flash_info[0].base;
2495
2496         return 0;
2497 }
2498
2499 static const struct udevice_id cfi_flash_ids[] = {
2500         { .compatible = "cfi-flash" },
2501         { .compatible = "jedec-flash" },
2502         {}
2503 };
2504
2505 U_BOOT_DRIVER(cfi_flash) = {
2506         .name   = "cfi_flash",
2507         .id     = UCLASS_MTD,
2508         .of_match = cfi_flash_ids,
2509         .probe = cfi_flash_probe,
2510 };
2511 #endif /* CONFIG_CFI_FLASH */