drivers/mmc/rockchip_dw_mmc.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (c) 2013 Google, Inc
   4  */
   5
   6 #include <common.h>
   7 #include <clk.h>
   8 #include <dm.h>
   9 #include <dt-structs.h>
  10 #include <dwmmc.h>
  11 #include <errno.h>
  12 #include <log.h>
  13 #include <mapmem.h>
  14 #include <pwrseq.h>
  15 #include <syscon.h>
  16 #include <asm/gpio.h>
  17 #include <asm/arch-rockchip/clock.h>
  18 #include <asm/arch-rockchip/periph.h>
  19 #include <linux/err.h>
  20
  21 struct rockchip_mmc_plat {
  22 #if CONFIG_IS_ENABLED(OF_PLATDATA)
  23         struct dtd_rockchip_rk3288_dw_mshc dtplat;
  24 #endif
  25         struct mmc_config cfg;
  26         struct mmc mmc;
  27 };
  28
  29 struct rockchip_dwmmc_priv {
  30         struct clk clk;
  31         struct dwmci_host host;
  32         int fifo_depth;
  33         bool fifo_mode;
  34         u32 minmax[2];
  35 };
  36
  37 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
  38 {
  39         struct udevice *dev = host->priv;
  40         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  41         int ret;
  42
  43         ret = clk_set_rate(&priv->clk, freq);
  44         if (ret < 0) {
  45                 debug("%s: err=%d\n", __func__, ret);
  46                 return ret;
  47         }
  48
  49         return freq;
  50 }
  51
  52 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
  53 {
  54 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  55         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  56         struct dwmci_host *host = &priv->host;
  57
  58         host->name = dev->name;
  59         host->ioaddr = dev_read_addr_ptr(dev);
  60         host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
  61         host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
  62         host->priv = dev;
  63
  64         /* use non-removeable as sdcard and emmc as judgement */
  65         if (dev_read_bool(dev, "non-removable"))
  66                 host->dev_index = 0;
  67         else
  68                 host->dev_index = 1;
  69
  70         priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0);
  71
  72         if (priv->fifo_depth < 0)
  73                 return -EINVAL;
  74         priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
  75
  76 #ifdef CONFIG_SPL_BUILD
  77         if (!priv->fifo_mode)
  78                 priv->fifo_mode = dev_read_bool(dev, "u-boot,spl-fifo-mode");
  79 #endif
  80
  81         /*
  82          * 'clock-freq-min-max' is deprecated
  83          * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b)
  84          */
  85         if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) {
  86                 int val = dev_read_u32_default(dev, "max-frequency", -EINVAL);
  87
  88                 if (val < 0)
  89                         return val;
  90
  91                 priv->minmax[0] = 400000;  /* 400 kHz */
  92                 priv->minmax[1] = val;
  93         } else {
  94                 debug("%s: 'clock-freq-min-max' property was deprecated.\n",
  95                       __func__);
  96         }
  97 #endif
  98         return 0;
  99 }
 100
 101 static int rockchip_dwmmc_probe(struct udevice *dev)
 102 {
 103         struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
 104         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
 105         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
 106         struct dwmci_host *host = &priv->host;
 107         struct udevice *pwr_dev __maybe_unused;
 108         int ret;
 109
 110 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 111         struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat;
 112
 113         host->name = dev->name;
 114         host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
 115         host->buswidth = dtplat->bus_width;
 116         host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
 117         host->priv = dev;
 118         host->dev_index = 0;
 119         priv->fifo_depth = dtplat->fifo_depth;
 120         priv->fifo_mode = 0;
 121         priv->minmax[0] = 400000;  /*  400 kHz */
 122         priv->minmax[1] = dtplat->max_frequency;
 123
 124         ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk);
 125         if (ret < 0)
 126                 return ret;
 127 #else
 128         ret = clk_get_by_index(dev, 0, &priv->clk);
 129         if (ret < 0)
 130                 return ret;
 131 #endif
 132         host->fifoth_val = MSIZE(0x2) |
 133                 RX_WMARK(priv->fifo_depth / 2 - 1) |
 134                 TX_WMARK(priv->fifo_depth / 2);
 135
 136         host->fifo_mode = priv->fifo_mode;
 137
 138 #ifdef CONFIG_PWRSEQ
 139         /* Enable power if needed */
 140         ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
 141                                            &pwr_dev);
 142         if (!ret) {
 143                 ret = pwrseq_set_power(pwr_dev, true);
 144                 if (ret)
 145                         return ret;
 146         }
 147 #endif
 148         dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
 149         host->mmc = &plat->mmc;
 150         host->mmc->priv = &priv->host;
 151         host->mmc->dev = dev;
 152         upriv->mmc = host->mmc;
 153
 154         return dwmci_probe(dev);
 155 }
 156
 157 static int rockchip_dwmmc_bind(struct udevice *dev)
 158 {
 159         struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
 160
 161         return dwmci_bind(dev, &plat->mmc, &plat->cfg);
 162 }
 163
 164 static const struct udevice_id rockchip_dwmmc_ids[] = {
 165         { .compatible = "rockchip,rk2928-dw-mshc" },
 166         { .compatible = "rockchip,rk3288-dw-mshc" },
 167         { }
 168 };
 169
 170 U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
 171         .name           = "rockchip_rk3288_dw_mshc",
 172         .id             = UCLASS_MMC,
 173         .of_match       = rockchip_dwmmc_ids,
 174         .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
 175         .ops            = &dm_dwmci_ops,
 176         .bind           = rockchip_dwmmc_bind,
 177         .probe          = rockchip_dwmmc_probe,
 178         .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
 179         .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
 180 };
 181
 182 #ifdef CONFIG_PWRSEQ
 183 static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
 184 {
 185         struct gpio_desc reset;
 186         int ret;
 187
 188         ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
 189         if (ret)
 190                 return ret;
 191         dm_gpio_set_value(&reset, 1);
 192         udelay(1);
 193         dm_gpio_set_value(&reset, 0);
 194         udelay(200);
 195
 196         return 0;
 197 }
 198
 199 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
 200         .set_power      = rockchip_dwmmc_pwrseq_set_power,
 201 };
 202
 203 static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
 204         { .compatible = "mmc-pwrseq-emmc" },
 205         { }
 206 };
 207
 208 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
 209         .name           = "mmc_pwrseq_emmc",
 210         .id             = UCLASS_PWRSEQ,
 211         .of_match       = rockchip_dwmmc_pwrseq_ids,
 212         .ops            = &rockchip_dwmmc_pwrseq_ops,
 213 };
 214 #endif