drivers/mmc/mmc.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2008, Freescale Semiconductor, Inc
   4  * Andy Fleming
   5  *
   6  * Based vaguely on the Linux code
   7  */
   8
   9 #include <config.h>
  10 #include <common.h>
  11 #include <blk.h>
  12 #include <command.h>
  13 #include <dm.h>
  14 #include <log.h>
  15 #include <dm/device-internal.h>
  16 #include <errno.h>
  17 #include <mmc.h>
  18 #include <part.h>
  19 #include <power/regulator.h>
  20 #include <malloc.h>
  21 #include <memalign.h>
  22 #include <linux/list.h>
  23 #include <div64.h>
  24 #include "mmc_private.h"
  25
  26 #define DEFAULT_CMD6_TIMEOUT_MS  500
  27
  28 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
  29
  30 #if !CONFIG_IS_ENABLED(DM_MMC)
  31
  32 static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us)
  33 {
  34         return -ENOSYS;
  35 }
  36
  37 __weak int board_mmc_getwp(struct mmc *mmc)
  38 {
  39         return -1;
  40 }
  41
  42 int mmc_getwp(struct mmc *mmc)
  43 {
  44         int wp;
  45
  46         wp = board_mmc_getwp(mmc);
  47
  48         if (wp < 0) {
  49                 if (mmc->cfg->ops->getwp)
  50                         wp = mmc->cfg->ops->getwp(mmc);
  51                 else
  52                         wp = 0;
  53         }
  54
  55         return wp;
  56 }
  57
  58 __weak int board_mmc_getcd(struct mmc *mmc)
  59 {
  60         return -1;
  61 }
  62 #endif
  63
  64 #ifdef CONFIG_MMC_TRACE
  65 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
  66 {
  67         printf("CMD_SEND:%d\n", cmd->cmdidx);
  68         printf("\t\tARG\t\t\t 0x%08x\n", cmd->cmdarg);
  69 }
  70
  71 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
  72 {
  73         int i;
  74         u8 *ptr;
  75
  76         if (ret) {
  77                 printf("\t\tRET\t\t\t %d\n", ret);
  78         } else {
  79                 switch (cmd->resp_type) {
  80                 case MMC_RSP_NONE:
  81                         printf("\t\tMMC_RSP_NONE\n");
  82                         break;
  83                 case MMC_RSP_R1:
  84                         printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08x \n",
  85                                 cmd->response[0]);
  86                         break;
  87                 case MMC_RSP_R1b:
  88                         printf("\t\tMMC_RSP_R1b\t\t 0x%08x \n",
  89                                 cmd->response[0]);
  90                         break;
  91                 case MMC_RSP_R2:
  92                         printf("\t\tMMC_RSP_R2\t\t 0x%08x \n",
  93                                 cmd->response[0]);
  94                         printf("\t\t          \t\t 0x%08x \n",
  95                                 cmd->response[1]);
  96                         printf("\t\t          \t\t 0x%08x \n",
  97                                 cmd->response[2]);
  98                         printf("\t\t          \t\t 0x%08x \n",
  99                                 cmd->response[3]);
 100                         printf("\n");
 101                         printf("\t\t\t\t\tDUMPING DATA\n");
 102                         for (i = 0; i < 4; i++) {
 103                                 int j;
 104                                 printf("\t\t\t\t\t%03d - ", i*4);
 105                                 ptr = (u8 *)&cmd->response[i];
 106                                 ptr += 3;
 107                                 for (j = 0; j < 4; j++)
 108                                         printf("%02x ", *ptr--);
 109                                 printf("\n");
 110                         }
 111                         break;
 112                 case MMC_RSP_R3:
 113                         printf("\t\tMMC_RSP_R3,4\t\t 0x%08x \n",
 114                                 cmd->response[0]);
 115                         break;
 116                 default:
 117                         printf("\t\tERROR MMC rsp not supported\n");
 118                         break;
 119                 }
 120         }
 121 }
 122
 123 void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
 124 {
 125         int status;
 126
 127         status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
 128         printf("CURR STATE:%d\n", status);
 129 }
 130 #endif
 131
 132 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
 133 const char *mmc_mode_name(enum bus_mode mode)
 134 {
 135         static const char *const names[] = {
 136               [MMC_LEGACY]      = "MMC legacy",
 137               [MMC_HS]          = "MMC High Speed (26MHz)",
 138               [SD_HS]           = "SD High Speed (50MHz)",
 139               [UHS_SDR12]       = "UHS SDR12 (25MHz)",
 140               [UHS_SDR25]       = "UHS SDR25 (50MHz)",
 141               [UHS_SDR50]       = "UHS SDR50 (100MHz)",
 142               [UHS_SDR104]      = "UHS SDR104 (208MHz)",
 143               [UHS_DDR50]       = "UHS DDR50 (50MHz)",
 144               [MMC_HS_52]       = "MMC High Speed (52MHz)",
 145               [MMC_DDR_52]      = "MMC DDR52 (52MHz)",
 146               [MMC_HS_200]      = "HS200 (200MHz)",
 147               [MMC_HS_400]      = "HS400 (200MHz)",
 148               [MMC_HS_400_ES]   = "HS400ES (200MHz)",
 149         };
 150
 151         if (mode >= MMC_MODES_END)
 152                 return "Unknown mode";
 153         else
 154                 return names[mode];
 155 }
 156 #endif
 157
 158 static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
 159 {
 160         static const int freqs[] = {
 161               [MMC_LEGACY]      = 25000000,
 162               [MMC_HS]          = 26000000,
 163               [SD_HS]           = 50000000,
 164               [MMC_HS_52]       = 52000000,
 165               [MMC_DDR_52]      = 52000000,
 166               [UHS_SDR12]       = 25000000,
 167               [UHS_SDR25]       = 50000000,
 168               [UHS_SDR50]       = 100000000,
 169               [UHS_DDR50]       = 50000000,
 170               [UHS_SDR104]      = 208000000,
 171               [MMC_HS_200]      = 200000000,
 172               [MMC_HS_400]      = 200000000,
 173               [MMC_HS_400_ES]   = 200000000,
 174         };
 175
 176         if (mode == MMC_LEGACY)
 177                 return mmc->legacy_speed;
 178         else if (mode >= MMC_MODES_END)
 179                 return 0;
 180         else
 181                 return freqs[mode];
 182 }
 183
 184 static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
 185 {
 186         mmc->selected_mode = mode;
 187         mmc->tran_speed = mmc_mode2freq(mmc, mode);
 188         mmc->ddr_mode = mmc_is_mode_ddr(mode);
 189         pr_debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
 190                  mmc->tran_speed / 1000000);
 191         return 0;
 192 }
 193
 194 #if !CONFIG_IS_ENABLED(DM_MMC)
 195 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 196 {
 197         int ret;
 198
 199         mmmc_trace_before_send(mmc, cmd);
 200         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
 201         mmmc_trace_after_send(mmc, cmd, ret);
 202
 203         return ret;
 204 }
 205 #endif
 206
 207 int mmc_send_status(struct mmc *mmc, unsigned int *status)
 208 {
 209         struct mmc_cmd cmd;
 210         int err, retries = 5;
 211
 212         cmd.cmdidx = MMC_CMD_SEND_STATUS;
 213         cmd.resp_type = MMC_RSP_R1;
 214         if (!mmc_host_is_spi(mmc))
 215                 cmd.cmdarg = mmc->rca << 16;
 216
 217         while (retries--) {
 218                 err = mmc_send_cmd(mmc, &cmd, NULL);
 219                 if (!err) {
 220                         mmc_trace_state(mmc, &cmd);
 221                         *status = cmd.response[0];
 222                         return 0;
 223                 }
 224         }
 225         mmc_trace_state(mmc, &cmd);
 226         return -ECOMM;
 227 }
 228
 229 int mmc_poll_for_busy(struct mmc *mmc, int timeout_ms)
 230 {
 231         unsigned int status;
 232         int err;
 233
 234         err = mmc_wait_dat0(mmc, 1, timeout_ms * 1000);
 235         if (err != -ENOSYS)
 236                 return err;
 237
 238         while (1) {
 239                 err = mmc_send_status(mmc, &status);
 240                 if (err)
 241                         return err;
 242
 243                 if ((status & MMC_STATUS_RDY_FOR_DATA) &&
 244                     (status & MMC_STATUS_CURR_STATE) !=
 245                      MMC_STATE_PRG)
 246                         break;
 247
 248                 if (status & MMC_STATUS_MASK) {
 249 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 250                         pr_err("Status Error: 0x%08x\n", status);
 251 #endif
 252                         return -ECOMM;
 253                 }
 254
 255                 if (timeout_ms-- <= 0)
 256                         break;
 257
 258                 udelay(1000);
 259         }
 260
 261         if (timeout_ms <= 0) {
 262 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 263                 pr_err("Timeout waiting card ready\n");
 264 #endif
 265                 return -ETIMEDOUT;
 266         }
 267
 268         return 0;
 269 }
 270
 271 int mmc_set_blocklen(struct mmc *mmc, int len)
 272 {
 273         struct mmc_cmd cmd;
 274         int err;
 275
 276         if (mmc->ddr_mode)
 277                 return 0;
 278
 279         cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
 280         cmd.resp_type = MMC_RSP_R1;
 281         cmd.cmdarg = len;
 282
 283         err = mmc_send_cmd(mmc, &cmd, NULL);
 284
 285 #ifdef CONFIG_MMC_QUIRKS
 286         if (err && (mmc->quirks & MMC_QUIRK_RETRY_SET_BLOCKLEN)) {
 287                 int retries = 4;
 288                 /*
 289                  * It has been seen that SET_BLOCKLEN may fail on the first
 290                  * attempt, let's try a few more time
 291                  */
 292                 do {
 293                         err = mmc_send_cmd(mmc, &cmd, NULL);
 294                         if (!err)
 295                                 break;
 296                 } while (retries--);
 297         }
 298 #endif
 299
 300         return err;
 301 }
 302
 303 #ifdef MMC_SUPPORTS_TUNING
 304 static const u8 tuning_blk_pattern_4bit[] = {
 305         0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
 306         0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
 307         0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
 308         0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
 309         0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
 310         0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
 311         0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
 312         0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
 313 };
 314
 315 static const u8 tuning_blk_pattern_8bit[] = {
 316         0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
 317         0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
 318         0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
 319         0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
 320         0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
 321         0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
 322         0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
 323         0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
 324         0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
 325         0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
 326         0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
 327         0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
 328         0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
 329         0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
 330         0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
 331         0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
 332 };
 333
 334 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error)
 335 {
 336         struct mmc_cmd cmd;
 337         struct mmc_data data;
 338         const u8 *tuning_block_pattern;
 339         int size, err;
 340
 341         if (mmc->bus_width == 8) {
 342                 tuning_block_pattern = tuning_blk_pattern_8bit;
 343                 size = sizeof(tuning_blk_pattern_8bit);
 344         } else if (mmc->bus_width == 4) {
 345                 tuning_block_pattern = tuning_blk_pattern_4bit;
 346                 size = sizeof(tuning_blk_pattern_4bit);
 347         } else {
 348                 return -EINVAL;
 349         }
 350
 351         ALLOC_CACHE_ALIGN_BUFFER(u8, data_buf, size);
 352
 353         cmd.cmdidx = opcode;
 354         cmd.cmdarg = 0;
 355         cmd.resp_type = MMC_RSP_R1;
 356
 357         data.dest = (void *)data_buf;
 358         data.blocks = 1;
 359         data.blocksize = size;
 360         data.flags = MMC_DATA_READ;
 361
 362         err = mmc_send_cmd(mmc, &cmd, &data);
 363         if (err)
 364                 return err;
 365
 366         if (memcmp(data_buf, tuning_block_pattern, size))
 367                 return -EIO;
 368
 369         return 0;
 370 }
 371 #endif
 372
 373 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
 374                            lbaint_t blkcnt)
 375 {
 376         struct mmc_cmd cmd;
 377         struct mmc_data data;
 378
 379         if (blkcnt > 1)
 380                 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
 381         else
 382                 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
 383
 384         if (mmc->high_capacity)
 385                 cmd.cmdarg = start;
 386         else
 387                 cmd.cmdarg = start * mmc->read_bl_len;
 388
 389         cmd.resp_type = MMC_RSP_R1;
 390
 391         data.dest = dst;
 392         data.blocks = blkcnt;
 393         data.blocksize = mmc->read_bl_len;
 394         data.flags = MMC_DATA_READ;
 395
 396         if (mmc_send_cmd(mmc, &cmd, &data))
 397                 return 0;
 398
 399         if (blkcnt > 1) {
 400                 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
 401                 cmd.cmdarg = 0;
 402                 cmd.resp_type = MMC_RSP_R1b;
 403                 if (mmc_send_cmd(mmc, &cmd, NULL)) {
 404 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 405                         pr_err("mmc fail to send stop cmd\n");
 406 #endif
 407                         return 0;
 408                 }
 409         }
 410
 411         return blkcnt;
 412 }
 413
 414 #if !CONFIG_IS_ENABLED(DM_MMC)
 415 static int mmc_get_b_max(struct mmc *mmc, void *dst, lbaint_t blkcnt)
 416 {
 417         if (mmc->cfg->ops->get_b_max)
 418                 return mmc->cfg->ops->get_b_max(mmc, dst, blkcnt);
 419         else
 420                 return mmc->cfg->b_max;
 421 }
 422 #endif
 423
 424 #if CONFIG_IS_ENABLED(BLK)
 425 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 426 #else
 427 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 428                 void *dst)
 429 #endif
 430 {
 431 #if CONFIG_IS_ENABLED(BLK)
 432         struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
 433 #endif
 434         int dev_num = block_dev->devnum;
 435         int err;
 436         lbaint_t cur, blocks_todo = blkcnt;
 437         uint b_max;
 438
 439         if (blkcnt == 0)
 440                 return 0;
 441
 442         struct mmc *mmc = find_mmc_device(dev_num);
 443         if (!mmc)
 444                 return 0;
 445
 446         if (CONFIG_IS_ENABLED(MMC_TINY))
 447                 err = mmc_switch_part(mmc, block_dev->hwpart);
 448         else
 449                 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
 450
 451         if (err < 0)
 452                 return 0;
 453
 454         if ((start + blkcnt) > block_dev->lba) {
 455 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 456                 pr_err("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
 457                        start + blkcnt, block_dev->lba);
 458 #endif
 459                 return 0;
 460         }
 461
 462         if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
 463                 pr_debug("%s: Failed to set blocklen\n", __func__);
 464                 return 0;
 465         }
 466
 467         b_max = mmc_get_b_max(mmc, dst, blkcnt);
 468
 469         do {
 470                 cur = (blocks_todo > b_max) ? b_max : blocks_todo;
 471                 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 472                         pr_debug("%s: Failed to read blocks\n", __func__);
 473                         return 0;
 474                 }
 475                 blocks_todo -= cur;
 476                 start += cur;
 477                 dst += cur * mmc->read_bl_len;
 478         } while (blocks_todo > 0);
 479
 480         return blkcnt;
 481 }
 482
 483 static int mmc_go_idle(struct mmc *mmc)
 484 {
 485         struct mmc_cmd cmd;
 486         int err;
 487
 488         udelay(1000);
 489
 490         cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
 491         cmd.cmdarg = 0;
 492         cmd.resp_type = MMC_RSP_NONE;
 493
 494         err = mmc_send_cmd(mmc, &cmd, NULL);
 495
 496         if (err)
 497                 return err;
 498
 499         udelay(2000);
 500
 501         return 0;
 502 }
 503
 504 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 505 static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
 506 {
 507         struct mmc_cmd cmd;
 508         int err = 0;
 509
 510         /*
 511          * Send CMD11 only if the request is to switch the card to
 512          * 1.8V signalling.
 513          */
 514         if (signal_voltage == MMC_SIGNAL_VOLTAGE_330)
 515                 return mmc_set_signal_voltage(mmc, signal_voltage);
 516
 517         cmd.cmdidx = SD_CMD_SWITCH_UHS18V;
 518         cmd.cmdarg = 0;
 519         cmd.resp_type = MMC_RSP_R1;
 520
 521         err = mmc_send_cmd(mmc, &cmd, NULL);
 522         if (err)
 523                 return err;
 524
 525         if (!mmc_host_is_spi(mmc) && (cmd.response[0] & MMC_STATUS_ERROR))
 526                 return -EIO;
 527
 528         /*
 529          * The card should drive cmd and dat[0:3] low immediately
 530          * after the response of cmd11, but wait 100 us to be sure
 531          */
 532         err = mmc_wait_dat0(mmc, 0, 100);
 533         if (err == -ENOSYS)
 534                 udelay(100);
 535         else if (err)
 536                 return -ETIMEDOUT;
 537
 538         /*
 539          * During a signal voltage level switch, the clock must be gated
 540          * for 5 ms according to the SD spec
 541          */
 542         mmc_set_clock(mmc, mmc->clock, MMC_CLK_DISABLE);
 543
 544         err = mmc_set_signal_voltage(mmc, signal_voltage);
 545         if (err)
 546                 return err;
 547
 548         /* Keep clock gated for at least 10 ms, though spec only says 5 ms */
 549         mdelay(10);
 550         mmc_set_clock(mmc, mmc->clock, MMC_CLK_ENABLE);
 551
 552         /*
 553          * Failure to switch is indicated by the card holding
 554          * dat[0:3] low. Wait for at least 1 ms according to spec
 555          */
 556         err = mmc_wait_dat0(mmc, 1, 1000);
 557         if (err == -ENOSYS)
 558                 udelay(1000);
 559         else if (err)
 560                 return -ETIMEDOUT;
 561
 562         return 0;
 563 }
 564 #endif
 565
 566 static int sd_send_op_cond(struct mmc *mmc, bool uhs_en)
 567 {
 568         int timeout = 1000;
 569         int err;
 570         struct mmc_cmd cmd;
 571
 572         while (1) {
 573                 cmd.cmdidx = MMC_CMD_APP_CMD;
 574                 cmd.resp_type = MMC_RSP_R1;
 575                 cmd.cmdarg = 0;
 576
 577                 err = mmc_send_cmd(mmc, &cmd, NULL);
 578
 579                 if (err)
 580                         return err;
 581
 582                 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
 583                 cmd.resp_type = MMC_RSP_R3;
 584
 585                 /*
 586                  * Most cards do not answer if some reserved bits
 587                  * in the ocr are set. However, Some controller
 588                  * can set bit 7 (reserved for low voltages), but
 589                  * how to manage low voltages SD card is not yet
 590                  * specified.
 591                  */
 592                 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
 593                         (mmc->cfg->voltages & 0xff8000);
 594
 595                 if (mmc->version == SD_VERSION_2)
 596                         cmd.cmdarg |= OCR_HCS;
 597
 598                 if (uhs_en)
 599                         cmd.cmdarg |= OCR_S18R;
 600
 601                 err = mmc_send_cmd(mmc, &cmd, NULL);
 602
 603                 if (err)
 604                         return err;
 605
 606                 if (cmd.response[0] & OCR_BUSY)
 607                         break;
 608
 609                 if (timeout-- <= 0)
 610                         return -EOPNOTSUPP;
 611
 612                 udelay(1000);
 613         }
 614
 615         if (mmc->version != SD_VERSION_2)
 616                 mmc->version = SD_VERSION_1_0;
 617
 618         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 619                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 620                 cmd.resp_type = MMC_RSP_R3;
 621                 cmd.cmdarg = 0;
 622
 623                 err = mmc_send_cmd(mmc, &cmd, NULL);
 624
 625                 if (err)
 626                         return err;
 627         }
 628
 629         mmc->ocr = cmd.response[0];
 630
 631 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 632         if (uhs_en && !(mmc_host_is_spi(mmc)) && (cmd.response[0] & 0x41000000)
 633             == 0x41000000) {
 634                 err = mmc_switch_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
 635                 if (err)
 636                         return err;
 637         }
 638 #endif
 639
 640         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 641         mmc->rca = 0;
 642
 643         return 0;
 644 }
 645
 646 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 647 {
 648         struct mmc_cmd cmd;
 649         int err;
 650
 651         cmd.cmdidx = MMC_CMD_SEND_OP_COND;
 652         cmd.resp_type = MMC_RSP_R3;
 653         cmd.cmdarg = 0;
 654         if (use_arg && !mmc_host_is_spi(mmc))
 655                 cmd.cmdarg = OCR_HCS |
 656                         (mmc->cfg->voltages &
 657                         (mmc->ocr & OCR_VOLTAGE_MASK)) |
 658                         (mmc->ocr & OCR_ACCESS_MODE);
 659
 660         err = mmc_send_cmd(mmc, &cmd, NULL);
 661         if (err)
 662                 return err;
 663         mmc->ocr = cmd.response[0];
 664         return 0;
 665 }
 666
 667 static int mmc_send_op_cond(struct mmc *mmc)
 668 {
 669         int err, i;
 670
 671         /* Some cards seem to need this */
 672         mmc_go_idle(mmc);
 673
 674         /* Asking to the card its capabilities */
 675         for (i = 0; i < 2; i++) {
 676                 err = mmc_send_op_cond_iter(mmc, i != 0);
 677                 if (err)
 678                         return err;
 679
 680                 /* exit if not busy (flag seems to be inverted) */
 681                 if (mmc->ocr & OCR_BUSY)
 682                         break;
 683         }
 684         mmc->op_cond_pending = 1;
 685         return 0;
 686 }
 687
 688 static int mmc_complete_op_cond(struct mmc *mmc)
 689 {
 690         struct mmc_cmd cmd;
 691         int timeout = 1000;
 692         ulong start;
 693         int err;
 694
 695         mmc->op_cond_pending = 0;
 696         if (!(mmc->ocr & OCR_BUSY)) {
 697                 /* Some cards seem to need this */
 698                 mmc_go_idle(mmc);
 699
 700                 start = get_timer(0);
 701                 while (1) {
 702                         err = mmc_send_op_cond_iter(mmc, 1);
 703                         if (err)
 704                                 return err;
 705                         if (mmc->ocr & OCR_BUSY)
 706                                 break;
 707                         if (get_timer(start) > timeout)
 708                                 return -EOPNOTSUPP;
 709                         udelay(100);
 710                 }
 711         }
 712
 713         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 714                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 715                 cmd.resp_type = MMC_RSP_R3;
 716                 cmd.cmdarg = 0;
 717
 718                 err = mmc_send_cmd(mmc, &cmd, NULL);
 719
 720                 if (err)
 721                         return err;
 722
 723                 mmc->ocr = cmd.response[0];
 724         }
 725
 726         mmc->version = MMC_VERSION_UNKNOWN;
 727
 728         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 729         mmc->rca = 1;
 730
 731         return 0;
 732 }
 733
 734
 735 int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 736 {
 737         struct mmc_cmd cmd;
 738         struct mmc_data data;
 739         int err;
 740
 741         /* Get the Card Status Register */
 742         cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 743         cmd.resp_type = MMC_RSP_R1;
 744         cmd.cmdarg = 0;
 745
 746         data.dest = (char *)ext_csd;
 747         data.blocks = 1;
 748         data.blocksize = MMC_MAX_BLOCK_LEN;
 749         data.flags = MMC_DATA_READ;
 750
 751         err = mmc_send_cmd(mmc, &cmd, &data);
 752
 753         return err;
 754 }
 755
 756 static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value,
 757                         bool send_status)
 758 {
 759         unsigned int status, start;
 760         struct mmc_cmd cmd;
 761         int timeout_ms = DEFAULT_CMD6_TIMEOUT_MS;
 762         bool is_part_switch = (set == EXT_CSD_CMD_SET_NORMAL) &&
 763                               (index == EXT_CSD_PART_CONF);
 764         int retries = 3;
 765         int ret;
 766
 767         if (mmc->gen_cmd6_time)
 768                 timeout_ms = mmc->gen_cmd6_time * 10;
 769
 770         if (is_part_switch  && mmc->part_switch_time)
 771                 timeout_ms = mmc->part_switch_time * 10;
 772
 773         cmd.cmdidx = MMC_CMD_SWITCH;
 774         cmd.resp_type = MMC_RSP_R1b;
 775         cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
 776                                  (index << 16) |
 777                                  (value << 8);
 778
 779         do {
 780                 ret = mmc_send_cmd(mmc, &cmd, NULL);
 781         } while (ret && retries-- > 0);
 782
 783         if (ret)
 784                 return ret;
 785
 786         start = get_timer(0);
 787
 788         /* poll dat0 for rdy/buys status */
 789         ret = mmc_wait_dat0(mmc, 1, timeout_ms * 1000);
 790         if (ret && ret != -ENOSYS)
 791                 return ret;
 792
 793         /*
 794          * In cases when not allowed to poll by using CMD13 or because we aren't
 795          * capable of polling by using mmc_wait_dat0, then rely on waiting the
 796          * stated timeout to be sufficient.
 797          */
 798         if (ret == -ENOSYS && !send_status)
 799                 mdelay(timeout_ms);
 800
 801         /* Finally wait until the card is ready or indicates a failure
 802          * to switch. It doesn't hurt to use CMD13 here even if send_status
 803          * is false, because by now (after 'timeout_ms' ms) the bus should be
 804          * reliable.
 805          */
 806         do {
 807                 ret = mmc_send_status(mmc, &status);
 808
 809                 if (!ret && (status & MMC_STATUS_SWITCH_ERROR)) {
 810                         pr_debug("switch failed %d/%d/0x%x !\n", set, index,
 811                                  value);
 812                         return -EIO;
 813                 }
 814                 if (!ret && (status & MMC_STATUS_RDY_FOR_DATA))
 815                         return 0;
 816                 udelay(100);
 817         } while (get_timer(start) < timeout_ms);
 818
 819         return -ETIMEDOUT;
 820 }
 821
 822 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 823 {
 824         return __mmc_switch(mmc, set, index, value, true);
 825 }
 826
 827 int mmc_boot_wp(struct mmc *mmc)
 828 {
 829         return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_WP, 1);
 830 }
 831
 832 #if !CONFIG_IS_ENABLED(MMC_TINY)
 833 static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode,
 834                               bool hsdowngrade)
 835 {
 836         int err;
 837         int speed_bits;
 838
 839         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
 840
 841         switch (mode) {
 842         case MMC_HS:
 843         case MMC_HS_52:
 844         case MMC_DDR_52:
 845                 speed_bits = EXT_CSD_TIMING_HS;
 846                 break;
 847 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 848         case MMC_HS_200:
 849                 speed_bits = EXT_CSD_TIMING_HS200;
 850                 break;
 851 #endif
 852 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
 853         case MMC_HS_400:
 854                 speed_bits = EXT_CSD_TIMING_HS400;
 855                 break;
 856 #endif
 857 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
 858         case MMC_HS_400_ES:
 859                 speed_bits = EXT_CSD_TIMING_HS400;
 860                 break;
 861 #endif
 862         case MMC_LEGACY:
 863                 speed_bits = EXT_CSD_TIMING_LEGACY;
 864                 break;
 865         default:
 866                 return -EINVAL;
 867         }
 868
 869         err = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
 870                            speed_bits, !hsdowngrade);
 871         if (err)
 872                 return err;
 873
 874 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
 875     CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
 876         /*
 877          * In case the eMMC is in HS200/HS400 mode and we are downgrading
 878          * to HS mode, the card clock are still running much faster than
 879          * the supported HS mode clock, so we can not reliably read out
 880          * Extended CSD. Reconfigure the controller to run at HS mode.
 881          */
 882         if (hsdowngrade) {
 883                 mmc_select_mode(mmc, MMC_HS);
 884                 mmc_set_clock(mmc, mmc_mode2freq(mmc, MMC_HS), false);
 885         }
 886 #endif
 887
 888         if ((mode == MMC_HS) || (mode == MMC_HS_52)) {
 889                 /* Now check to see that it worked */
 890                 err = mmc_send_ext_csd(mmc, test_csd);
 891                 if (err)
 892                         return err;
 893
 894                 /* No high-speed support */
 895                 if (!test_csd[EXT_CSD_HS_TIMING])
 896                         return -ENOTSUPP;
 897         }
 898
 899         return 0;
 900 }
 901
 902 static int mmc_get_capabilities(struct mmc *mmc)
 903 {
 904         u8 *ext_csd = mmc->ext_csd;
 905         char cardtype;
 906
 907         mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
 908
 909         if (mmc_host_is_spi(mmc))
 910                 return 0;
 911
 912         /* Only version 4 supports high-speed */
 913         if (mmc->version < MMC_VERSION_4)
 914                 return 0;
 915
 916         if (!ext_csd) {
 917                 pr_err("No ext_csd found!\n"); /* this should enver happen */
 918                 return -ENOTSUPP;
 919         }
 920
 921         mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
 922
 923         cardtype = ext_csd[EXT_CSD_CARD_TYPE];
 924         mmc->cardtype = cardtype;
 925
 926 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 927         if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
 928                         EXT_CSD_CARD_TYPE_HS200_1_8V)) {
 929                 mmc->card_caps |= MMC_MODE_HS200;
 930         }
 931 #endif
 932 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) || \
 933         CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
 934         if (cardtype & (EXT_CSD_CARD_TYPE_HS400_1_2V |
 935                         EXT_CSD_CARD_TYPE_HS400_1_8V)) {
 936                 mmc->card_caps |= MMC_MODE_HS400;
 937         }
 938 #endif
 939         if (cardtype & EXT_CSD_CARD_TYPE_52) {
 940                 if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
 941                         mmc->card_caps |= MMC_MODE_DDR_52MHz;
 942                 mmc->card_caps |= MMC_MODE_HS_52MHz;
 943         }
 944         if (cardtype & EXT_CSD_CARD_TYPE_26)
 945                 mmc->card_caps |= MMC_MODE_HS;
 946
 947 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
 948         if (ext_csd[EXT_CSD_STROBE_SUPPORT] &&
 949             (mmc->card_caps & MMC_MODE_HS400)) {
 950                 mmc->card_caps |= MMC_MODE_HS400_ES;
 951         }
 952 #endif
 953
 954         return 0;
 955 }
 956 #endif
 957
 958 static int mmc_set_capacity(struct mmc *mmc, int part_num)
 959 {
 960         switch (part_num) {
 961         case 0:
 962                 mmc->capacity = mmc->capacity_user;
 963                 break;
 964         case 1:
 965         case 2:
 966                 mmc->capacity = mmc->capacity_boot;
 967                 break;
 968         case 3:
 969                 mmc->capacity = mmc->capacity_rpmb;
 970                 break;
 971         case 4:
 972         case 5:
 973         case 6:
 974         case 7:
 975                 mmc->capacity = mmc->capacity_gp[part_num - 4];
 976                 break;
 977         default:
 978                 return -1;
 979         }
 980
 981         mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
 982
 983         return 0;
 984 }
 985
 986 int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
 987 {
 988         int ret;
 989         int retry = 3;
 990
 991         do {
 992                 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 993                                  EXT_CSD_PART_CONF,
 994                                  (mmc->part_config & ~PART_ACCESS_MASK)
 995                                  | (part_num & PART_ACCESS_MASK));
 996         } while (ret && retry--);
 997
 998         /*
 999          * Set the capacity if the switch succeeded or was intended
1000          * to return to representing the raw device.
1001          */
1002         if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
1003                 ret = mmc_set_capacity(mmc, part_num);
1004                 mmc_get_blk_desc(mmc)->hwpart = part_num;
1005         }
1006
1007         return ret;
1008 }
1009
1010 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
1011 int mmc_hwpart_config(struct mmc *mmc,
1012                       const struct mmc_hwpart_conf *conf,
1013                       enum mmc_hwpart_conf_mode mode)
1014 {
1015         u8 part_attrs = 0;
1016         u32 enh_size_mult;
1017         u32 enh_start_addr;
1018         u32 gp_size_mult[4];
1019         u32 max_enh_size_mult;
1020         u32 tot_enh_size_mult = 0;
1021         u8 wr_rel_set;
1022         int i, pidx, err;
1023         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1024
1025         if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
1026                 return -EINVAL;
1027
1028         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
1029                 pr_err("eMMC >= 4.4 required for enhanced user data area\n");
1030                 return -EMEDIUMTYPE;
1031         }
1032
1033         if (!(mmc->part_support & PART_SUPPORT)) {
1034                 pr_err("Card does not support partitioning\n");
1035                 return -EMEDIUMTYPE;
1036         }
1037
1038         if (!mmc->hc_wp_grp_size) {
1039                 pr_err("Card does not define HC WP group size\n");
1040                 return -EMEDIUMTYPE;
1041         }
1042
1043         /* check partition alignment and total enhanced size */
1044         if (conf->user.enh_size) {
1045                 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
1046                     conf->user.enh_start % mmc->hc_wp_grp_size) {
1047                         pr_err("User data enhanced area not HC WP group "
1048                                "size aligned\n");
1049                         return -EINVAL;
1050                 }
1051                 part_attrs |= EXT_CSD_ENH_USR;
1052                 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
1053                 if (mmc->high_capacity) {
1054                         enh_start_addr = conf->user.enh_start;
1055                 } else {
1056                         enh_start_addr = (conf->user.enh_start << 9);
1057                 }
1058         } else {
1059                 enh_size_mult = 0;
1060                 enh_start_addr = 0;
1061         }
1062         tot_enh_size_mult += enh_size_mult;
1063
1064         for (pidx = 0; pidx < 4; pidx++) {
1065                 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
1066                         pr_err("GP%i partition not HC WP group size "
1067                                "aligned\n", pidx+1);
1068                         return -EINVAL;
1069                 }
1070                 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
1071                 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
1072                         part_attrs |= EXT_CSD_ENH_GP(pidx);
1073                         tot_enh_size_mult += gp_size_mult[pidx];
1074                 }
1075         }
1076
1077         if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
1078                 pr_err("Card does not support enhanced attribute\n");
1079                 return -EMEDIUMTYPE;
1080         }
1081
1082         err = mmc_send_ext_csd(mmc, ext_csd);
1083         if (err)
1084                 return err;
1085
1086         max_enh_size_mult =
1087                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
1088                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
1089                 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
1090         if (tot_enh_size_mult > max_enh_size_mult) {
1091                 pr_err("Total enhanced size exceeds maximum (%u > %u)\n",
1092                        tot_enh_size_mult, max_enh_size_mult);
1093                 return -EMEDIUMTYPE;
1094         }
1095
1096         /* The default value of EXT_CSD_WR_REL_SET is device
1097          * dependent, the values can only be changed if the
1098          * EXT_CSD_HS_CTRL_REL bit is set. The values can be
1099          * changed only once and before partitioning is completed. */
1100         wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1101         if (conf->user.wr_rel_change) {
1102                 if (conf->user.wr_rel_set)
1103                         wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
1104                 else
1105                         wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
1106         }
1107         for (pidx = 0; pidx < 4; pidx++) {
1108                 if (conf->gp_part[pidx].wr_rel_change) {
1109                         if (conf->gp_part[pidx].wr_rel_set)
1110                                 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
1111                         else
1112                                 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
1113                 }
1114         }
1115
1116         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
1117             !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
1118                 puts("Card does not support host controlled partition write "
1119                      "reliability settings\n");
1120                 return -EMEDIUMTYPE;
1121         }
1122
1123         if (ext_csd[EXT_CSD_PARTITION_SETTING] &
1124             EXT_CSD_PARTITION_SETTING_COMPLETED) {
1125                 pr_err("Card already partitioned\n");
1126                 return -EPERM;
1127         }
1128
1129         if (mode == MMC_HWPART_CONF_CHECK)
1130                 return 0;
1131
1132         /* Partitioning requires high-capacity size definitions */
1133         if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
1134                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1135                                  EXT_CSD_ERASE_GROUP_DEF, 1);
1136
1137                 if (err)
1138                         return err;
1139
1140                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1141
1142 #if CONFIG_IS_ENABLED(MMC_WRITE)
1143                 /* update erase group size to be high-capacity */
1144                 mmc->erase_grp_size =
1145                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1146 #endif
1147
1148         }
1149
1150         /* all OK, write the configuration */
1151         for (i = 0; i < 4; i++) {
1152                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1153                                  EXT_CSD_ENH_START_ADDR+i,
1154                                  (enh_start_addr >> (i*8)) & 0xFF);
1155                 if (err)
1156                         return err;
1157         }
1158         for (i = 0; i < 3; i++) {
1159                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1160                                  EXT_CSD_ENH_SIZE_MULT+i,
1161                                  (enh_size_mult >> (i*8)) & 0xFF);
1162                 if (err)
1163                         return err;
1164         }
1165         for (pidx = 0; pidx < 4; pidx++) {
1166                 for (i = 0; i < 3; i++) {
1167                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1168                                          EXT_CSD_GP_SIZE_MULT+pidx*3+i,
1169                                          (gp_size_mult[pidx] >> (i*8)) & 0xFF);
1170                         if (err)
1171                                 return err;
1172                 }
1173         }
1174         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1175                          EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
1176         if (err)
1177                 return err;
1178
1179         if (mode == MMC_HWPART_CONF_SET)
1180                 return 0;
1181
1182         /* The WR_REL_SET is a write-once register but shall be
1183          * written before setting PART_SETTING_COMPLETED. As it is
1184          * write-once we can only write it when completing the
1185          * partitioning. */
1186         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
1187                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1188                                  EXT_CSD_WR_REL_SET, wr_rel_set);
1189                 if (err)
1190                         return err;
1191         }
1192
1193         /* Setting PART_SETTING_COMPLETED confirms the partition
1194          * configuration but it only becomes effective after power
1195          * cycle, so we do not adjust the partition related settings
1196          * in the mmc struct. */
1197
1198         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1199                          EXT_CSD_PARTITION_SETTING,
1200                          EXT_CSD_PARTITION_SETTING_COMPLETED);
1201         if (err)
1202                 return err;
1203
1204         return 0;
1205 }
1206 #endif
1207
1208 #if !CONFIG_IS_ENABLED(DM_MMC)
1209 int mmc_getcd(struct mmc *mmc)
1210 {
1211         int cd;
1212
1213         cd = board_mmc_getcd(mmc);
1214
1215         if (cd < 0) {
1216                 if (mmc->cfg->ops->getcd)
1217                         cd = mmc->cfg->ops->getcd(mmc);
1218                 else
1219                         cd = 1;
1220         }
1221
1222         return cd;
1223 }
1224 #endif
1225
1226 #if !CONFIG_IS_ENABLED(MMC_TINY)
1227 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
1228 {
1229         struct mmc_cmd cmd;
1230         struct mmc_data data;
1231
1232         /* Switch the frequency */
1233         cmd.cmdidx = SD_CMD_SWITCH_FUNC;
1234         cmd.resp_type = MMC_RSP_R1;
1235         cmd.cmdarg = (mode << 31) | 0xffffff;
1236         cmd.cmdarg &= ~(0xf << (group * 4));
1237         cmd.cmdarg |= value << (group * 4);
1238
1239         data.dest = (char *)resp;
1240         data.blocksize = 64;
1241         data.blocks = 1;
1242         data.flags = MMC_DATA_READ;
1243
1244         return mmc_send_cmd(mmc, &cmd, &data);
1245 }
1246
1247 static int sd_get_capabilities(struct mmc *mmc)
1248 {
1249         int err;
1250         struct mmc_cmd cmd;
1251         ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
1252         ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
1253         struct mmc_data data;
1254         int timeout;
1255 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1256         u32 sd3_bus_mode;
1257 #endif
1258
1259         mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
1260
1261         if (mmc_host_is_spi(mmc))
1262                 return 0;
1263
1264         /* Read the SCR to find out if this card supports higher speeds */
1265         cmd.cmdidx = MMC_CMD_APP_CMD;
1266         cmd.resp_type = MMC_RSP_R1;
1267         cmd.cmdarg = mmc->rca << 16;
1268
1269         err = mmc_send_cmd(mmc, &cmd, NULL);
1270
1271         if (err)
1272                 return err;
1273
1274         cmd.cmdidx = SD_CMD_APP_SEND_SCR;
1275         cmd.resp_type = MMC_RSP_R1;
1276         cmd.cmdarg = 0;
1277
1278         timeout = 3;
1279
1280 retry_scr:
1281         data.dest = (char *)scr;
1282         data.blocksize = 8;
1283         data.blocks = 1;
1284         data.flags = MMC_DATA_READ;
1285
1286         err = mmc_send_cmd(mmc, &cmd, &data);
1287
1288         if (err) {
1289                 if (timeout--)
1290                         goto retry_scr;
1291
1292                 return err;
1293         }
1294
1295         mmc->scr[0] = __be32_to_cpu(scr[0]);
1296         mmc->scr[1] = __be32_to_cpu(scr[1]);
1297
1298         switch ((mmc->scr[0] >> 24) & 0xf) {
1299         case 0:
1300                 mmc->version = SD_VERSION_1_0;
1301                 break;
1302         case 1:
1303                 mmc->version = SD_VERSION_1_10;
1304                 break;
1305         case 2:
1306                 mmc->version = SD_VERSION_2;
1307                 if ((mmc->scr[0] >> 15) & 0x1)
1308                         mmc->version = SD_VERSION_3;
1309                 break;
1310         default:
1311                 mmc->version = SD_VERSION_1_0;
1312                 break;
1313         }
1314
1315         if (mmc->scr[0] & SD_DATA_4BIT)
1316                 mmc->card_caps |= MMC_MODE_4BIT;
1317
1318         /* Version 1.0 doesn't support switching */
1319         if (mmc->version == SD_VERSION_1_0)
1320                 return 0;
1321
1322         timeout = 4;
1323         while (timeout--) {
1324                 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
1325                                 (u8 *)switch_status);
1326
1327                 if (err)
1328                         return err;
1329
1330                 /* The high-speed function is busy.  Try again */
1331                 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
1332                         break;
1333         }
1334
1335         /* If high-speed isn't supported, we return */
1336         if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)
1337                 mmc->card_caps |= MMC_CAP(SD_HS);
1338
1339 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1340         /* Version before 3.0 don't support UHS modes */
1341         if (mmc->version < SD_VERSION_3)
1342                 return 0;
1343
1344         sd3_bus_mode = __be32_to_cpu(switch_status[3]) >> 16 & 0x1f;
1345         if (sd3_bus_mode & SD_MODE_UHS_SDR104)
1346                 mmc->card_caps |= MMC_CAP(UHS_SDR104);
1347         if (sd3_bus_mode & SD_MODE_UHS_SDR50)
1348                 mmc->card_caps |= MMC_CAP(UHS_SDR50);
1349         if (sd3_bus_mode & SD_MODE_UHS_SDR25)
1350                 mmc->card_caps |= MMC_CAP(UHS_SDR25);
1351         if (sd3_bus_mode & SD_MODE_UHS_SDR12)
1352                 mmc->card_caps |= MMC_CAP(UHS_SDR12);
1353         if (sd3_bus_mode & SD_MODE_UHS_DDR50)
1354                 mmc->card_caps |= MMC_CAP(UHS_DDR50);
1355 #endif
1356
1357         return 0;
1358 }
1359
1360 static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode)
1361 {
1362         int err;
1363
1364         ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
1365         int speed;
1366
1367         /* SD version 1.00 and 1.01 does not support CMD 6 */
1368         if (mmc->version == SD_VERSION_1_0)
1369                 return 0;
1370
1371         switch (mode) {
1372         case MMC_LEGACY:
1373                 speed = UHS_SDR12_BUS_SPEED;
1374                 break;
1375         case SD_HS:
1376                 speed = HIGH_SPEED_BUS_SPEED;
1377                 break;
1378 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1379         case UHS_SDR12:
1380                 speed = UHS_SDR12_BUS_SPEED;
1381                 break;
1382         case UHS_SDR25:
1383                 speed = UHS_SDR25_BUS_SPEED;
1384                 break;
1385         case UHS_SDR50:
1386                 speed = UHS_SDR50_BUS_SPEED;
1387                 break;
1388         case UHS_DDR50:
1389                 speed = UHS_DDR50_BUS_SPEED;
1390                 break;
1391         case UHS_SDR104:
1392                 speed = UHS_SDR104_BUS_SPEED;
1393                 break;
1394 #endif
1395         default:
1396                 return -EINVAL;
1397         }
1398
1399         err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, speed, (u8 *)switch_status);
1400         if (err)
1401                 return err;
1402
1403         if (((__be32_to_cpu(switch_status[4]) >> 24) & 0xF) != speed)
1404                 return -ENOTSUPP;
1405
1406         return 0;
1407 }
1408
1409 static int sd_select_bus_width(struct mmc *mmc, int w)
1410 {
1411         int err;
1412         struct mmc_cmd cmd;
1413
1414         if ((w != 4) && (w != 1))
1415                 return -EINVAL;
1416
1417         cmd.cmdidx = MMC_CMD_APP_CMD;
1418         cmd.resp_type = MMC_RSP_R1;
1419         cmd.cmdarg = mmc->rca << 16;
1420
1421         err = mmc_send_cmd(mmc, &cmd, NULL);
1422         if (err)
1423                 return err;
1424
1425         cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1426         cmd.resp_type = MMC_RSP_R1;
1427         if (w == 4)
1428                 cmd.cmdarg = 2;
1429         else if (w == 1)
1430                 cmd.cmdarg = 0;
1431         err = mmc_send_cmd(mmc, &cmd, NULL);
1432         if (err)
1433                 return err;
1434
1435         return 0;
1436 }
1437 #endif
1438
1439 #if CONFIG_IS_ENABLED(MMC_WRITE)
1440 static int sd_read_ssr(struct mmc *mmc)
1441 {
1442         static const unsigned int sd_au_size[] = {
1443                 0,              SZ_16K / 512,           SZ_32K / 512,
1444                 SZ_64K / 512,   SZ_128K / 512,          SZ_256K / 512,
1445                 SZ_512K / 512,  SZ_1M / 512,            SZ_2M / 512,
1446                 SZ_4M / 512,    SZ_8M / 512,            (SZ_8M + SZ_4M) / 512,
1447                 SZ_16M / 512,   (SZ_16M + SZ_8M) / 512, SZ_32M / 512,
1448                 SZ_64M / 512,
1449         };
1450         int err, i;
1451         struct mmc_cmd cmd;
1452         ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
1453         struct mmc_data data;
1454         int timeout = 3;
1455         unsigned int au, eo, et, es;
1456
1457         cmd.cmdidx = MMC_CMD_APP_CMD;
1458         cmd.resp_type = MMC_RSP_R1;
1459         cmd.cmdarg = mmc->rca << 16;
1460
1461         err = mmc_send_cmd(mmc, &cmd, NULL);
1462 #ifdef CONFIG_MMC_QUIRKS
1463         if (err && (mmc->quirks & MMC_QUIRK_RETRY_APP_CMD)) {
1464                 int retries = 4;
1465                 /*
1466                  * It has been seen that APP_CMD may fail on the first
1467                  * attempt, let's try a few more times
1468                  */
1469                 do {
1470                         err = mmc_send_cmd(mmc, &cmd, NULL);
1471                         if (!err)
1472                                 break;
1473                 } while (retries--);
1474         }
1475 #endif
1476         if (err)
1477                 return err;
1478
1479         cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1480         cmd.resp_type = MMC_RSP_R1;
1481         cmd.cmdarg = 0;
1482
1483 retry_ssr:
1484         data.dest = (char *)ssr;
1485         data.blocksize = 64;
1486         data.blocks = 1;
1487         data.flags = MMC_DATA_READ;
1488
1489         err = mmc_send_cmd(mmc, &cmd, &data);
1490         if (err) {
1491                 if (timeout--)
1492                         goto retry_ssr;
1493
1494                 return err;
1495         }
1496
1497         for (i = 0; i < 16; i++)
1498                 ssr[i] = be32_to_cpu(ssr[i]);
1499
1500         au = (ssr[2] >> 12) & 0xF;
1501         if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1502                 mmc->ssr.au = sd_au_size[au];
1503                 es = (ssr[3] >> 24) & 0xFF;
1504                 es |= (ssr[2] & 0xFF) << 8;
1505                 et = (ssr[3] >> 18) & 0x3F;
1506                 if (es && et) {
1507                         eo = (ssr[3] >> 16) & 0x3;
1508                         mmc->ssr.erase_timeout = (et * 1000) / es;
1509                         mmc->ssr.erase_offset = eo * 1000;
1510                 }
1511         } else {
1512                 pr_debug("Invalid Allocation Unit Size.\n");
1513         }
1514
1515         return 0;
1516 }
1517 #endif
1518 /* frequency bases */
1519 /* divided by 10 to be nice to platforms without floating point */
1520 static const int fbase[] = {
1521         10000,
1522         100000,
1523         1000000,
1524         10000000,
1525 };
1526
1527 /* Multiplier values for TRAN_SPEED.  Multiplied by 10 to be nice
1528  * to platforms without floating point.
1529  */
1530 static const u8 multipliers[] = {
1531         0,      /* reserved */
1532         10,
1533         12,
1534         13,
1535         15,
1536         20,
1537         25,
1538         30,
1539         35,
1540         40,
1541         45,
1542         50,
1543         55,
1544         60,
1545         70,
1546         80,
1547 };
1548
1549 static inline int bus_width(uint cap)
1550 {
1551         if (cap == MMC_MODE_8BIT)
1552                 return 8;
1553         if (cap == MMC_MODE_4BIT)
1554                 return 4;
1555         if (cap == MMC_MODE_1BIT)
1556                 return 1;
1557         pr_warn("invalid bus witdh capability 0x%x\n", cap);
1558         return 0;
1559 }
1560
1561 #if !CONFIG_IS_ENABLED(DM_MMC)
1562 #ifdef MMC_SUPPORTS_TUNING
1563 static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
1564 {
1565         return -ENOTSUPP;
1566 }
1567 #endif
1568
1569 static int mmc_set_ios(struct mmc *mmc)
1570 {
1571         int ret = 0;
1572
1573         if (mmc->cfg->ops->set_ios)
1574                 ret = mmc->cfg->ops->set_ios(mmc);
1575
1576         return ret;
1577 }
1578
1579 static int mmc_host_power_cycle(struct mmc *mmc)
1580 {
1581         int ret = 0;
1582
1583         if (mmc->cfg->ops->host_power_cycle)
1584                 ret = mmc->cfg->ops->host_power_cycle(mmc);
1585
1586         return ret;
1587 }
1588 #endif
1589
1590 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
1591 {
1592         if (!disable) {
1593                 if (clock > mmc->cfg->f_max)
1594                         clock = mmc->cfg->f_max;
1595
1596                 if (clock < mmc->cfg->f_min)
1597                         clock = mmc->cfg->f_min;
1598         }
1599
1600         mmc->clock = clock;
1601         mmc->clk_disable = disable;
1602
1603         debug("clock is %s (%dHz)\n", disable ? "disabled" : "enabled", clock);
1604
1605         return mmc_set_ios(mmc);
1606 }
1607
1608 static int mmc_set_bus_width(struct mmc *mmc, uint width)
1609 {
1610         mmc->bus_width = width;
1611
1612         return mmc_set_ios(mmc);
1613 }
1614
1615 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
1616 /*
1617  * helper function to display the capabilities in a human
1618  * friendly manner. The capabilities include bus width and
1619  * supported modes.
1620  */
1621 void mmc_dump_capabilities(const char *text, uint caps)
1622 {
1623         enum bus_mode mode;
1624
1625         pr_debug("%s: widths [", text);
1626         if (caps & MMC_MODE_8BIT)
1627                 pr_debug("8, ");
1628         if (caps & MMC_MODE_4BIT)
1629                 pr_debug("4, ");
1630         if (caps & MMC_MODE_1BIT)
1631                 pr_debug("1, ");
1632         pr_debug("\b\b] modes [");
1633         for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
1634                 if (MMC_CAP(mode) & caps)
1635                         pr_debug("%s, ", mmc_mode_name(mode));
1636         pr_debug("\b\b]\n");
1637 }
1638 #endif
1639
1640 struct mode_width_tuning {
1641         enum bus_mode mode;
1642         uint widths;
1643 #ifdef MMC_SUPPORTS_TUNING
1644         uint tuning;
1645 #endif
1646 };
1647
1648 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1649 int mmc_voltage_to_mv(enum mmc_voltage voltage)
1650 {
1651         switch (voltage) {
1652         case MMC_SIGNAL_VOLTAGE_000: return 0;
1653         case MMC_SIGNAL_VOLTAGE_330: return 3300;
1654         case MMC_SIGNAL_VOLTAGE_180: return 1800;
1655         case MMC_SIGNAL_VOLTAGE_120: return 1200;
1656         }
1657         return -EINVAL;
1658 }
1659
1660 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1661 {
1662         int err;
1663
1664         if (mmc->signal_voltage == signal_voltage)
1665                 return 0;
1666
1667         mmc->signal_voltage = signal_voltage;
1668         err = mmc_set_ios(mmc);
1669         if (err)
1670                 pr_debug("unable to set voltage (err %d)\n", err);
1671
1672         return err;
1673 }
1674 #else
1675 static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1676 {
1677         return 0;
1678 }
1679 #endif
1680
1681 #if !CONFIG_IS_ENABLED(MMC_TINY)
1682 static const struct mode_width_tuning sd_modes_by_pref[] = {
1683 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1684 #ifdef MMC_SUPPORTS_TUNING
1685         {
1686                 .mode = UHS_SDR104,
1687                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1688                 .tuning = MMC_CMD_SEND_TUNING_BLOCK
1689         },
1690 #endif
1691         {
1692                 .mode = UHS_SDR50,
1693                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1694         },
1695         {
1696                 .mode = UHS_DDR50,
1697                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1698         },
1699         {
1700                 .mode = UHS_SDR25,
1701                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1702         },
1703 #endif
1704         {
1705                 .mode = SD_HS,
1706                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1707         },
1708 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1709         {
1710                 .mode = UHS_SDR12,
1711                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1712         },
1713 #endif
1714         {
1715                 .mode = MMC_LEGACY,
1716                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1717         }
1718 };
1719
1720 #define for_each_sd_mode_by_pref(caps, mwt) \
1721         for (mwt = sd_modes_by_pref;\
1722              mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\
1723              mwt++) \
1724                 if (caps & MMC_CAP(mwt->mode))
1725
1726 static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
1727 {
1728         int err;
1729         uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT};
1730         const struct mode_width_tuning *mwt;
1731 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1732         bool uhs_en = (mmc->ocr & OCR_S18R) ? true : false;
1733 #else
1734         bool uhs_en = false;
1735 #endif
1736         uint caps;
1737
1738 #ifdef DEBUG
1739         mmc_dump_capabilities("sd card", card_caps);
1740         mmc_dump_capabilities("host", mmc->host_caps);
1741 #endif
1742
1743         if (mmc_host_is_spi(mmc)) {
1744                 mmc_set_bus_width(mmc, 1);
1745                 mmc_select_mode(mmc, MMC_LEGACY);
1746                 mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE);
1747                 return 0;
1748         }
1749
1750         /* Restrict card's capabilities by what the host can do */
1751         caps = card_caps & mmc->host_caps;
1752
1753         if (!uhs_en)
1754                 caps &= ~UHS_CAPS;
1755
1756         for_each_sd_mode_by_pref(caps, mwt) {
1757                 uint *w;
1758
1759                 for (w = widths; w < widths + ARRAY_SIZE(widths); w++) {
1760                         if (*w & caps & mwt->widths) {
1761                                 pr_debug("trying mode %s width %d (at %d MHz)\n",
1762                                          mmc_mode_name(mwt->mode),
1763                                          bus_width(*w),
1764                                          mmc_mode2freq(mmc, mwt->mode) / 1000000);
1765
1766                                 /* configure the bus width (card + host) */
1767                                 err = sd_select_bus_width(mmc, bus_width(*w));
1768                                 if (err)
1769                                         goto error;
1770                                 mmc_set_bus_width(mmc, bus_width(*w));
1771
1772                                 /* configure the bus mode (card) */
1773                                 err = sd_set_card_speed(mmc, mwt->mode);
1774                                 if (err)
1775                                         goto error;
1776
1777                                 /* configure the bus mode (host) */
1778                                 mmc_select_mode(mmc, mwt->mode);
1779                                 mmc_set_clock(mmc, mmc->tran_speed,
1780                                                 MMC_CLK_ENABLE);
1781
1782 #ifdef MMC_SUPPORTS_TUNING
1783                                 /* execute tuning if needed */
1784                                 if (mwt->tuning && !mmc_host_is_spi(mmc)) {
1785                                         err = mmc_execute_tuning(mmc,
1786                                                                  mwt->tuning);
1787                                         if (err) {
1788                                                 pr_debug("tuning failed\n");
1789                                                 goto error;
1790                                         }
1791                                 }
1792 #endif
1793
1794 #if CONFIG_IS_ENABLED(MMC_WRITE)
1795                                 err = sd_read_ssr(mmc);
1796                                 if (err)
1797                                         pr_warn("unable to read ssr\n");
1798 #endif
1799                                 if (!err)
1800                                         return 0;
1801
1802 error:
1803                                 /* revert to a safer bus speed */
1804                                 mmc_select_mode(mmc, MMC_LEGACY);
1805                                 mmc_set_clock(mmc, mmc->tran_speed,
1806                                                 MMC_CLK_ENABLE);
1807                         }
1808                 }
1809         }
1810
1811         pr_err("unable to select a mode\n");
1812         return -ENOTSUPP;
1813 }
1814
1815 /*
1816  * read the compare the part of ext csd that is constant.
1817  * This can be used to check that the transfer is working
1818  * as expected.
1819  */
1820 static int mmc_read_and_compare_ext_csd(struct mmc *mmc)
1821 {
1822         int err;
1823         const u8 *ext_csd = mmc->ext_csd;
1824         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1825
1826         if (mmc->version < MMC_VERSION_4)
1827                 return 0;
1828
1829         err = mmc_send_ext_csd(mmc, test_csd);
1830         if (err)
1831                 return err;
1832
1833         /* Only compare read only fields */
1834         if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1835                 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1836             ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1837                 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1838             ext_csd[EXT_CSD_REV]
1839                 == test_csd[EXT_CSD_REV] &&
1840             ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1841                 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1842             memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1843                    &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1844                 return 0;
1845
1846         return -EBADMSG;
1847 }
1848
1849 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1850 static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1851                                   uint32_t allowed_mask)
1852 {
1853         u32 card_mask = 0;
1854
1855         switch (mode) {
1856         case MMC_HS_400_ES:
1857         case MMC_HS_400:
1858         case MMC_HS_200:
1859                 if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_8V |
1860                     EXT_CSD_CARD_TYPE_HS400_1_8V))
1861                         card_mask |= MMC_SIGNAL_VOLTAGE_180;
1862                 if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
1863                     EXT_CSD_CARD_TYPE_HS400_1_2V))
1864                         card_mask |= MMC_SIGNAL_VOLTAGE_120;
1865                 break;
1866         case MMC_DDR_52:
1867                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
1868                         card_mask |= MMC_SIGNAL_VOLTAGE_330 |
1869                                      MMC_SIGNAL_VOLTAGE_180;
1870                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V)
1871                         card_mask |= MMC_SIGNAL_VOLTAGE_120;
1872                 break;
1873         default:
1874                 card_mask |= MMC_SIGNAL_VOLTAGE_330;
1875                 break;
1876         }
1877
1878         while (card_mask & allowed_mask) {
1879                 enum mmc_voltage best_match;
1880
1881                 best_match = 1 << (ffs(card_mask & allowed_mask) - 1);
1882                 if (!mmc_set_signal_voltage(mmc,  best_match))
1883                         return 0;
1884
1885                 allowed_mask &= ~best_match;
1886         }
1887
1888         return -ENOTSUPP;
1889 }
1890 #else
1891 static inline int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1892                                          uint32_t allowed_mask)
1893 {
1894         return 0;
1895 }
1896 #endif
1897
1898 static const struct mode_width_tuning mmc_modes_by_pref[] = {
1899 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
1900         {
1901                 .mode = MMC_HS_400_ES,
1902                 .widths = MMC_MODE_8BIT,
1903         },
1904 #endif
1905 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1906         {
1907                 .mode = MMC_HS_400,
1908                 .widths = MMC_MODE_8BIT,
1909                 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1910         },
1911 #endif
1912 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
1913         {
1914                 .mode = MMC_HS_200,
1915                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1916                 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1917         },
1918 #endif
1919         {
1920                 .mode = MMC_DDR_52,
1921                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1922         },
1923         {
1924                 .mode = MMC_HS_52,
1925                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1926         },
1927         {
1928                 .mode = MMC_HS,
1929                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1930         },
1931         {
1932                 .mode = MMC_LEGACY,
1933                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1934         }
1935 };
1936
1937 #define for_each_mmc_mode_by_pref(caps, mwt) \
1938         for (mwt = mmc_modes_by_pref;\
1939             mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\
1940             mwt++) \
1941                 if (caps & MMC_CAP(mwt->mode))
1942
1943 static const struct ext_csd_bus_width {
1944         uint cap;
1945         bool is_ddr;
1946         uint ext_csd_bits;
1947 } ext_csd_bus_width[] = {
1948         {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8},
1949         {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4},
1950         {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8},
1951         {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4},
1952         {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1},
1953 };
1954
1955 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1956 static int mmc_select_hs400(struct mmc *mmc)
1957 {
1958         int err;
1959
1960         /* Set timing to HS200 for tuning */
1961         err = mmc_set_card_speed(mmc, MMC_HS_200, false);
1962         if (err)
1963                 return err;
1964
1965         /* configure the bus mode (host) */
1966         mmc_select_mode(mmc, MMC_HS_200);
1967         mmc_set_clock(mmc, mmc->tran_speed, false);
1968
1969         /* execute tuning if needed */
1970         err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200);
1971         if (err) {
1972                 debug("tuning failed\n");
1973                 return err;
1974         }
1975
1976         /* Set back to HS */
1977         mmc_set_card_speed(mmc, MMC_HS, true);
1978
1979         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
1980                          EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG);
1981         if (err)
1982                 return err;
1983
1984         err = mmc_set_card_speed(mmc, MMC_HS_400, false);
1985         if (err)
1986                 return err;
1987
1988         mmc_select_mode(mmc, MMC_HS_400);
1989         err = mmc_set_clock(mmc, mmc->tran_speed, false);
1990         if (err)
1991                 return err;
1992
1993         return 0;
1994 }
1995 #else
1996 static int mmc_select_hs400(struct mmc *mmc)
1997 {
1998         return -ENOTSUPP;
1999 }
2000 #endif
2001
2002 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
2003 #if !CONFIG_IS_ENABLED(DM_MMC)
2004 static int mmc_set_enhanced_strobe(struct mmc *mmc)
2005 {
2006         return -ENOTSUPP;
2007 }
2008 #endif
2009 static int mmc_select_hs400es(struct mmc *mmc)
2010 {
2011         int err;
2012
2013         err = mmc_set_card_speed(mmc, MMC_HS, true);
2014         if (err)
2015                 return err;
2016
2017         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
2018                          EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG |
2019                          EXT_CSD_BUS_WIDTH_STROBE);
2020         if (err) {
2021                 printf("switch to bus width for hs400 failed\n");
2022                 return err;
2023         }
2024         /* TODO: driver strength */
2025         err = mmc_set_card_speed(mmc, MMC_HS_400_ES, false);
2026         if (err)
2027                 return err;
2028
2029         mmc_select_mode(mmc, MMC_HS_400_ES);
2030         err = mmc_set_clock(mmc, mmc->tran_speed, false);
2031         if (err)
2032                 return err;
2033
2034         return mmc_set_enhanced_strobe(mmc);
2035 }
2036 #else
2037 static int mmc_select_hs400es(struct mmc *mmc)
2038 {
2039         return -ENOTSUPP;
2040 }
2041 #endif
2042
2043 #define for_each_supported_width(caps, ddr, ecbv) \
2044         for (ecbv = ext_csd_bus_width;\
2045             ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\
2046             ecbv++) \
2047                 if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap))
2048
2049 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
2050 {
2051         int err;
2052         const struct mode_width_tuning *mwt;
2053         const struct ext_csd_bus_width *ecbw;
2054
2055 #ifdef DEBUG
2056         mmc_dump_capabilities("mmc", card_caps);
2057         mmc_dump_capabilities("host", mmc->host_caps);
2058 #endif
2059
2060         if (mmc_host_is_spi(mmc)) {
2061                 mmc_set_bus_width(mmc, 1);
2062                 mmc_select_mode(mmc, MMC_LEGACY);
2063                 mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE);
2064                 return 0;
2065         }
2066
2067         /* Restrict card's capabilities by what the host can do */
2068         card_caps &= mmc->host_caps;
2069
2070         /* Only version 4 of MMC supports wider bus widths */
2071         if (mmc->version < MMC_VERSION_4)
2072                 return 0;
2073
2074         if (!mmc->ext_csd) {
2075                 pr_debug("No ext_csd found!\n"); /* this should enver happen */
2076                 return -ENOTSUPP;
2077         }
2078
2079 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
2080     CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
2081         /*
2082          * In case the eMMC is in HS200/HS400 mode, downgrade to HS mode
2083          * before doing anything else, since a transition from either of
2084          * the HS200/HS400 mode directly to legacy mode is not supported.
2085          */
2086         if (mmc->selected_mode == MMC_HS_200 ||
2087             mmc->selected_mode == MMC_HS_400)
2088                 mmc_set_card_speed(mmc, MMC_HS, true);
2089         else
2090 #endif
2091                 mmc_set_clock(mmc, mmc->legacy_speed, MMC_CLK_ENABLE);
2092
2093         for_each_mmc_mode_by_pref(card_caps, mwt) {
2094                 for_each_supported_width(card_caps & mwt->widths,
2095                                          mmc_is_mode_ddr(mwt->mode), ecbw) {
2096                         enum mmc_voltage old_voltage;
2097                         pr_debug("trying mode %s width %d (at %d MHz)\n",
2098                                  mmc_mode_name(mwt->mode),
2099                                  bus_width(ecbw->cap),
2100                                  mmc_mode2freq(mmc, mwt->mode) / 1000000);
2101                         old_voltage = mmc->signal_voltage;
2102                         err = mmc_set_lowest_voltage(mmc, mwt->mode,
2103                                                      MMC_ALL_SIGNAL_VOLTAGE);
2104                         if (err)
2105                                 continue;
2106
2107                         /* configure the bus width (card + host) */
2108                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2109                                     EXT_CSD_BUS_WIDTH,
2110                                     ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG);
2111                         if (err)
2112                                 goto error;
2113                         mmc_set_bus_width(mmc, bus_width(ecbw->cap));
2114
2115                         if (mwt->mode == MMC_HS_400) {
2116                                 err = mmc_select_hs400(mmc);
2117                                 if (err) {
2118                                         printf("Select HS400 failed %d\n", err);
2119                                         goto error;
2120                                 }
2121                         } else if (mwt->mode == MMC_HS_400_ES) {
2122                                 err = mmc_select_hs400es(mmc);
2123                                 if (err) {
2124                                         printf("Select HS400ES failed %d\n",
2125                                                err);
2126                                         goto error;
2127                                 }
2128                         } else {
2129                                 /* configure the bus speed (card) */
2130                                 err = mmc_set_card_speed(mmc, mwt->mode, false);
2131                                 if (err)
2132                                         goto error;
2133
2134                                 /*
2135                                  * configure the bus width AND the ddr mode
2136                                  * (card). The host side will be taken care
2137                                  * of in the next step
2138                                  */
2139                                 if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) {
2140                                         err = mmc_switch(mmc,
2141                                                          EXT_CSD_CMD_SET_NORMAL,
2142                                                          EXT_CSD_BUS_WIDTH,
2143                                                          ecbw->ext_csd_bits);
2144                                         if (err)
2145                                                 goto error;
2146                                 }
2147
2148                                 /* configure the bus mode (host) */
2149                                 mmc_select_mode(mmc, mwt->mode);
2150                                 mmc_set_clock(mmc, mmc->tran_speed,
2151                                               MMC_CLK_ENABLE);
2152 #ifdef MMC_SUPPORTS_TUNING
2153
2154                                 /* execute tuning if needed */
2155                                 if (mwt->tuning) {
2156                                         err = mmc_execute_tuning(mmc,
2157                                                                  mwt->tuning);
2158                                         if (err) {
2159                                                 pr_debug("tuning failed\n");
2160                                                 goto error;
2161                                         }
2162                                 }
2163 #endif
2164                         }
2165
2166                         /* do a transfer to check the configuration */
2167                         err = mmc_read_and_compare_ext_csd(mmc);
2168                         if (!err)
2169                                 return 0;
2170 error:
2171                         mmc_set_signal_voltage(mmc, old_voltage);
2172                         /* if an error occured, revert to a safer bus mode */
2173                         mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2174                                    EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1);
2175                         mmc_select_mode(mmc, MMC_LEGACY);
2176                         mmc_set_bus_width(mmc, 1);
2177                 }
2178         }
2179
2180         pr_err("unable to select a mode\n");
2181
2182         return -ENOTSUPP;
2183 }
2184 #endif
2185
2186 #if CONFIG_IS_ENABLED(MMC_TINY)
2187 DEFINE_CACHE_ALIGN_BUFFER(u8, ext_csd_bkup, MMC_MAX_BLOCK_LEN);
2188 #endif
2189
2190 static int mmc_startup_v4(struct mmc *mmc)
2191 {
2192         int err, i;
2193         u64 capacity;
2194         bool has_parts = false;
2195         bool part_completed;
2196         static const u32 mmc_versions[] = {
2197                 MMC_VERSION_4,
2198                 MMC_VERSION_4_1,
2199                 MMC_VERSION_4_2,
2200                 MMC_VERSION_4_3,
2201                 MMC_VERSION_4_4,
2202                 MMC_VERSION_4_41,
2203                 MMC_VERSION_4_5,
2204                 MMC_VERSION_5_0,
2205                 MMC_VERSION_5_1
2206         };
2207
2208 #if CONFIG_IS_ENABLED(MMC_TINY)
2209         u8 *ext_csd = ext_csd_bkup;
2210
2211         if (IS_SD(mmc) || mmc->version < MMC_VERSION_4)
2212                 return 0;
2213
2214         if (!mmc->ext_csd)
2215                 memset(ext_csd_bkup, 0, sizeof(ext_csd_bkup));
2216
2217         err = mmc_send_ext_csd(mmc, ext_csd);
2218         if (err)
2219                 goto error;
2220
2221         /* store the ext csd for future reference */
2222         if (!mmc->ext_csd)
2223                 mmc->ext_csd = ext_csd;
2224 #else
2225         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2226
2227         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4))
2228                 return 0;
2229
2230         /* check  ext_csd version and capacity */
2231         err = mmc_send_ext_csd(mmc, ext_csd);
2232         if (err)
2233                 goto error;
2234
2235         /* store the ext csd for future reference */
2236         if (!mmc->ext_csd)
2237                 mmc->ext_csd = malloc(MMC_MAX_BLOCK_LEN);
2238         if (!mmc->ext_csd)
2239                 return -ENOMEM;
2240         memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN);
2241 #endif
2242         if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions))
2243                 return -EINVAL;
2244
2245         mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]];
2246
2247         if (mmc->version >= MMC_VERSION_4_2) {
2248                 /*
2249                  * According to the JEDEC Standard, the value of
2250                  * ext_csd's capacity is valid if the value is more
2251                  * than 2GB
2252                  */
2253                 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
2254                                 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
2255                                 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
2256                                 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
2257                 capacity *= MMC_MAX_BLOCK_LEN;
2258                 if ((capacity >> 20) > 2 * 1024)
2259                         mmc->capacity_user = capacity;
2260         }
2261
2262         if (mmc->version >= MMC_VERSION_4_5)
2263                 mmc->gen_cmd6_time = ext_csd[EXT_CSD_GENERIC_CMD6_TIME];
2264
2265         /* The partition data may be non-zero but it is only
2266          * effective if PARTITION_SETTING_COMPLETED is set in
2267          * EXT_CSD, so ignore any data if this bit is not set,
2268          * except for enabling the high-capacity group size
2269          * definition (see below).
2270          */
2271         part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
2272                             EXT_CSD_PARTITION_SETTING_COMPLETED);
2273
2274         mmc->part_switch_time = ext_csd[EXT_CSD_PART_SWITCH_TIME];
2275         /* Some eMMC set the value too low so set a minimum */
2276         if (mmc->part_switch_time < MMC_MIN_PART_SWITCH_TIME && mmc->part_switch_time)
2277                 mmc->part_switch_time = MMC_MIN_PART_SWITCH_TIME;
2278
2279         /* store the partition info of emmc */
2280         mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
2281         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
2282             ext_csd[EXT_CSD_BOOT_MULT])
2283                 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
2284         if (part_completed &&
2285             (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
2286                 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
2287
2288         mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
2289
2290         mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
2291
2292         for (i = 0; i < 4; i++) {
2293                 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
2294                 uint mult = (ext_csd[idx + 2] << 16) +
2295                         (ext_csd[idx + 1] << 8) + ext_csd[idx];
2296                 if (mult)
2297                         has_parts = true;
2298                 if (!part_completed)
2299                         continue;
2300                 mmc->capacity_gp[i] = mult;
2301                 mmc->capacity_gp[i] *=
2302                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2303                 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2304                 mmc->capacity_gp[i] <<= 19;
2305         }
2306
2307 #ifndef CONFIG_SPL_BUILD
2308         if (part_completed) {
2309                 mmc->enh_user_size =
2310                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
2311                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
2312                         ext_csd[EXT_CSD_ENH_SIZE_MULT];
2313                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2314                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2315                 mmc->enh_user_size <<= 19;
2316                 mmc->enh_user_start =
2317                         (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) +
2318                         (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
2319                         (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
2320                         ext_csd[EXT_CSD_ENH_START_ADDR];
2321                 if (mmc->high_capacity)
2322                         mmc->enh_user_start <<= 9;
2323         }
2324 #endif
2325
2326         /*
2327          * Host needs to enable ERASE_GRP_DEF bit if device is
2328          * partitioned. This bit will be lost every time after a reset
2329          * or power off. This will affect erase size.
2330          */
2331         if (part_completed)
2332                 has_parts = true;
2333         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
2334             (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
2335                 has_parts = true;
2336         if (has_parts) {
2337                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2338                                  EXT_CSD_ERASE_GROUP_DEF, 1);
2339
2340                 if (err)
2341                         goto error;
2342
2343                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
2344         }
2345
2346         if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
2347 #if CONFIG_IS_ENABLED(MMC_WRITE)
2348                 /* Read out group size from ext_csd */
2349                 mmc->erase_grp_size =
2350                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
2351 #endif
2352                 /*
2353                  * if high capacity and partition setting completed
2354                  * SEC_COUNT is valid even if it is smaller than 2 GiB
2355                  * JEDEC Standard JESD84-B45, 6.2.4
2356                  */
2357                 if (mmc->high_capacity && part_completed) {
2358                         capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
2359                                 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
2360                                 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
2361                                 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
2362                         capacity *= MMC_MAX_BLOCK_LEN;
2363                         mmc->capacity_user = capacity;
2364                 }
2365         }
2366 #if CONFIG_IS_ENABLED(MMC_WRITE)
2367         else {
2368                 /* Calculate the group size from the csd value. */
2369                 int erase_gsz, erase_gmul;
2370
2371                 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
2372                 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
2373                 mmc->erase_grp_size = (erase_gsz + 1)
2374                         * (erase_gmul + 1);
2375         }
2376 #endif
2377 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
2378         mmc->hc_wp_grp_size = 1024
2379                 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
2380                 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2381 #endif
2382
2383         mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
2384
2385         return 0;
2386 error:
2387         if (mmc->ext_csd) {
2388 #if !CONFIG_IS_ENABLED(MMC_TINY)
2389                 free(mmc->ext_csd);
2390 #endif
2391                 mmc->ext_csd = NULL;
2392         }
2393         return err;
2394 }
2395
2396 static int mmc_startup(struct mmc *mmc)
2397 {
2398         int err, i;
2399         uint mult, freq;
2400         u64 cmult, csize;
2401         struct mmc_cmd cmd;
2402         struct blk_desc *bdesc;
2403
2404 #ifdef CONFIG_MMC_SPI_CRC_ON
2405         if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
2406                 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
2407                 cmd.resp_type = MMC_RSP_R1;
2408                 cmd.cmdarg = 1;
2409                 err = mmc_send_cmd(mmc, &cmd, NULL);
2410                 if (err)
2411                         return err;
2412         }
2413 #endif
2414
2415         /* Put the Card in Identify Mode */
2416         cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
2417                 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
2418         cmd.resp_type = MMC_RSP_R2;
2419         cmd.cmdarg = 0;
2420
2421         err = mmc_send_cmd(mmc, &cmd, NULL);
2422
2423 #ifdef CONFIG_MMC_QUIRKS
2424         if (err && (mmc->quirks & MMC_QUIRK_RETRY_SEND_CID)) {
2425                 int retries = 4;
2426                 /*
2427                  * It has been seen that SEND_CID may fail on the first
2428                  * attempt, let's try a few more time
2429                  */
2430                 do {
2431                         err = mmc_send_cmd(mmc, &cmd, NULL);
2432                         if (!err)
2433                                 break;
2434                 } while (retries--);
2435         }
2436 #endif
2437
2438         if (err)
2439                 return err;
2440
2441         memcpy(mmc->cid, cmd.response, 16);
2442
2443         /*
2444          * For MMC cards, set the Relative Address.
2445          * For SD cards, get the Relatvie Address.
2446          * This also puts the cards into Standby State
2447          */
2448         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2449                 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
2450                 cmd.cmdarg = mmc->rca << 16;
2451                 cmd.resp_type = MMC_RSP_R6;
2452
2453                 err = mmc_send_cmd(mmc, &cmd, NULL);
2454
2455                 if (err)
2456                         return err;
2457
2458                 if (IS_SD(mmc))
2459                         mmc->rca = (cmd.response[0] >> 16) & 0xffff;
2460         }
2461
2462         /* Get the Card-Specific Data */
2463         cmd.cmdidx = MMC_CMD_SEND_CSD;
2464         cmd.resp_type = MMC_RSP_R2;
2465         cmd.cmdarg = mmc->rca << 16;
2466
2467         err = mmc_send_cmd(mmc, &cmd, NULL);
2468
2469         if (err)
2470                 return err;
2471
2472         mmc->csd[0] = cmd.response[0];
2473         mmc->csd[1] = cmd.response[1];
2474         mmc->csd[2] = cmd.response[2];
2475         mmc->csd[3] = cmd.response[3];
2476
2477         if (mmc->version == MMC_VERSION_UNKNOWN) {
2478                 int version = (cmd.response[0] >> 26) & 0xf;
2479
2480                 switch (version) {
2481                 case 0:
2482                         mmc->version = MMC_VERSION_1_2;
2483                         break;
2484                 case 1:
2485                         mmc->version = MMC_VERSION_1_4;
2486                         break;
2487                 case 2:
2488                         mmc->version = MMC_VERSION_2_2;
2489                         break;
2490                 case 3:
2491                         mmc->version = MMC_VERSION_3;
2492                         break;
2493                 case 4:
2494                         mmc->version = MMC_VERSION_4;
2495                         break;
2496                 default:
2497                         mmc->version = MMC_VERSION_1_2;
2498                         break;
2499                 }
2500         }
2501
2502         /* divide frequency by 10, since the mults are 10x bigger */
2503         freq = fbase[(cmd.response[0] & 0x7)];
2504         mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
2505
2506         mmc->legacy_speed = freq * mult;
2507         mmc_select_mode(mmc, MMC_LEGACY);
2508
2509         mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
2510         mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
2511 #if CONFIG_IS_ENABLED(MMC_WRITE)
2512
2513         if (IS_SD(mmc))
2514                 mmc->write_bl_len = mmc->read_bl_len;
2515         else
2516                 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
2517 #endif
2518
2519         if (mmc->high_capacity) {
2520                 csize = (mmc->csd[1] & 0x3f) << 16
2521                         | (mmc->csd[2] & 0xffff0000) >> 16;
2522                 cmult = 8;
2523         } else {
2524                 csize = (mmc->csd[1] & 0x3ff) << 2
2525                         | (mmc->csd[2] & 0xc0000000) >> 30;
2526                 cmult = (mmc->csd[2] & 0x00038000) >> 15;
2527         }
2528
2529         mmc->capacity_user = (csize + 1) << (cmult + 2);
2530         mmc->capacity_user *= mmc->read_bl_len;
2531         mmc->capacity_boot = 0;
2532         mmc->capacity_rpmb = 0;
2533         for (i = 0; i < 4; i++)
2534                 mmc->capacity_gp[i] = 0;
2535
2536         if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
2537                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2538
2539 #if CONFIG_IS_ENABLED(MMC_WRITE)
2540         if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
2541                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2542 #endif
2543
2544         if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
2545                 cmd.cmdidx = MMC_CMD_SET_DSR;
2546                 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
2547                 cmd.resp_type = MMC_RSP_NONE;
2548                 if (mmc_send_cmd(mmc, &cmd, NULL))
2549                         pr_warn("MMC: SET_DSR failed\n");
2550         }
2551
2552         /* Select the card, and put it into Transfer Mode */
2553         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2554                 cmd.cmdidx = MMC_CMD_SELECT_CARD;
2555                 cmd.resp_type = MMC_RSP_R1;
2556                 cmd.cmdarg = mmc->rca << 16;
2557                 err = mmc_send_cmd(mmc, &cmd, NULL);
2558
2559                 if (err)
2560                         return err;
2561         }
2562
2563         /*
2564          * For SD, its erase group is always one sector
2565          */
2566 #if CONFIG_IS_ENABLED(MMC_WRITE)
2567         mmc->erase_grp_size = 1;
2568 #endif
2569         mmc->part_config = MMCPART_NOAVAILABLE;
2570
2571         err = mmc_startup_v4(mmc);
2572         if (err)
2573                 return err;
2574
2575         err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
2576         if (err)
2577                 return err;
2578
2579 #if CONFIG_IS_ENABLED(MMC_TINY)
2580         mmc_set_clock(mmc, mmc->legacy_speed, false);
2581         mmc_select_mode(mmc, MMC_LEGACY);
2582         mmc_set_bus_width(mmc, 1);
2583 #else
2584         if (IS_SD(mmc)) {
2585                 err = sd_get_capabilities(mmc);
2586                 if (err)
2587                         return err;
2588                 err = sd_select_mode_and_width(mmc, mmc->card_caps);
2589         } else {
2590                 err = mmc_get_capabilities(mmc);
2591                 if (err)
2592                         return err;
2593                 err = mmc_select_mode_and_width(mmc, mmc->card_caps);
2594         }
2595 #endif
2596         if (err)
2597                 return err;
2598
2599         mmc->best_mode = mmc->selected_mode;
2600
2601         /* Fix the block length for DDR mode */
2602         if (mmc->ddr_mode) {
2603                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2604 #if CONFIG_IS_ENABLED(MMC_WRITE)
2605                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2606 #endif
2607         }
2608
2609         /* fill in device description */
2610         bdesc = mmc_get_blk_desc(mmc);
2611         bdesc->lun = 0;
2612         bdesc->hwpart = 0;
2613         bdesc->type = 0;
2614         bdesc->blksz = mmc->read_bl_len;
2615         bdesc->log2blksz = LOG2(bdesc->blksz);
2616         bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
2617 #if !defined(CONFIG_SPL_BUILD) || \
2618                 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
2619                 !CONFIG_IS_ENABLED(USE_TINY_PRINTF))
2620         sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
2621                 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
2622                 (mmc->cid[3] >> 16) & 0xffff);
2623         sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
2624                 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
2625                 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
2626                 (mmc->cid[2] >> 24) & 0xff);
2627         sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
2628                 (mmc->cid[2] >> 16) & 0xf);
2629 #else
2630         bdesc->vendor[0] = 0;
2631         bdesc->product[0] = 0;
2632         bdesc->revision[0] = 0;
2633 #endif
2634
2635 #if !defined(CONFIG_DM_MMC) && (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT))
2636         part_init(bdesc);
2637 #endif
2638
2639         return 0;
2640 }
2641
2642 static int mmc_send_if_cond(struct mmc *mmc)
2643 {
2644         struct mmc_cmd cmd;
2645         int err;
2646
2647         cmd.cmdidx = SD_CMD_SEND_IF_COND;
2648         /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
2649         cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
2650         cmd.resp_type = MMC_RSP_R7;
2651
2652         err = mmc_send_cmd(mmc, &cmd, NULL);
2653
2654         if (err)
2655                 return err;
2656
2657         if ((cmd.response[0] & 0xff) != 0xaa)
2658                 return -EOPNOTSUPP;
2659         else
2660                 mmc->version = SD_VERSION_2;
2661
2662         return 0;
2663 }
2664
2665 #if !CONFIG_IS_ENABLED(DM_MMC)
2666 /* board-specific MMC power initializations. */
2667 __weak void board_mmc_power_init(void)
2668 {
2669 }
2670 #endif
2671
2672 static int mmc_power_init(struct mmc *mmc)
2673 {
2674 #if CONFIG_IS_ENABLED(DM_MMC)
2675 #if CONFIG_IS_ENABLED(DM_REGULATOR)
2676         int ret;
2677
2678         ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
2679                                           &mmc->vmmc_supply);
2680         if (ret)
2681                 pr_debug("%s: No vmmc supply\n", mmc->dev->name);
2682
2683         ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
2684                                           &mmc->vqmmc_supply);
2685         if (ret)
2686                 pr_debug("%s: No vqmmc supply\n", mmc->dev->name);
2687 #endif
2688 #else /* !CONFIG_DM_MMC */
2689         /*
2690          * Driver model should use a regulator, as above, rather than calling
2691          * out to board code.
2692          */
2693         board_mmc_power_init();
2694 #endif
2695         return 0;
2696 }
2697
2698 /*
2699  * put the host in the initial state:
2700  * - turn on Vdd (card power supply)
2701  * - configure the bus width and clock to minimal values
2702  */
2703 static void mmc_set_initial_state(struct mmc *mmc)
2704 {
2705         int err;
2706
2707         /* First try to set 3.3V. If it fails set to 1.8V */
2708         err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330);
2709         if (err != 0)
2710                 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
2711         if (err != 0)
2712                 pr_warn("mmc: failed to set signal voltage\n");
2713
2714         mmc_select_mode(mmc, MMC_LEGACY);
2715         mmc_set_bus_width(mmc, 1);
2716         mmc_set_clock(mmc, 0, MMC_CLK_ENABLE);
2717 }
2718
2719 static int mmc_power_on(struct mmc *mmc)
2720 {
2721 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2722         if (mmc->vmmc_supply) {
2723                 int ret = regulator_set_enable(mmc->vmmc_supply, true);
2724
2725                 if (ret) {
2726                         puts("Error enabling VMMC supply\n");
2727                         return ret;
2728                 }
2729         }
2730 #endif
2731         return 0;
2732 }
2733
2734 static int mmc_power_off(struct mmc *mmc)
2735 {
2736         mmc_set_clock(mmc, 0, MMC_CLK_DISABLE);
2737 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2738         if (mmc->vmmc_supply) {
2739                 int ret = regulator_set_enable(mmc->vmmc_supply, false);
2740
2741                 if (ret) {
2742                         pr_debug("Error disabling VMMC supply\n");
2743                         return ret;
2744                 }
2745         }
2746 #endif
2747         return 0;
2748 }
2749
2750 static int mmc_power_cycle(struct mmc *mmc)
2751 {
2752         int ret;
2753
2754         ret = mmc_power_off(mmc);
2755         if (ret)
2756                 return ret;
2757
2758         ret = mmc_host_power_cycle(mmc);
2759         if (ret)
2760                 return ret;
2761
2762         /*
2763          * SD spec recommends at least 1ms of delay. Let's wait for 2ms
2764          * to be on the safer side.
2765          */
2766         udelay(2000);
2767         return mmc_power_on(mmc);
2768 }
2769
2770 int mmc_get_op_cond(struct mmc *mmc)
2771 {
2772         bool uhs_en = supports_uhs(mmc->cfg->host_caps);
2773         int err;
2774
2775         if (mmc->has_init)
2776                 return 0;
2777
2778 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
2779         mmc_adapter_card_type_ident();
2780 #endif
2781         err = mmc_power_init(mmc);
2782         if (err)
2783                 return err;
2784
2785 #ifdef CONFIG_MMC_QUIRKS
2786         mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN |
2787                       MMC_QUIRK_RETRY_SEND_CID |
2788                       MMC_QUIRK_RETRY_APP_CMD;
2789 #endif
2790
2791         err = mmc_power_cycle(mmc);
2792         if (err) {
2793                 /*
2794                  * if power cycling is not supported, we should not try
2795                  * to use the UHS modes, because we wouldn't be able to
2796                  * recover from an error during the UHS initialization.
2797                  */
2798                 pr_debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n");
2799                 uhs_en = false;
2800                 mmc->host_caps &= ~UHS_CAPS;
2801                 err = mmc_power_on(mmc);
2802         }
2803         if (err)
2804                 return err;
2805
2806 #if CONFIG_IS_ENABLED(DM_MMC)
2807         /* The device has already been probed ready for use */
2808 #else
2809         /* made sure it's not NULL earlier */
2810         err = mmc->cfg->ops->init(mmc);
2811         if (err)
2812                 return err;
2813 #endif
2814         mmc->ddr_mode = 0;
2815
2816 retry:
2817         mmc_set_initial_state(mmc);
2818
2819         /* Reset the Card */
2820         err = mmc_go_idle(mmc);
2821
2822         if (err)
2823                 return err;
2824
2825         /* The internal partition reset to user partition(0) at every CMD0*/
2826         mmc_get_blk_desc(mmc)->hwpart = 0;
2827
2828         /* Test for SD version 2 */
2829         err = mmc_send_if_cond(mmc);
2830
2831         /* Now try to get the SD card's operating condition */
2832         err = sd_send_op_cond(mmc, uhs_en);
2833         if (err && uhs_en) {
2834                 uhs_en = false;
2835                 mmc_power_cycle(mmc);
2836                 goto retry;
2837         }
2838
2839         /* If the command timed out, we check for an MMC card */
2840         if (err == -ETIMEDOUT) {
2841                 err = mmc_send_op_cond(mmc);
2842
2843                 if (err) {
2844 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2845                         pr_err("Card did not respond to voltage select!\n");
2846 #endif
2847                         return -EOPNOTSUPP;
2848                 }
2849         }
2850
2851         return err;
2852 }
2853
2854 int mmc_start_init(struct mmc *mmc)
2855 {
2856         bool no_card;
2857         int err = 0;
2858
2859         /*
2860          * all hosts are capable of 1 bit bus-width and able to use the legacy
2861          * timings.
2862          */
2863         mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(MMC_LEGACY) |
2864                          MMC_CAP(MMC_LEGACY) | MMC_MODE_1BIT;
2865 #if CONFIG_IS_ENABLED(DM_MMC)
2866         mmc_deferred_probe(mmc);
2867 #endif
2868 #if !defined(CONFIG_MMC_BROKEN_CD)
2869         no_card = mmc_getcd(mmc) == 0;
2870 #else
2871         no_card = 0;
2872 #endif
2873 #if !CONFIG_IS_ENABLED(DM_MMC)
2874         /* we pretend there's no card when init is NULL */
2875         no_card = no_card || (mmc->cfg->ops->init == NULL);
2876 #endif
2877         if (no_card) {
2878                 mmc->has_init = 0;
2879 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2880                 pr_err("MMC: no card present\n");
2881 #endif
2882                 return -ENOMEDIUM;
2883         }
2884
2885         err = mmc_get_op_cond(mmc);
2886
2887         if (!err)
2888                 mmc->init_in_progress = 1;
2889
2890         return err;
2891 }
2892
2893 static int mmc_complete_init(struct mmc *mmc)
2894 {
2895         int err = 0;
2896
2897         mmc->init_in_progress = 0;
2898         if (mmc->op_cond_pending)
2899                 err = mmc_complete_op_cond(mmc);
2900
2901         if (!err)
2902                 err = mmc_startup(mmc);
2903         if (err)
2904                 mmc->has_init = 0;
2905         else
2906                 mmc->has_init = 1;
2907         return err;
2908 }
2909
2910 int mmc_init(struct mmc *mmc)
2911 {
2912         int err = 0;
2913         __maybe_unused ulong start;
2914 #if CONFIG_IS_ENABLED(DM_MMC)
2915         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
2916
2917         upriv->mmc = mmc;
2918 #endif
2919         if (mmc->has_init)
2920                 return 0;
2921
2922         start = get_timer(0);
2923
2924         if (!mmc->init_in_progress)
2925                 err = mmc_start_init(mmc);
2926
2927         if (!err)
2928                 err = mmc_complete_init(mmc);
2929         if (err)
2930                 pr_info("%s: %d, time %lu\n", __func__, err, get_timer(start));
2931
2932         return err;
2933 }
2934
2935 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
2936     CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
2937     CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
2938 int mmc_deinit(struct mmc *mmc)
2939 {
2940         u32 caps_filtered;
2941
2942         if (!mmc->has_init)
2943                 return 0;
2944
2945         if (IS_SD(mmc)) {
2946                 caps_filtered = mmc->card_caps &
2947                         ~(MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25) |
2948                           MMC_CAP(UHS_SDR50) | MMC_CAP(UHS_DDR50) |
2949                           MMC_CAP(UHS_SDR104));
2950
2951                 return sd_select_mode_and_width(mmc, caps_filtered);
2952         } else {
2953                 caps_filtered = mmc->card_caps &
2954                         ~(MMC_CAP(MMC_HS_200) | MMC_CAP(MMC_HS_400));
2955
2956                 return mmc_select_mode_and_width(mmc, caps_filtered);
2957         }
2958 }
2959 #endif
2960
2961 int mmc_set_dsr(struct mmc *mmc, u16 val)
2962 {
2963         mmc->dsr = val;
2964         return 0;
2965 }
2966
2967 /* CPU-specific MMC initializations */
2968 __weak int cpu_mmc_init(bd_t *bis)
2969 {
2970         return -1;
2971 }
2972
2973 /* board-specific MMC initializations. */
2974 __weak int board_mmc_init(bd_t *bis)
2975 {
2976         return -1;
2977 }
2978
2979 void mmc_set_preinit(struct mmc *mmc, int preinit)
2980 {
2981         mmc->preinit = preinit;
2982 }
2983
2984 #if CONFIG_IS_ENABLED(DM_MMC)
2985 static int mmc_probe(bd_t *bis)
2986 {
2987         int ret, i;
2988         struct uclass *uc;
2989         struct udevice *dev;
2990
2991         ret = uclass_get(UCLASS_MMC, &uc);
2992         if (ret)
2993                 return ret;
2994
2995         /*
2996          * Try to add them in sequence order. Really with driver model we
2997          * should allow holes, but the current MMC list does not allow that.
2998          * So if we request 0, 1, 3 we will get 0, 1, 2.
2999          */
3000         for (i = 0; ; i++) {
3001                 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
3002                 if (ret == -ENODEV)
3003                         break;
3004         }
3005         uclass_foreach_dev(dev, uc) {
3006                 ret = device_probe(dev);
3007                 if (ret)
3008                         pr_err("%s - probe failed: %d\n", dev->name, ret);
3009         }
3010
3011         return 0;
3012 }
3013 #else
3014 static int mmc_probe(bd_t *bis)
3015 {
3016         if (board_mmc_init(bis) < 0)
3017                 cpu_mmc_init(bis);
3018
3019         return 0;
3020 }
3021 #endif
3022
3023 int mmc_initialize(bd_t *bis)
3024 {
3025         static int initialized = 0;
3026         int ret;
3027         if (initialized)        /* Avoid initializing mmc multiple times */
3028                 return 0;
3029         initialized = 1;
3030
3031 #if !CONFIG_IS_ENABLED(BLK)
3032 #if !CONFIG_IS_ENABLED(MMC_TINY)
3033         mmc_list_init();
3034 #endif
3035 #endif
3036         ret = mmc_probe(bis);
3037         if (ret)
3038                 return ret;
3039
3040 #ifndef CONFIG_SPL_BUILD
3041         print_mmc_devices(',');
3042 #endif
3043
3044         mmc_do_preinit();
3045         return 0;
3046 }
3047
3048 #if CONFIG_IS_ENABLED(DM_MMC)
3049 int mmc_init_device(int num)
3050 {
3051         struct udevice *dev;
3052         struct mmc *m;
3053         int ret;
3054
3055         ret = uclass_get_device(UCLASS_MMC, num, &dev);
3056         if (ret)
3057                 return ret;
3058
3059         m = mmc_get_mmc_dev(dev);
3060         if (!m)
3061                 return 0;
3062 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
3063         mmc_set_preinit(m, 1);
3064 #endif
3065         if (m->preinit)
3066                 mmc_start_init(m);
3067
3068         return 0;
3069 }
3070 #endif
3071
3072 #ifdef CONFIG_CMD_BKOPS_ENABLE
3073 int mmc_set_bkops_enable(struct mmc *mmc)
3074 {
3075         int err;
3076         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
3077
3078         err = mmc_send_ext_csd(mmc, ext_csd);
3079         if (err) {
3080                 puts("Could not get ext_csd register values\n");
3081                 return err;
3082         }
3083
3084         if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
3085                 puts("Background operations not supported on device\n");
3086                 return -EMEDIUMTYPE;
3087         }
3088
3089         if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
3090                 puts("Background operations already enabled\n");
3091                 return 0;
3092         }
3093
3094         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
3095         if (err) {
3096                 puts("Failed to enable manual background operations\n");
3097                 return err;
3098         }
3099
3100         puts("Enabled manual background operations\n");
3101
3102         return 0;
3103 }
3104 #endif