common: Drop linux/delay.h from common header
[oweals/u-boot.git] / drivers / i2c / soft_i2c.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2009
4  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5  * Changes for multibus/multiadapter I2C support.
6  *
7  * (C) Copyright 2001, 2002
8  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9  *
10  * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
11  * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
12  * Neil Russell.
13  *
14  * NOTE: This driver should be converted to driver model before June 2017.
15  * Please see doc/driver-model/i2c-howto.rst for instructions.
16  */
17
18 #include <common.h>
19 #if defined(CONFIG_AT91FAMILY)
20 #include <asm/io.h>
21 #include <asm/arch/hardware.h>
22 #include <asm/arch/at91_pio.h>
23 #ifdef CONFIG_ATMEL_LEGACY
24 #include <asm/arch/gpio.h>
25 #endif
26 #endif
27 #include <i2c.h>
28 #include <linux/delay.h>
29
30 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
31 # include <asm/gpio.h>
32
33 # ifndef I2C_GPIO_SYNC
34 #  define I2C_GPIO_SYNC
35 # endif
36
37 # ifndef I2C_INIT
38 #  define I2C_INIT \
39         do { \
40                 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
41                 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
42         } while (0)
43 # endif
44
45 # ifndef I2C_ACTIVE
46 #  define I2C_ACTIVE do { } while (0)
47 # endif
48
49 # ifndef I2C_TRISTATE
50 #  define I2C_TRISTATE do { } while (0)
51 # endif
52
53 # ifndef I2C_READ
54 #  define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
55 # endif
56
57 # ifndef I2C_SDA
58 #  define I2C_SDA(bit) \
59         do { \
60                 if (bit) \
61                         gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
62                 else \
63                         gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
64                 I2C_GPIO_SYNC; \
65         } while (0)
66 # endif
67
68 # ifndef I2C_SCL
69 #  define I2C_SCL(bit) \
70         do { \
71                 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
72                 I2C_GPIO_SYNC; \
73         } while (0)
74 # endif
75
76 # ifndef I2C_DELAY
77 #  define I2C_DELAY udelay(5)   /* 1/4 I2C clock duration */
78 # endif
79
80 #endif
81
82 /* #define      DEBUG_I2C       */
83
84 DECLARE_GLOBAL_DATA_PTR;
85
86 #ifndef I2C_SOFT_DECLARATIONS
87 #  define I2C_SOFT_DECLARATIONS
88 #endif
89
90 #if !defined(CONFIG_SYS_I2C_SOFT_SPEED)
91 #define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED
92 #endif
93 #if !defined(CONFIG_SYS_I2C_SOFT_SLAVE)
94 #define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE
95 #endif
96
97 /*-----------------------------------------------------------------------
98  * Definitions
99  */
100 #define RETRIES         0
101
102 #define I2C_ACK         0               /* PD_SDA level to ack a byte */
103 #define I2C_NOACK       1               /* PD_SDA level to noack a byte */
104
105
106 #ifdef DEBUG_I2C
107 #define PRINTD(fmt,args...)     do {    \
108                 printf (fmt ,##args);   \
109         } while (0)
110 #else
111 #define PRINTD(fmt,args...)
112 #endif
113
114 /*-----------------------------------------------------------------------
115  * Local functions
116  */
117 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
118 static void  send_reset (void);
119 #endif
120 static void  send_start (void);
121 static void  send_stop  (void);
122 static void  send_ack   (int);
123 static int   write_byte (uchar byte);
124 static uchar read_byte  (int);
125
126 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
127 /*-----------------------------------------------------------------------
128  * Send a reset sequence consisting of 9 clocks with the data signal high
129  * to clock any confused device back into an idle state.  Also send a
130  * <stop> at the end of the sequence for belts & suspenders.
131  */
132 static void send_reset(void)
133 {
134         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
135         int j;
136
137         I2C_SCL(1);
138         I2C_SDA(1);
139 #ifdef  I2C_INIT
140         I2C_INIT;
141 #endif
142         I2C_TRISTATE;
143         for(j = 0; j < 9; j++) {
144                 I2C_SCL(0);
145                 I2C_DELAY;
146                 I2C_DELAY;
147                 I2C_SCL(1);
148                 I2C_DELAY;
149                 I2C_DELAY;
150         }
151         send_stop();
152         I2C_TRISTATE;
153 }
154 #endif
155
156 /*-----------------------------------------------------------------------
157  * START: High -> Low on SDA while SCL is High
158  */
159 static void send_start(void)
160 {
161         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
162
163         I2C_DELAY;
164         I2C_SDA(1);
165         I2C_ACTIVE;
166         I2C_DELAY;
167         I2C_SCL(1);
168         I2C_DELAY;
169         I2C_SDA(0);
170         I2C_DELAY;
171 }
172
173 /*-----------------------------------------------------------------------
174  * STOP: Low -> High on SDA while SCL is High
175  */
176 static void send_stop(void)
177 {
178         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
179
180         I2C_SCL(0);
181         I2C_DELAY;
182         I2C_SDA(0);
183         I2C_ACTIVE;
184         I2C_DELAY;
185         I2C_SCL(1);
186         I2C_DELAY;
187         I2C_SDA(1);
188         I2C_DELAY;
189         I2C_TRISTATE;
190 }
191
192 /*-----------------------------------------------------------------------
193  * ack should be I2C_ACK or I2C_NOACK
194  */
195 static void send_ack(int ack)
196 {
197         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
198
199         I2C_SCL(0);
200         I2C_DELAY;
201         I2C_ACTIVE;
202         I2C_SDA(ack);
203         I2C_DELAY;
204         I2C_SCL(1);
205         I2C_DELAY;
206         I2C_DELAY;
207         I2C_SCL(0);
208         I2C_DELAY;
209 }
210
211 /*-----------------------------------------------------------------------
212  * Send 8 bits and look for an acknowledgement.
213  */
214 static int write_byte(uchar data)
215 {
216         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
217         int j;
218         int nack;
219
220         I2C_ACTIVE;
221         for(j = 0; j < 8; j++) {
222                 I2C_SCL(0);
223                 I2C_DELAY;
224                 I2C_SDA(data & 0x80);
225                 I2C_DELAY;
226                 I2C_SCL(1);
227                 I2C_DELAY;
228                 I2C_DELAY;
229
230                 data <<= 1;
231         }
232
233         /*
234          * Look for an <ACK>(negative logic) and return it.
235          */
236         I2C_SCL(0);
237         I2C_DELAY;
238         I2C_SDA(1);
239         I2C_TRISTATE;
240         I2C_DELAY;
241         I2C_SCL(1);
242         I2C_DELAY;
243         I2C_DELAY;
244         nack = I2C_READ;
245         I2C_SCL(0);
246         I2C_DELAY;
247         I2C_ACTIVE;
248
249         return(nack);   /* not a nack is an ack */
250 }
251
252 /*-----------------------------------------------------------------------
253  * if ack == I2C_ACK, ACK the byte so can continue reading, else
254  * send I2C_NOACK to end the read.
255  */
256 static uchar read_byte(int ack)
257 {
258         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
259         int  data;
260         int  j;
261
262         /*
263          * Read 8 bits, MSB first.
264          */
265         I2C_TRISTATE;
266         I2C_SDA(1);
267         data = 0;
268         for(j = 0; j < 8; j++) {
269                 I2C_SCL(0);
270                 I2C_DELAY;
271                 I2C_SCL(1);
272                 I2C_DELAY;
273                 data <<= 1;
274                 data |= I2C_READ;
275                 I2C_DELAY;
276         }
277         send_ack(ack);
278
279         return(data);
280 }
281
282 /*-----------------------------------------------------------------------
283  * Initialization
284  */
285 static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
286 {
287 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
288         /* call board specific i2c bus reset routine before accessing the   */
289         /* environment, which might be in a chip on that bus. For details   */
290         /* about this problem see doc/I2C_Edge_Conditions.                  */
291         i2c_init_board();
292 #else
293         /*
294          * WARNING: Do NOT save speed in a static variable: if the
295          * I2C routines are called before RAM is initialized (to read
296          * the DIMM SPD, for instance), RAM won't be usable and your
297          * system will crash.
298          */
299         send_reset ();
300 #endif
301 }
302
303 /*-----------------------------------------------------------------------
304  * Probe to see if a chip is present.  Also good for checking for the
305  * completion of EEPROM writes since the chip stops responding until
306  * the write completes (typically 10mSec).
307  */
308 static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
309 {
310         int rc;
311
312         /*
313          * perform 1 byte write transaction with just address byte
314          * (fake write)
315          */
316         send_start();
317         rc = write_byte ((addr << 1) | 0);
318         send_stop();
319
320         return (rc ? 1 : 0);
321 }
322
323 /*-----------------------------------------------------------------------
324  * Read bytes
325  */
326 static int  soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
327                         int alen, uchar *buffer, int len)
328 {
329         int shift;
330         PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
331                 chip, addr, alen, buffer, len);
332
333 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
334         /*
335          * EEPROM chips that implement "address overflow" are ones
336          * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
337          * address and the extra bits end up in the "chip address"
338          * bit slots. This makes a 24WC08 (1Kbyte) chip look like
339          * four 256 byte chips.
340          *
341          * Note that we consider the length of the address field to
342          * still be one byte because the extra address bits are
343          * hidden in the chip address.
344          */
345         chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
346
347         PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
348                 chip, addr);
349 #endif
350
351         /*
352          * Do the addressing portion of a write cycle to set the
353          * chip's address pointer.  If the address length is zero,
354          * don't do the normal write cycle to set the address pointer,
355          * there is no address pointer in this chip.
356          */
357         send_start();
358         if(alen > 0) {
359                 if(write_byte(chip << 1)) {     /* write cycle */
360                         send_stop();
361                         PRINTD("i2c_read, no chip responded %02X\n", chip);
362                         return(1);
363                 }
364                 shift = (alen-1) * 8;
365                 while(alen-- > 0) {
366                         if(write_byte(addr >> shift)) {
367                                 PRINTD("i2c_read, address not <ACK>ed\n");
368                                 return(1);
369                         }
370                         shift -= 8;
371                 }
372
373                 /* Some I2C chips need a stop/start sequence here,
374                  * other chips don't work with a full stop and need
375                  * only a start.  Default behaviour is to send the
376                  * stop/start sequence.
377                  */
378 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
379                 send_start();
380 #else
381                 send_stop();
382                 send_start();
383 #endif
384         }
385         /*
386          * Send the chip address again, this time for a read cycle.
387          * Then read the data.  On the last byte, we do a NACK instead
388          * of an ACK(len == 0) to terminate the read.
389          */
390         write_byte((chip << 1) | 1);    /* read cycle */
391         while(len-- > 0) {
392                 *buffer++ = read_byte(len == 0);
393         }
394         send_stop();
395         return(0);
396 }
397
398 /*-----------------------------------------------------------------------
399  * Write bytes
400  */
401 static int  soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
402                         int alen, uchar *buffer, int len)
403 {
404         int shift, failures = 0;
405
406         PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
407                 chip, addr, alen, buffer, len);
408
409         send_start();
410         if(write_byte(chip << 1)) {     /* write cycle */
411                 send_stop();
412                 PRINTD("i2c_write, no chip responded %02X\n", chip);
413                 return(1);
414         }
415         shift = (alen-1) * 8;
416         while(alen-- > 0) {
417                 if(write_byte(addr >> shift)) {
418                         PRINTD("i2c_write, address not <ACK>ed\n");
419                         return(1);
420                 }
421                 shift -= 8;
422         }
423
424         while(len-- > 0) {
425                 if(write_byte(*buffer++)) {
426                         failures++;
427                 }
428         }
429         send_stop();
430         return(failures);
431 }
432
433 /*
434  * Register soft i2c adapters
435  */
436 U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe,
437                          soft_i2c_read, soft_i2c_write, NULL,
438                          CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
439                          0)
440 #if defined(I2C_SOFT_DECLARATIONS2)
441 U_BOOT_I2C_ADAP_COMPLETE(soft01, soft_i2c_init, soft_i2c_probe,
442                          soft_i2c_read, soft_i2c_write, NULL,
443                          CONFIG_SYS_I2C_SOFT_SPEED_2,
444                          CONFIG_SYS_I2C_SOFT_SLAVE_2,
445                          1)
446 #endif
447 #if defined(I2C_SOFT_DECLARATIONS3)
448 U_BOOT_I2C_ADAP_COMPLETE(soft02, soft_i2c_init, soft_i2c_probe,
449                          soft_i2c_read, soft_i2c_write, NULL,
450                          CONFIG_SYS_I2C_SOFT_SPEED_3,
451                          CONFIG_SYS_I2C_SOFT_SLAVE_3,
452                          2)
453 #endif
454 #if defined(I2C_SOFT_DECLARATIONS4)
455 U_BOOT_I2C_ADAP_COMPLETE(soft03, soft_i2c_init, soft_i2c_probe,
456                          soft_i2c_read, soft_i2c_write, NULL,
457                          CONFIG_SYS_I2C_SOFT_SPEED_4,
458                          CONFIG_SYS_I2C_SOFT_SLAVE_4,
459                          3)
460 #endif
461 #if defined(I2C_SOFT_DECLARATIONS5)
462 U_BOOT_I2C_ADAP_COMPLETE(soft04, soft_i2c_init, soft_i2c_probe,
463                          soft_i2c_read, soft_i2c_write, NULL,
464                          CONFIG_SYS_I2C_SOFT_SPEED_5,
465                          CONFIG_SYS_I2C_SOFT_SLAVE_5,
466                          4)
467 #endif
468 #if defined(I2C_SOFT_DECLARATIONS6)
469 U_BOOT_I2C_ADAP_COMPLETE(soft05, soft_i2c_init, soft_i2c_probe,
470                          soft_i2c_read, soft_i2c_write, NULL,
471                          CONFIG_SYS_I2C_SOFT_SPEED_6,
472                          CONFIG_SYS_I2C_SOFT_SLAVE_6,
473                          5)
474 #endif
475 #if defined(I2C_SOFT_DECLARATIONS7)
476 U_BOOT_I2C_ADAP_COMPLETE(soft06, soft_i2c_init, soft_i2c_probe,
477                          soft_i2c_read, soft_i2c_write, NULL,
478                          CONFIG_SYS_I2C_SOFT_SPEED_7,
479                          CONFIG_SYS_I2C_SOFT_SLAVE_7,
480                          6)
481 #endif
482 #if defined(I2C_SOFT_DECLARATIONS8)
483 U_BOOT_I2C_ADAP_COMPLETE(soft07, soft_i2c_init, soft_i2c_probe,
484                          soft_i2c_read, soft_i2c_write, NULL,
485                          CONFIG_SYS_I2C_SOFT_SPEED_8,
486                          CONFIG_SYS_I2C_SOFT_SLAVE_8,
487                          7)
488 #endif
489 #if defined(I2C_SOFT_DECLARATIONS9)
490 U_BOOT_I2C_ADAP_COMPLETE(soft08, soft_i2c_init, soft_i2c_probe,
491                          soft_i2c_read, soft_i2c_write, NULL,
492                          CONFIG_SYS_I2C_SOFT_SPEED_9,
493                          CONFIG_SYS_I2C_SOFT_SLAVE_9,
494                          8)
495 #endif
496 #if defined(I2C_SOFT_DECLARATIONS10)
497 U_BOOT_I2C_ADAP_COMPLETE(soft09, soft_i2c_init, soft_i2c_probe,
498                          soft_i2c_read, soft_i2c_write, NULL,
499                          CONFIG_SYS_I2C_SOFT_SPEED_10,
500                          CONFIG_SYS_I2C_SOFT_SLAVE_10,
501                          9)
502 #endif
503 #if defined(I2C_SOFT_DECLARATIONS11)
504 U_BOOT_I2C_ADAP_COMPLETE(soft10, soft_i2c_init, soft_i2c_probe,
505                          soft_i2c_read, soft_i2c_write, NULL,
506                          CONFIG_SYS_I2C_SOFT_SPEED_11,
507                          CONFIG_SYS_I2C_SOFT_SLAVE_11,
508                          10)
509 #endif
510 #if defined(I2C_SOFT_DECLARATIONS12)
511 U_BOOT_I2C_ADAP_COMPLETE(soft11, soft_i2c_init, soft_i2c_probe,
512                          soft_i2c_read, soft_i2c_write, NULL,
513                          CONFIG_SYS_I2C_SOFT_SPEED_12,
514                          CONFIG_SYS_I2C_SOFT_SLAVE_12,
515                          11)
516 #endif