drivers/i2c/rk_i2c.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2015 Google, Inc
   4  *
   5  * (C) Copyright 2008-2014 Rockchip Electronics
   6  * Peter, Software Engineering, <superpeter.cai@gmail.com>.
   7  */
   8
   9 #include <common.h>
  10 #include <clk.h>
  11 #include <dm.h>
  12 #include <errno.h>
  13 #include <i2c.h>
  14 #include <log.h>
  15 #include <asm/io.h>
  16 #include <asm/arch-rockchip/clock.h>
  17 #include <asm/arch-rockchip/i2c.h>
  18 #include <asm/arch-rockchip/periph.h>
  19 #include <dm/pinctrl.h>
  20 #include <linux/sizes.h>
  21
  22 /* i2c timerout */
  23 #define I2C_TIMEOUT_MS          100
  24 #define I2C_RETRY_COUNT         3
  25
  26 /* rk i2c fifo max transfer bytes */
  27 #define RK_I2C_FIFO_SIZE        32
  28
  29 struct rk_i2c {
  30         struct clk clk;
  31         struct i2c_regs *regs;
  32         unsigned int speed;
  33 };
  34
  35 enum {
  36         RK_I2C_LEGACY,
  37         RK_I2C_NEW,
  38 };
  39
  40 /**
  41  * @controller_type: i2c controller type
  42  */
  43 struct rk_i2c_soc_data {
  44         int controller_type;
  45 };
  46
  47 static inline void rk_i2c_get_div(int div, int *divh, int *divl)
  48 {
  49         *divl = div / 2;
  50         if (div % 2 == 0)
  51                 *divh = div / 2;
  52         else
  53                 *divh = DIV_ROUND_UP(div, 2);
  54 }
  55
  56 /*
  57  * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
  58  * SCL = PCLK / SCLK Divisor
  59  * i2c_rate = PCLK
  60  */
  61 static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
  62 {
  63         uint32_t i2c_rate;
  64         int div, divl, divh;
  65
  66         /* First get i2c rate from pclk */
  67         i2c_rate = clk_get_rate(&i2c->clk);
  68
  69         div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
  70         divh = 0;
  71         divl = 0;
  72         if (div >= 0)
  73                 rk_i2c_get_div(div, &divh, &divl);
  74         writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);
  75
  76         debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
  77               scl_rate);
  78         debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
  79         debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
  80 }
  81
  82 static void rk_i2c_show_regs(struct i2c_regs *regs)
  83 {
  84 #ifdef DEBUG
  85         uint i;
  86
  87         debug("i2c_con: 0x%08x\n", readl(&regs->con));
  88         debug("i2c_clkdiv: 0x%08x\n", readl(&regs->clkdiv));
  89         debug("i2c_mrxaddr: 0x%08x\n", readl(&regs->mrxaddr));
  90         debug("i2c_mrxraddR: 0x%08x\n", readl(&regs->mrxraddr));
  91         debug("i2c_mtxcnt: 0x%08x\n", readl(&regs->mtxcnt));
  92         debug("i2c_mrxcnt: 0x%08x\n", readl(&regs->mrxcnt));
  93         debug("i2c_ien: 0x%08x\n", readl(&regs->ien));
  94         debug("i2c_ipd: 0x%08x\n", readl(&regs->ipd));
  95         debug("i2c_fcnt: 0x%08x\n", readl(&regs->fcnt));
  96         for (i = 0; i < 8; i++)
  97                 debug("i2c_txdata%d: 0x%08x\n", i, readl(&regs->txdata[i]));
  98         for (i = 0; i < 8; i++)
  99                 debug("i2c_rxdata%d: 0x%08x\n", i, readl(&regs->rxdata[i]));
 100 #endif
 101 }
 102
 103 static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
 104 {
 105         struct i2c_regs *regs = i2c->regs;
 106         ulong start;
 107
 108         debug("I2c Send Start bit.\n");
 109         writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
 110
 111         writel(I2C_CON_EN | I2C_CON_START, &regs->con);
 112         writel(I2C_STARTIEN, &regs->ien);
 113
 114         start = get_timer(0);
 115         while (1) {
 116                 if (readl(&regs->ipd) & I2C_STARTIPD) {
 117                         writel(I2C_STARTIPD, &regs->ipd);
 118                         break;
 119                 }
 120                 if (get_timer(start) > I2C_TIMEOUT_MS) {
 121                         debug("I2C Send Start Bit Timeout\n");
 122                         rk_i2c_show_regs(regs);
 123                         return -ETIMEDOUT;
 124                 }
 125                 udelay(1);
 126         }
 127
 128         return 0;
 129 }
 130
 131 static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
 132 {
 133         struct i2c_regs *regs = i2c->regs;
 134         ulong start;
 135
 136         debug("I2c Send Stop bit.\n");
 137         writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
 138
 139         writel(I2C_CON_EN | I2C_CON_STOP, &regs->con);
 140         writel(I2C_CON_STOP, &regs->ien);
 141
 142         start = get_timer(0);
 143         while (1) {
 144                 if (readl(&regs->ipd) & I2C_STOPIPD) {
 145                         writel(I2C_STOPIPD, &regs->ipd);
 146                         break;
 147                 }
 148                 if (get_timer(start) > I2C_TIMEOUT_MS) {
 149                         debug("I2C Send Start Bit Timeout\n");
 150                         rk_i2c_show_regs(regs);
 151                         return -ETIMEDOUT;
 152                 }
 153                 udelay(1);
 154         }
 155
 156         return 0;
 157 }
 158
 159 static inline void rk_i2c_disable(struct rk_i2c *i2c)
 160 {
 161         writel(0, &i2c->regs->con);
 162 }
 163
 164 static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 165                        uchar *buf, uint b_len)
 166 {
 167         struct i2c_regs *regs = i2c->regs;
 168         uchar *pbuf = buf;
 169         uint bytes_remain_len = b_len;
 170         uint bytes_xferred = 0;
 171         uint words_xferred = 0;
 172         ulong start;
 173         uint con = 0;
 174         uint rxdata;
 175         uint i, j;
 176         int err;
 177         bool snd_chunk = false;
 178
 179         debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
 180               chip, reg, r_len, b_len);
 181
 182         err = rk_i2c_send_start_bit(i2c);
 183         if (err)
 184                 return err;
 185
 186         writel(I2C_MRXADDR_SET(1, chip << 1 | 1), &regs->mrxaddr);
 187         if (r_len == 0) {
 188                 writel(0, &regs->mrxraddr);
 189         } else if (r_len < 4) {
 190                 writel(I2C_MRXRADDR_SET(r_len, reg), &regs->mrxraddr);
 191         } else {
 192                 debug("I2C Read: addr len %d not supported\n", r_len);
 193                 return -EIO;
 194         }
 195
 196         while (bytes_remain_len) {
 197                 if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
 198                         con = I2C_CON_EN;
 199                         bytes_xferred = 32;
 200                 } else {
 201                         /*
 202                          * The hw can read up to 32 bytes at a time. If we need
 203                          * more than one chunk, send an ACK after the last byte.
 204                          */
 205                         con = I2C_CON_EN | I2C_CON_LASTACK;
 206                         bytes_xferred = bytes_remain_len;
 207                 }
 208                 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
 209
 210                 /*
 211                  * make sure we are in plain RX mode if we read a second chunk
 212                  */
 213                 if (snd_chunk)
 214                         con |= I2C_CON_MOD(I2C_MODE_RX);
 215                 else
 216                         con |= I2C_CON_MOD(I2C_MODE_TRX);
 217
 218                 writel(con, &regs->con);
 219                 writel(bytes_xferred, &regs->mrxcnt);
 220                 writel(I2C_MBRFIEN | I2C_NAKRCVIEN, &regs->ien);
 221
 222                 start = get_timer(0);
 223                 while (1) {
 224                         if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
 225                                 writel(I2C_NAKRCVIPD, &regs->ipd);
 226                                 err = -EREMOTEIO;
 227                         }
 228                         if (readl(&regs->ipd) & I2C_MBRFIPD) {
 229                                 writel(I2C_MBRFIPD, &regs->ipd);
 230                                 break;
 231                         }
 232                         if (get_timer(start) > I2C_TIMEOUT_MS) {
 233                                 debug("I2C Read Data Timeout\n");
 234                                 err =  -ETIMEDOUT;
 235                                 rk_i2c_show_regs(regs);
 236                                 goto i2c_exit;
 237                         }
 238                         udelay(1);
 239                 }
 240
 241                 for (i = 0; i < words_xferred; i++) {
 242                         rxdata = readl(&regs->rxdata[i]);
 243                         debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
 244                         for (j = 0; j < 4; j++) {
 245                                 if ((i * 4 + j) == bytes_xferred)
 246                                         break;
 247                                 *pbuf++ = (rxdata >> (j * 8)) & 0xff;
 248                         }
 249                 }
 250
 251                 bytes_remain_len -= bytes_xferred;
 252                 snd_chunk = true;
 253                 debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
 254         }
 255
 256 i2c_exit:
 257         rk_i2c_disable(i2c);
 258
 259         return err;
 260 }
 261
 262 static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 263                         uchar *buf, uint b_len)
 264 {
 265         struct i2c_regs *regs = i2c->regs;
 266         int err;
 267         uchar *pbuf = buf;
 268         uint bytes_remain_len = b_len + r_len + 1;
 269         uint bytes_xferred = 0;
 270         uint words_xferred = 0;
 271         ulong start;
 272         uint txdata;
 273         uint i, j;
 274
 275         debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
 276               chip, reg, r_len, b_len);
 277         err = rk_i2c_send_start_bit(i2c);
 278         if (err)
 279                 return err;
 280
 281         while (bytes_remain_len) {
 282                 if (bytes_remain_len > RK_I2C_FIFO_SIZE)
 283                         bytes_xferred = RK_I2C_FIFO_SIZE;
 284                 else
 285                         bytes_xferred = bytes_remain_len;
 286                 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
 287
 288                 for (i = 0; i < words_xferred; i++) {
 289                         txdata = 0;
 290                         for (j = 0; j < 4; j++) {
 291                                 if ((i * 4 + j) == bytes_xferred)
 292                                         break;
 293
 294                                 if (i == 0 && j == 0 && pbuf == buf) {
 295                                         txdata |= (chip << 1);
 296                                 } else if (i == 0 && j <= r_len && pbuf == buf) {
 297                                         txdata |= (reg &
 298                                                 (0xff << ((j - 1) * 8))) << 8;
 299                                 } else {
 300                                         txdata |= (*pbuf++)<<(j * 8);
 301                                 }
 302                         }
 303                         writel(txdata, &regs->txdata[i]);
 304                         debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
 305                 }
 306
 307                 writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), &regs->con);
 308                 writel(bytes_xferred, &regs->mtxcnt);
 309                 writel(I2C_MBTFIEN | I2C_NAKRCVIEN, &regs->ien);
 310
 311                 start = get_timer(0);
 312                 while (1) {
 313                         if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
 314                                 writel(I2C_NAKRCVIPD, &regs->ipd);
 315                                 err = -EREMOTEIO;
 316                         }
 317                         if (readl(&regs->ipd) & I2C_MBTFIPD) {
 318                                 writel(I2C_MBTFIPD, &regs->ipd);
 319                                 break;
 320                         }
 321                         if (get_timer(start) > I2C_TIMEOUT_MS) {
 322                                 debug("I2C Write Data Timeout\n");
 323                                 err =  -ETIMEDOUT;
 324                                 rk_i2c_show_regs(regs);
 325                                 goto i2c_exit;
 326                         }
 327                         udelay(1);
 328                 }
 329
 330                 bytes_remain_len -= bytes_xferred;
 331                 debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
 332         }
 333
 334 i2c_exit:
 335         rk_i2c_disable(i2c);
 336
 337         return err;
 338 }
 339
 340 static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
 341                              int nmsgs)
 342 {
 343         struct rk_i2c *i2c = dev_get_priv(bus);
 344         int ret;
 345
 346         debug("i2c_xfer: %d messages\n", nmsgs);
 347         for (; nmsgs > 0; nmsgs--, msg++) {
 348                 debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
 349                 if (msg->flags & I2C_M_RD) {
 350                         ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
 351                                           msg->len);
 352                 } else {
 353                         ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
 354                                            msg->len);
 355                 }
 356                 if (ret) {
 357                         debug("i2c_write: error sending\n");
 358                         return -EREMOTEIO;
 359                 }
 360         }
 361
 362         rk_i2c_send_stop_bit(i2c);
 363         rk_i2c_disable(i2c);
 364
 365         return 0;
 366 }
 367
 368 int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
 369 {
 370         struct rk_i2c *i2c = dev_get_priv(bus);
 371
 372         rk_i2c_set_clk(i2c, speed);
 373
 374         return 0;
 375 }
 376
 377 static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
 378 {
 379         struct rk_i2c *priv = dev_get_priv(bus);
 380         int ret;
 381
 382         ret = clk_get_by_index(bus, 0, &priv->clk);
 383         if (ret < 0) {
 384                 debug("%s: Could not get clock for %s: %d\n", __func__,
 385                       bus->name, ret);
 386                 return ret;
 387         }
 388
 389         return 0;
 390 }
 391
 392 static int rockchip_i2c_probe(struct udevice *bus)
 393 {
 394         struct rk_i2c *priv = dev_get_priv(bus);
 395         struct rk_i2c_soc_data *soc_data;
 396         struct udevice *pinctrl;
 397         int bus_nr;
 398         int ret;
 399
 400         priv->regs = dev_read_addr_ptr(bus);
 401
 402         soc_data = (struct rk_i2c_soc_data*)dev_get_driver_data(bus);
 403
 404         if (soc_data->controller_type == RK_I2C_LEGACY) {
 405                 ret = dev_read_alias_seq(bus, &bus_nr);
 406                 if (ret < 0) {
 407                         debug("%s: Could not get alias for %s: %d\n",
 408                          __func__, bus->name, ret);
 409                         return ret;
 410                 }
 411
 412                 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 413                 if (ret) {
 414                         debug("%s: Cannot find pinctrl device\n", __func__);
 415                         return ret;
 416                 }
 417
 418                 /* pinctrl will switch I2C to new type */
 419                 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_I2C0 + bus_nr);
 420                 if (ret) {
 421                         debug("%s: Failed to switch I2C to new type %s: %d\n",
 422                                 __func__, bus->name, ret);
 423                         return ret;
 424                 }
 425         }
 426
 427         return 0;
 428 }
 429
 430 static const struct dm_i2c_ops rockchip_i2c_ops = {
 431         .xfer           = rockchip_i2c_xfer,
 432         .set_bus_speed  = rockchip_i2c_set_bus_speed,
 433 };
 434
 435 static const struct rk_i2c_soc_data rk3066_soc_data = {
 436         .controller_type = RK_I2C_LEGACY,
 437 };
 438
 439 static const struct rk_i2c_soc_data rk3188_soc_data = {
 440         .controller_type = RK_I2C_LEGACY,
 441 };
 442
 443 static const struct rk_i2c_soc_data rk3228_soc_data = {
 444         .controller_type = RK_I2C_NEW,
 445 };
 446
 447 static const struct rk_i2c_soc_data rk3288_soc_data = {
 448         .controller_type = RK_I2C_NEW,
 449 };
 450
 451 static const struct rk_i2c_soc_data rk3328_soc_data = {
 452         .controller_type = RK_I2C_NEW,
 453 };
 454
 455 static const struct rk_i2c_soc_data rk3399_soc_data = {
 456         .controller_type = RK_I2C_NEW,
 457 };
 458
 459 static const struct udevice_id rockchip_i2c_ids[] = {
 460         {
 461                 .compatible = "rockchip,rk3066-i2c",
 462                 .data = (ulong)&rk3066_soc_data,
 463         },
 464         {
 465                 .compatible = "rockchip,rk3188-i2c",
 466                 .data = (ulong)&rk3188_soc_data,
 467         },
 468         {
 469                 .compatible = "rockchip,rk3228-i2c",
 470                 .data = (ulong)&rk3228_soc_data,
 471         },
 472         {
 473                 .compatible = "rockchip,rk3288-i2c",
 474                 .data = (ulong)&rk3288_soc_data,
 475         },
 476         {
 477                 .compatible = "rockchip,rk3328-i2c",
 478                 .data = (ulong)&rk3328_soc_data,
 479         },
 480         {
 481                 .compatible = "rockchip,rk3399-i2c",
 482                 .data = (ulong)&rk3399_soc_data,
 483         },
 484         { }
 485 };
 486
 487 U_BOOT_DRIVER(i2c_rockchip) = {
 488         .name   = "i2c_rockchip",
 489         .id     = UCLASS_I2C,
 490         .of_match = rockchip_i2c_ids,
 491         .ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
 492         .probe  = rockchip_i2c_probe,
 493         .priv_auto_alloc_size = sizeof(struct rk_i2c),
 494         .ops    = &rockchip_i2c_ops,
 495 };