1 // SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/sci/sci.h>
11 #include <asm/arch/sys_proto.h>
12 #include <asm/arch-imx/cpu.h>
13 #include <asm/armv8/cpu.h>
15 DECLARE_GLOBAL_DATA_PTR;
17 struct cpu_imx_platdata {
26 const char *get_imx8_type(u32 imxtype)
30 case MXC_CPU_IMX8QXP_A0:
39 const char *get_imx8_rev(u32 rev)
51 const char *get_core_name(void)
55 else if (is_cortex_a53())
57 else if (is_cortex_a72())
63 #if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
64 static int cpu_imx_get_temp(void)
66 struct udevice *thermal_dev;
69 ret = uclass_get_device_by_name(UCLASS_THERMAL, "cpu-thermal0",
73 ret = thermal_get_temp(thermal_dev, &cpu_tmp);
83 static int cpu_imx_get_temp(void)
89 int cpu_imx_get_desc(struct udevice *dev, char *buf, int size)
91 struct cpu_imx_platdata *plat = dev_get_platdata(dev);
97 ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
98 plat->type, plat->rev, plat->name, plat->freq_mhz);
100 if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
103 ret = snprintf(buf, size, " at %dC", cpu_imx_get_temp());
106 snprintf(buf + ret, size - ret, "\n");
111 static int cpu_imx_get_info(struct udevice *dev, struct cpu_info *info)
113 struct cpu_imx_platdata *plat = dev_get_platdata(dev);
115 info->cpu_freq = plat->freq_mhz * 1000;
116 info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
120 static int cpu_imx_get_count(struct udevice *dev)
125 ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
126 const char *device_type;
128 if (!ofnode_is_available(node))
131 device_type = ofnode_read_string(node, "device_type");
135 if (!strcmp(device_type, "cpu"))
142 static int cpu_imx_get_vendor(struct udevice *dev, char *buf, int size)
144 snprintf(buf, size, "NXP");
148 static int cpu_imx_is_current(struct udevice *dev)
150 struct cpu_imx_platdata *plat = dev_get_platdata(dev);
152 if (plat->mpidr == (read_mpidr() & 0xffff))
158 static const struct cpu_ops cpu_imx8_ops = {
159 .get_desc = cpu_imx_get_desc,
160 .get_info = cpu_imx_get_info,
161 .get_count = cpu_imx_get_count,
162 .get_vendor = cpu_imx_get_vendor,
163 .is_current = cpu_imx_is_current,
166 static const struct udevice_id cpu_imx8_ids[] = {
167 { .compatible = "arm,cortex-a35" },
168 { .compatible = "arm,cortex-a53" },
169 { .compatible = "arm,cortex-a72" },
173 static ulong imx8_get_cpu_rate(void)
177 int type = is_cortex_a35() ? SC_R_A35 : is_cortex_a53() ?
180 ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU,
181 (sc_pm_clock_rate_t *)&rate);
183 printf("Could not read CPU frequency: %d\n", ret);
190 static int imx8_cpu_probe(struct udevice *dev)
192 struct cpu_imx_platdata *plat = dev_get_platdata(dev);
195 cpurev = get_cpu_rev();
196 plat->cpurev = cpurev;
197 plat->name = get_core_name();
198 plat->rev = get_imx8_rev(cpurev & 0xFFF);
199 plat->type = get_imx8_type((cpurev & 0xFF000) >> 12);
200 plat->freq_mhz = imx8_get_cpu_rate() / 1000000;
201 plat->mpidr = dev_read_addr(dev);
202 if (plat->mpidr == FDT_ADDR_T_NONE) {
203 printf("%s: Failed to get CPU reg property\n", __func__);
210 U_BOOT_DRIVER(cpu_imx8_drv) = {
213 .of_match = cpu_imx8_ids,
214 .ops = &cpu_imx8_ops,
215 .probe = imx8_cpu_probe,
216 .platdata_auto_alloc_size = sizeof(struct cpu_imx_platdata),
217 .flags = DM_FLAG_PRE_RELOC,