1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
10 #include <clk-uclass.h>
11 #include <dm/device.h>
12 #include <dm/devres.h>
13 #include <linux/clk-provider.h>
15 #include <linux/err.h>
19 #define UBOOT_DM_CLK_COMPOSITE "clk_composite"
21 static u8 clk_composite_get_parent(struct clk *clk)
23 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
24 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
25 struct clk *mux = composite->mux;
27 return clk_mux_get_parent(mux);
30 static int clk_composite_set_parent(struct clk *clk, struct clk *parent)
32 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
33 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
34 const struct clk_ops *mux_ops = composite->mux_ops;
35 struct clk *mux = composite->mux;
37 return mux_ops->set_parent(mux, parent);
40 static unsigned long clk_composite_recalc_rate(struct clk *clk)
42 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
43 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
44 const struct clk_ops *rate_ops = composite->rate_ops;
45 struct clk *rate = composite->rate;
47 return rate_ops->get_rate(rate);
50 static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate)
52 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
53 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
54 const struct clk_ops *rate_ops = composite->rate_ops;
55 struct clk *clk_rate = composite->rate;
57 return rate_ops->set_rate(clk_rate, rate);
60 static int clk_composite_enable(struct clk *clk)
62 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
63 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
64 const struct clk_ops *gate_ops = composite->gate_ops;
65 struct clk *gate = composite->gate;
67 return gate_ops->enable(gate);
70 static int clk_composite_disable(struct clk *clk)
72 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
73 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
74 const struct clk_ops *gate_ops = composite->gate_ops;
75 struct clk *gate = composite->gate;
77 gate_ops->disable(gate);
82 struct clk_ops clk_composite_ops = {
83 /* This will be set according to clk_register_composite */
86 struct clk *clk_register_composite(struct device *dev, const char *name,
87 const char * const *parent_names,
88 int num_parents, struct clk *mux,
89 const struct clk_ops *mux_ops,
91 const struct clk_ops *rate_ops,
93 const struct clk_ops *gate_ops,
97 struct clk_composite *composite;
99 struct clk_ops *composite_ops = &clk_composite_ops;
101 composite = kzalloc(sizeof(*composite), GFP_KERNEL);
103 return ERR_PTR(-ENOMEM);
105 if (mux && mux_ops) {
106 composite->mux = mux;
107 composite->mux_ops = mux_ops;
108 if (mux_ops->set_parent)
109 composite_ops->set_parent = clk_composite_set_parent;
110 mux->data = (ulong)composite;
113 if (rate && rate_ops) {
114 if (!rate_ops->get_rate) {
115 clk = ERR_PTR(-EINVAL);
118 composite_ops->get_rate = clk_composite_recalc_rate;
120 /* .set_rate requires either .round_rate or .determine_rate */
121 if (rate_ops->set_rate)
122 composite_ops->set_rate = clk_composite_set_rate;
124 composite->rate = rate;
125 composite->rate_ops = rate_ops;
126 rate->data = (ulong)composite;
129 if (gate && gate_ops) {
130 if (!gate_ops->enable || !gate_ops->disable) {
131 clk = ERR_PTR(-EINVAL);
135 composite->gate = gate;
136 composite->gate_ops = gate_ops;
137 composite_ops->enable = clk_composite_enable;
138 composite_ops->disable = clk_composite_disable;
139 gate->data = (ulong)composite;
142 clk = &composite->clk;
143 ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name,
144 parent_names[clk_composite_get_parent(clk)]);
157 U_BOOT_DRIVER(clk_composite) = {
158 .name = UBOOT_DM_CLK_COMPOSITE,
160 .ops = &clk_composite_ops,
161 .flags = DM_FLAG_PRE_RELOC,