1 # SPDX-License-Identifier: GPL-2.0+
3 # Copyright (C) 2014, Simon Glass <sjg@chromium.org>
4 # Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
9 This document describes the information about U-Boot running on x86 targets,
10 including supported boards, build instructions, todo list, etc.
14 U-Boot supports running as a coreboot [1] payload on x86. So far only Link
15 (Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should
16 work with minimal adjustments on other x86 boards since coreboot deals with
17 most of the low-level details.
19 U-Boot is a main bootloader on Intel Edison board.
21 U-Boot also supports booting directly from x86 reset vector, without coreboot.
22 In this case, known as bare mode, from the fact that it runs on the
23 'bare metal', U-Boot acts like a BIOS replacement. The following platforms
28 - Congatec QEVAL 2.0 & conga-QA3/E3845
32 - Link (Chromebook Pixel)
34 - Samus (Chromebook Pixel 2015)
35 - QEMU x86 (32-bit & 64-bit)
37 As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit
38 Linux kernel as part of a FIT image. It also supports a compressed zImage.
39 U-Boot supports loading an x86 VxWorks kernel. Please check README.vxworks
42 Build Instructions for U-Boot as coreboot payload
43 -------------------------------------------------
44 Building U-Boot as a coreboot payload is just like building U-Boot for targets
45 on other architectures, like below:
47 $ make coreboot_defconfig
50 Build Instructions for U-Boot as BIOS replacement (bare mode)
51 -------------------------------------------------------------
52 Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a
53 little bit tricky, as generally it requires several binary blobs which are not
54 shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is
55 not turned on by default in the U-Boot source tree. Firstly, you need turn it
56 on by enabling the ROM build either via an environment variable
64 Both tell the Makefile to build u-boot.rom as a target.
68 Chromebook Samus (2015 Pixel) instructions for bare mode:
70 First, you need the following binary blobs:
72 * descriptor.bin - Intel flash descriptor
73 * me.bin - Intel Management Engine
74 * mrc.bin - Memory Reference Code, which sets up SDRAM
75 * refcode.elf - Additional Reference code
76 * vga.bin - video ROM, which sets up the display
78 If you have a samus you can obtain them from your flash, for example, in
79 developer mode on the Chromebook (use Ctrl-Alt-F2 to obtain a terminal and
84 scp samus.bin username@ip_address:/path/to/somewhere
86 If not see the coreboot tree [4] where you can use:
88 bash crosfirmware.sh samus
90 to get the image. There is also an 'extract_blobs.sh' scripts that you can use
91 on the 'coreboot-Google_Samus.*' file to short-circuit some of the below.
93 Then 'ifdtool -x samus.bin' on your development machine will produce:
95 flashregion_0_flashdescriptor.bin
96 flashregion_1_bios.bin
97 flashregion_2_intel_me.bin
99 Rename flashregion_0_flashdescriptor.bin to descriptor.bin
100 Rename flashregion_2_intel_me.bin to me.bin
101 You can ignore flashregion_1_bios.bin - it is not used.
103 To get the rest, use 'cbfstool samus.bin print':
105 samus.bin: 8192 kB, bootblocksize 2864, romsize 8388608, offset 0x700000
106 alignment: 64 bytes, architecture: x86
108 Name Offset Type Size
109 cmos_layout.bin 0x700000 cmos_layout 1164
110 pci8086,0406.rom 0x7004c0 optionrom 65536
111 spd.bin 0x710500 (unknown) 4096
112 cpu_microcode_blob.bin 0x711540 microcode 70720
113 fallback/romstage 0x722a00 stage 54210
114 fallback/ramstage 0x72fe00 stage 96382
115 config 0x7476c0 raw 6075
116 fallback/vboot 0x748ec0 stage 15980
117 fallback/refcode 0x74cd80 stage 75578
118 fallback/payload 0x75f500 payload 62878
119 u-boot.dtb 0x76eb00 (unknown) 5318
120 (empty) 0x770000 null 196504
121 mrc.bin 0x79ffc0 (unknown) 222876
122 (empty) 0x7d66c0 null 167320
124 You can extract what you need:
126 cbfstool samus.bin extract -n pci8086,0406.rom -f vga.bin
127 cbfstool samus.bin extract -n fallback/refcode -f refcode.rmod
128 cbfstool samus.bin extract -n mrc.bin -f mrc.bin
129 cbfstool samus.bin extract -n fallback/refcode -f refcode.bin -U
131 Note that the -U flag is only supported by the latest cbfstool. It unpacks
132 and decompresses the stage to produce a coreboot rmodule. This is a simple
133 representation of an ELF file. You need the patch "Support decoding a stage
136 Put all 5 files into board/google/chromebook_samus.
138 Now you can build U-Boot and obtain u-boot.rom:
140 $ make chromebook_link_defconfig
143 If you are using em100, then this command will flash write -Boot:
145 em100 -s -d filename.rom -c W25Q64CV -r
147 Flash map for samus / broadwell:
149 fffff800 SYS_X86_START16
150 ffff0000 RESET_SEG_START
151 fffd8000 TPL_TEXT_BASE
152 fffa0000 X86_MRC_ADDR
153 fff90000 VGA_BIOS_ADDR
154 ffed0000 SYS_TEXT_BASE
155 ffea0000 X86_REFCODE_ADDR
156 ffe70000 SPL_TEXT_BASE
157 ffbf8000 CONFIG_ENV_OFFSET (environemnt offset)
158 ffbe0000 rw-mrc-cache (Memory-reference-code cache)
160 ff801000 intel-me (address set by descriptor.bin)
161 ff800000 intel-descriptor
165 QEMU x86 target instructions for bare mode:
167 To build u-boot.rom for QEMU x86 targets, just simply run
169 $ make qemu-x86_defconfig (for 32-bit)
171 $ make qemu-x86_64_defconfig (for 64-bit)
174 Note this default configuration will build a U-Boot for the QEMU x86 i440FX
175 board. To build a U-Boot against QEMU x86 Q35 board, you can change the build
176 configuration during the 'make menuconfig' process like below:
178 Device Tree Control --->
180 (qemu-x86_q35) Default Device Tree for DT control
184 For testing U-Boot as the coreboot payload, there are things that need be paid
185 attention to. coreboot supports loading an ELF executable and a 32-bit plain
186 binary, as well as other supported payloads. With the default configuration,
187 U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the
188 generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool
189 provided by coreboot) manually as coreboot's 'make menuconfig' does not provide
190 this capability yet. The command is as follows:
192 # in the coreboot root directory
193 $ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
194 -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
196 Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address
197 of _x86boot_start (in arch/x86/cpu/start.S).
199 If you want to use ELF as the coreboot payload, change U-Boot configuration to
200 use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
202 To enable video you must enable these options in coreboot:
204 - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
205 - Keep VESA framebuffer
207 At present it seems that for Minnowboard Max, coreboot does not pass through
208 the video information correctly (it always says the resolution is 0x0). This
209 works correctly for link though.
211 Test with QEMU for bare mode
212 ----------------------------
213 QEMU is a fancy emulator that can enable us to test U-Boot without access to
214 a real x86 board. Please make sure your QEMU version is 2.3.0 or above test
215 U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows:
217 $ qemu-system-i386 -nographic -bios path/to/u-boot.rom
219 This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU
220 also supports emulating an x86 board with Q35 and ICH9 based chipset, which is
221 also supported by U-Boot. To instantiate such a machine, call QEMU with:
223 $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35
225 Note by default QEMU instantiated boards only have 128 MiB system memory. But
226 it is enough to have U-Boot boot and function correctly. You can increase the
227 system memory by pass '-m' parameter to QEMU if you want more memory:
229 $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024
231 This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only
232 supports 3 GiB maximum system memory and reserves the last 1 GiB address space
233 for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m'
236 QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will
237 show QEMU's VGA console window. Note this will disable QEMU's serial output.
238 If you want to check both consoles, use '-serial stdio'.
240 Multicore is also supported by QEMU via '-smp n' where n is the number of cores
241 to instantiate. Note, the maximum supported CPU number in QEMU is 255.
243 The fw_cfg interface in QEMU also provides information about kernel data,
244 initrd, command-line arguments and more. U-Boot supports directly accessing
245 these informtion from fw_cfg interface, which saves the time of loading them
246 from hard disk or network again, through emulated devices. To use it , simply
247 providing them in QEMU command line:
249 $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel /path/to/bzImage
250 -append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8
252 Note: -initrd and -smp are both optional
254 Then start QEMU, in U-Boot command line use the following U-Boot command to
258 qfw - QEMU firmware interface
262 - list : print firmware(s) currently loaded
263 - cpus : print online cpu number
264 - load <kernel addr> <initrd addr> : load kernel and initrd (if any) and setup for zboot
267 loading kernel to address 01000000 size 5d9d30 initrd 04000000 size 1b1ab50
269 Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then,
270 'zboot' can be used to boot the kernel:
272 => zboot 01000000 - 04000000 1b1ab50
274 To run 64-bit U-Boot, qemu-system-x86_64 should be used instead, e.g.:
275 $ qemu-system-x86_64 -nographic -bios path/to/u-boot.rom
277 A specific CPU can be specified via the '-cpu' parameter but please make
278 sure the specified CPU supports 64-bit like '-cpu core2duo'. Conversely
279 '-cpu pentium' won't work for obvious reasons that the processor only
282 Note 64-bit support is very preliminary at this point. Lots of features
283 are missing in the 64-bit world. One notable feature is the VGA console
284 support which is currently missing, so that you must specify '-nographic'
285 to get 64-bit U-Boot up and running.
289 Modern CPUs usually require a special bit stream called microcode [8] to be
290 loaded on the processor after power up in order to function properly. U-Boot
291 has already integrated these as hex dumps in the source tree.
295 On a multicore system, U-Boot is executed on the bootstrap processor (BSP).
296 Additional application processors (AP) can be brought up by U-Boot. In order to
297 have an SMP kernel to discover all of the available processors, U-Boot needs to
298 prepare configuration tables which contain the multi-CPUs information before
299 loading the OS kernel. Currently U-Boot supports generating two types of tables
300 for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP)
301 [10] tables. The writing of these two tables are controlled by two Kconfig
302 options GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
306 x86 has been converted to use driver model for serial, GPIO, SPI, SPI flash,
307 keyboard, real-time clock, USB. Video is in progress.
311 x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to
312 be turned on. Not every device on the board is configured via device tree, but
313 more and more devices will be added as time goes by. Check out the directory
314 arch/x86/dts/ for these device tree source files.
318 In keeping with the U-Boot philosophy of providing functions to check and
319 adjust internal settings, there are several x86-specific commands that may be
322 fsp - Display information about Intel Firmware Support Package (FSP).
323 This is only available on platforms which use FSP, mostly Atom.
324 iod - Display I/O memory
325 iow - Write I/O memory
326 mtrr - List and set the Memory Type Range Registers (MTRR). These are used to
327 tell the CPU whether memory is cacheable and if so the cache write
328 mode to use. U-Boot sets up some reasonable values but you can
329 adjust then with this command.
333 As an example of how to set up your boot flow with U-Boot, here are
334 instructions for starting Ubuntu from U-Boot. These instructions have been
335 tested on Minnowboard MAX with a SATA drive but are equally applicable on
336 other platforms and other media. There are really only four steps and it's a
337 very simple script, but a more detailed explanation is provided here for
340 Note: It is possible to set up U-Boot to boot automatically using syslinux.
341 It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the
342 GUID. If you figure these out, please post patches to this README.
344 Firstly, you will need Ubuntu installed on an available disk. It should be
345 possible to make U-Boot start a USB start-up disk but for now let's assume
346 that you used another boot loader to install Ubuntu.
348 Use the U-Boot command line to find the UUID of the partition you want to
349 boot. For example our disk is SCSI device 0:
353 Partition Map for SCSI device 0 -- Partition Type: EFI
355 Part Start LBA End LBA Name
359 1 0x00000800 0x001007ff ""
360 attrs: 0x0000000000000000
361 type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b
362 guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c
363 2 0x00100800 0x037d8fff ""
364 attrs: 0x0000000000000000
365 type: 0fc63daf-8483-4772-8e79-3d69d8477de4
366 guid: 965c59ee-1822-4326-90d2-b02446050059
367 3 0x037d9000 0x03ba27ff ""
368 attrs: 0x0000000000000000
369 type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f
370 guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17
373 This shows that your SCSI disk has three partitions. The really long hex
374 strings are called Globally Unique Identifiers (GUIDs). You can look up the
375 'type' ones here [11]. On this disk the first partition is for EFI and is in
376 VFAT format (DOS/Windows):
384 Partition 2 is 'Linux filesystem data' so that will be our root disk. It is
390 <DIR> 16384 lost+found
413 <SYM> 33 initrd.img.old
416 and if you look in the /boot directory you will see the kernel:
418 => ext2ls scsi 0:2 /boot
423 3381262 System.map-3.13.0-32-generic
424 1162712 abi-3.13.0-32-generic
425 165611 config-3.13.0-32-generic
426 176500 memtest86+.bin
427 178176 memtest86+.elf
428 178680 memtest86+_multiboot.bin
429 5798112 vmlinuz-3.13.0-32-generic
430 165762 config-3.13.0-58-generic
431 1165129 abi-3.13.0-58-generic
432 5823136 vmlinuz-3.13.0-58-generic
433 19215259 initrd.img-3.13.0-58-generic
434 3391763 System.map-3.13.0-58-generic
435 5825048 vmlinuz-3.13.0-58-generic.efi.signed
436 28304443 initrd.img-3.13.0-32-generic
439 The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of
440 self-extracting compressed file mixed with some 'setup' configuration data.
441 Despite its size (uncompressed it is >10MB) this only includes a basic set of
442 device drivers, enough to boot on most hardware types.
444 The 'initrd' files contain a RAM disk. This is something that can be loaded
445 into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots
446 of drivers for whatever hardware you might have. It is loaded before the
447 real root disk is accessed.
449 The numbers after the end of each file are the version. Here it is Linux
450 version 3.13. You can find the source code for this in the Linux tree with
451 the tag v3.13. The '.0' allows for additional Linux releases to fix problems,
452 but normally this is not needed. The '-58' is used by Ubuntu. Each time they
453 release a new kernel they increment this number. New Ubuntu versions might
454 include kernel patches to fix reported bugs. Stable kernels can exist for
455 some years so this number can get quite high.
457 The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own
458 secure boot mechanism - see [12] [13] and cannot read .efi files at present.
460 To boot Ubuntu from U-Boot the steps are as follows:
462 1. Set up the boot arguments. Use the GUID for the partition you want to
465 => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
467 Here root= tells Linux the location of its root disk. The disk is specified
468 by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory'
469 containing all the GUIDs Linux has found. When it starts up, there will be a
470 file in that directory with this name in it. It is also possible to use a
471 device name here, see later.
473 2. Load the kernel. Since it is an ext2/4 filesystem we can do:
475 => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic
477 The address 30000000 is arbitrary, but there seem to be problems with using
478 small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into
479 the start of RAM (which is at 0 on x86).
481 3. Load the ramdisk (to 64MB):
483 => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic
485 4. Start up the kernel. We need to know the size of the ramdisk, but can use
486 a variable for that. U-Boot sets 'filesize' to the size of the last file it
489 => zboot 03000000 0 04000000 ${filesize}
491 Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is
492 quite verbose when it boots a kernel. You should see these messages from
496 Setup Size = 0x00004400
497 Magic signature found
498 Using boot protocol version 2.0c
499 Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015
500 Building boot_params at 0x00090000
501 Loading bzImage at address 100000 (5805728 bytes)
502 Magic signature found
503 Initial RAM disk at linear address 0x04000000, size 19215259 bytes
504 Kernel command line: "root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
508 U-Boot prints out some bootstage timing. This is more useful if you put the
509 above commands into a script since then it will be faster.
511 Timer summary in microseconds:
514 241,535 241,535 board_init_r
515 2,421,611 2,180,076 id=64
517 2,428,215 6,425 main_loop
518 48,860,584 46,432,369 start_kernel
522 1,422,704 vesa display
524 Now the kernel actually starts: (if you want to examine kernel boot up message
525 on the serial console, append "console=ttyS0,115200" to the kernel command line)
527 [ 0.000000] Initializing cgroup subsys cpuset
528 [ 0.000000] Initializing cgroup subsys cpu
529 [ 0.000000] Initializing cgroup subsys cpuacct
530 [ 0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22)
531 [ 0.000000] Command line: root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro console=ttyS0,115200
533 It continues for a long time. Along the way you will see it pick up your
536 [ 0.000000] RAMDISK: [mem 0x04000000-0x05253fff]
538 [ 0.788540] Trying to unpack rootfs image as initramfs...
539 [ 1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000)
542 Later it actually starts using it:
544 Begin: Running /scripts/local-premount ... done.
546 You should also see your boot disk turn up:
548 [ 4.357243] scsi 1:0:0:0: Direct-Access ATA ADATA SP310 5.2 PQ: 0 ANSI: 5
549 [ 4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB)
550 [ 4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0
551 [ 4.381859] sd 1:0:0:0: [sda] Write Protect is off
552 [ 4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
553 [ 4.399535] sda: sda1 sda2 sda3
555 Linux has found the three partitions (sda1-3). Mercifully it doesn't print out
556 the GUIDs. In step 1 above we could have used:
558 setenv bootargs root=/dev/sda2 ro
560 instead of the GUID. However if you add another drive to your board the
561 numbering may change whereas the GUIDs will not. So if your boot partition
562 becomes sdb2, it will still boot. For embedded systems where you just want to
563 boot the first disk, you have that option.
565 The last thing you will see on the console is mention of plymouth (which
566 displays the Ubuntu start-up screen) and a lot of 'Starting' messages:
568 * Starting Mount filesystems on boot [ OK ]
570 After a pause you should see a login screen on your display and you are done.
572 If you want to put this in a script you can use something like this:
574 setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro
575 setenv boot zboot 03000000 0 04000000 \${filesize}
576 setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot"
579 The \ is to tell the shell not to evaluate ${filesize} as part of the setenv
582 You can also bake this behaviour into your build by hard-coding the
583 environment variables if you add this to minnowmax.h:
585 #undef CONFIG_BOOTCOMMAND
586 #define CONFIG_BOOTCOMMAND \
587 "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \
588 "ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \
591 #undef CONFIG_EXTRA_ENV_SETTINGS
592 #define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
594 and change CONFIG_BOOTARGS value in configs/minnowmax_defconfig to:
596 CONFIG_BOOTARGS="root=/dev/sda2 ro"
600 SeaBIOS [14] is an open source implementation of a 16-bit x86 BIOS. It can run
601 in an emulator or natively on x86 hardware with the use of U-Boot. With its
602 help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS.
604 As U-Boot, we have to manually create a table where SeaBIOS gets various system
605 information (eg: E820) from. The table unfortunately has to follow the coreboot
606 table format as SeaBIOS currently supports booting as a coreboot payload.
608 To support loading SeaBIOS, U-Boot should be built with CONFIG_SEABIOS on.
609 Booting SeaBIOS is done via U-Boot's bootelf command, like below:
611 => tftp bios.bin.elf;bootelf
613 TFTP from server 10.10.0.100; our IP address is 10.10.0.108
615 Bytes transferred = 122124 (1dd0c hex)
616 ## Starting application at 0x000ff06e ...
617 SeaBIOS (version rel-1.9.0)
620 bios.bin.elf is the SeaBIOS image built from SeaBIOS source tree.
621 Make sure it is built as follows:
625 Inside the "General Features" menu, select "Build for coreboot" as the
626 "Build Target". Inside the "Debugging" menu, turn on "Serial port debugging"
627 so that we can see something as soon as SeaBIOS boots. Leave other options
628 as in their default state. Then,
632 Total size: 121888 Fixed: 66496 Free: 9184 (used 93.0% of 128KiB rom)
633 Creating out/bios.bin.elf
635 Currently this is tested on QEMU x86 target with U-Boot chain-loading SeaBIOS
636 to install/boot a Windows XP OS (below for example command to install Windows).
638 # Create a 10G disk.img as the virtual hard disk
639 $ qemu-img create -f qcow2 disk.img 10G
641 # Install a Windows XP OS from an ISO image 'winxp.iso'
642 $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -cdrom winxp.iso -smp 2 -m 512
644 # Boot a Windows XP OS installed on the virutal hard disk
645 $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -smp 2 -m 512
647 This is also tested on Intel Crown Bay board with a PCIe graphics card, booting
648 SeaBIOS then chain-loading a GRUB on a USB drive, then Linux kernel finally.
650 If you are using Intel Integrated Graphics Device (IGD) as the primary display
651 device on your board, SeaBIOS needs to be patched manually to get its VGA ROM
652 loaded and run by SeaBIOS. SeaBIOS locates VGA ROM via the PCI expansion ROM
653 register, but IGD device does not have its VGA ROM mapped by this register.
654 Its VGA ROM is packaged as part of u-boot.rom at a configurable flash address
655 which is unknown to SeaBIOS. An example patch is needed for SeaBIOS below:
657 diff --git a/src/optionroms.c b/src/optionroms.c
658 index 65f7fe0..c7b6f5e 100644
659 --- a/src/optionroms.c
660 +++ b/src/optionroms.c
661 @@ -324,6 +324,8 @@ init_pcirom(struct pci_device *pci, int isvga, u64 *sources)
662 rom = deploy_romfile(file);
663 else if (RunPCIroms > 1 || (RunPCIroms == 1 && isvga))
664 rom = map_pcirom(pci);
665 + if (pci->bdf == pci_to_bdf(0, 2, 0))
666 + rom = (struct rom_header *)0xfff90000;
671 Note: the patch above expects IGD device is at PCI b.d.f 0.2.0 and its VGA ROM
672 is at 0xfff90000 which corresponds to CONFIG_VGA_BIOS_ADDR on Minnowboard MAX.
673 Change these two accordingly if this is not the case on your board.
677 These notes are for those who want to port U-Boot to a new x86 platform.
679 Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment.
680 The Dediprog em100 can be used on Linux. The em100 tool is available here:
682 http://review.coreboot.org/p/em100.git
684 On Minnowboard Max the following command line can be used:
686 sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r
688 A suitable clip for connecting over the SPI flash chip is here:
690 http://www.dediprog.com/pd/programmer-accessories/EM-TC-8
692 This allows you to override the SPI flash contents for development purposes.
693 Typically you can write to the em100 in around 1200ms, considerably faster
694 than programming the real flash device each time. The only important
695 limitation of the em100 is that it only supports SPI bus speeds up to 20MHz.
696 This means that images must be set to boot with that speed. This is an
697 Intel-specific feature - e.g. tools/ifttool has an option to set the SPI
698 speed in the SPI descriptor region.
700 If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly
701 easy to fit it in. You can follow the Minnowboard Max implementation, for
702 example. Hopefully you will just need to create new files similar to those
703 in arch/x86/cpu/baytrail which provide Bay Trail support.
705 If you are not using an FSP you have more freedom and more responsibility.
706 The ivybridge support works this way, although it still uses a ROM for
707 graphics and still has binary blobs containing Intel code. You should aim to
708 support all important peripherals on your platform including video and storage.
709 Use the device tree for configuration where possible.
711 For the microcode you can create a suitable device tree file using the
714 ./tools/microcode-tool -d microcode.dat -m <model> create
716 or if you only have header files and not the full Intel microcode.dat database:
718 ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \
719 -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \
722 These are written to arch/x86/dts/microcode/ by default.
724 Note that it is possible to just add the micrcode for your CPU if you know its
725 model. U-Boot prints this information when it starts
727 CPU: x86_64, vendor Intel, device 30673h
729 so here we can use the M0130673322 file.
731 If you platform can display POST codes on two little 7-segment displays on
732 the board, then you can use post_code() calls from C or assembler to monitor
733 boot progress. This can be good for debugging.
735 If not, you can try to get serial working as early as possible. The early
736 debug serial port may be useful here. See setup_internal_uart() for an example.
738 During the U-Boot porting, one of the important steps is to write correct PIRQ
739 routing information in the board device tree. Without it, device drivers in the
740 Linux kernel won't function correctly due to interrupt is not working. Please
741 refer to U-Boot doc [15] for the device tree bindings of Intel interrupt router.
742 Here we have more details on the intel,pirq-routing property below.
744 intel,pirq-routing = <
745 PCI_BDF(0, 2, 0) INTA PIRQA
749 As you see each entry has 3 cells. For the first one, we need describe all pci
750 devices mounted on the board. For SoC devices, normally there is a chapter on
751 the chipset datasheet which lists all the available PCI devices. For example on
752 Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we
753 can get the interrupt pin either from datasheet or hardware via U-Boot shell.
754 The reliable source is the hardware as sometimes chipset datasheet is not 100%
755 up-to-date. Type 'pci header' plus the device's pci bus/device/function number
756 from U-Boot shell below.
762 interrupt line = 0x09
766 It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin
767 register. Repeat this until you get interrupt pins for all the devices. The last
768 cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel
769 chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This
770 can be changed by registers in LPC bridge. So far Intel FSP does not touch those
771 registers so we can write down the PIRQ according to the default mapping rule.
773 Once we get the PIRQ routing information in the device tree, the interrupt
774 allocation and assignment will be done by U-Boot automatically. Now you can
775 enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and
776 CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC.
778 This script might be useful. If you feed it the output of 'pci long' from
779 U-Boot then it will generate a device tree fragment with the interrupt
780 configuration for each device (note it needs gawk 4.0.0):
782 $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \
783 /interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \
784 {patsplit(device, bdf, "[0-9a-f]+"); \
785 printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \
786 strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}'
789 PCI_BDF(0, 2, 0) INTA PIRQA
790 PCI_BDF(0, 3, 0) INTA PIRQA
796 Quark-specific considerations:
798 To port U-Boot to other boards based on the Intel Quark SoC, a few things need
799 to be taken care of. The first important part is the Memory Reference Code (MRC)
800 parameters. Quark MRC supports memory-down configuration only. All these MRC
801 parameters are supplied via the board device tree. To get started, first copy
802 the MRC section of arch/x86/dts/galileo.dts to your board's device tree, then
803 change these values by consulting board manuals or your hardware vendor.
804 Available MRC parameter values are listed in include/dt-bindings/mrc/quark.h.
805 The other tricky part is with PCIe. Quark SoC integrates two PCIe root ports,
806 but by default they are held in reset after power on. In U-Boot, PCIe
807 initialization is properly handled as per Quark's firmware writer guide.
808 In your board support codes, you need provide two routines to aid PCIe
809 initialization, which are board_assert_perst() and board_deassert_perst().
810 The two routines need implement a board-specific mechanism to assert/deassert
811 PCIe PERST# pin. Care must be taken that in those routines that any APIs that
812 may trigger PCI enumeration process are strictly forbidden, as any access to
813 PCIe root port's configuration registers will cause system hang while it is
814 held in reset. For more details, check how they are implemented by the Intel
815 Galileo board support codes in board/intel/galileo/galileo.c.
819 See scripts/coreboot.sed which can assist with porting coreboot code into
820 U-Boot drivers. It will not resolve all build errors, but will perform common
821 transformations. Remember to add attribution to coreboot for new files added
822 to U-Boot. This should go at the top of each file and list the coreboot
823 filename where the code originated.
825 Debugging ACPI issues with Windows:
827 Windows might cache system information and only detect ACPI changes if you
828 modify the ACPI table versions. So tweak them liberally when debugging ACPI
833 Advanced Configuration and Power Interface (ACPI) [16] aims to establish
834 industry-standard interfaces enabling OS-directed configuration, power
835 management, and thermal management of mobile, desktop, and server platforms.
837 Linux can boot without ACPI with "acpi=off" command line parameter, but
838 with ACPI the kernel gains the capabilities to handle power management.
839 For Windows, ACPI is a must-have firmware feature since Windows Vista.
840 CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
841 U-Boot. This requires Intel ACPI compiler to be installed on your host to
842 compile ACPI DSDT table written in ASL format to AML format. You can get
843 the compiler via "apt-get install iasl" if you are on Ubuntu or download
844 the source from [17] to compile one by yourself.
846 Current ACPI support in U-Boot is basically complete. More optional features
847 can be added in the future. The status as of today is:
849 * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
850 * Support one static DSDT table only, compiled by Intel ACPI compiler.
851 * Support S0/S3/S4/S5, reboot and shutdown from OS.
852 * Support booting a pre-installed Ubuntu distribution via 'zboot' command.
853 * Support installing and booting Ubuntu 14.04 (or above) from U-Boot with
854 the help of SeaBIOS using legacy interface (non-UEFI mode).
855 * Support installing and booting Windows 8.1/10 from U-Boot with the help
856 of SeaBIOS using legacy interface (non-UEFI mode).
857 * Support ACPI interrupts with SCI only.
859 Features that are optional:
860 * Dynamic AML bytecodes insertion at run-time. We may need this to support
861 SSDT table generation and DSDT fix up.
862 * SMI support. Since U-Boot is a modern bootloader, we don't want to bring
863 those legacy stuff into U-Boot. ACPI spec allows a system that does not
864 support SMI (a legacy-free system).
866 ACPI was initially enabled on BayTrail based boards. Testing was done by booting
867 a pre-installed Ubuntu 14.04 from a SATA drive. Installing Ubuntu 14.04 and
868 Windows 8.1/10 to a SATA drive and booting from there is also tested. Most
869 devices seem to work correctly and the board can respond a reboot/shutdown
872 For other platform boards, ACPI support status can be checked by examining their
873 board defconfig files to see if CONFIG_GENERATE_ACPI_TABLE is set to y.
875 The S3 sleeping state is a low wake latency sleeping state defined by ACPI
876 spec where all system context is lost except system memory. To test S3 resume
877 with a Linux kernel, simply run "echo mem > /sys/power/state" and kernel will
878 put the board to S3 state where the power is off. So when the power button is
879 pressed again, U-Boot runs as it does in cold boot and detects the sleeping
880 state via ACPI register to see if it is S3, if yes it means we are waking up.
881 U-Boot is responsible for restoring the machine state as it is before sleep.
882 When everything is done, U-Boot finds out the wakeup vector provided by OSes
883 and jump there. To determine whether ACPI S3 resume is supported, check to
884 see if CONFIG_HAVE_ACPI_RESUME is set for that specific board.
886 Note for testing S3 resume with Windows, correct graphics driver must be
887 installed for your platform, otherwise you won't find "Sleep" option in
888 the "Power" submenu from the Windows start menu.
892 U-Boot supports booting as a 32-bit or 64-bit EFI payload, e.g. with UEFI.
893 This is enabled with CONFIG_EFI_STUB to boot from both 32-bit and 64-bit
894 UEFI BIOS. U-Boot can also run as an EFI application, with CONFIG_EFI_APP.
895 The CONFIG_EFI_LOADER option, where U-Boot provides an EFI environment to
896 the kernel (i.e. replaces UEFI completely but provides the same EFI run-time
897 services) is supported too. For example, we can even use 'bootefi' command
898 to load a 'u-boot-payload.efi', see below test logs on QEMU.
900 => load ide 0 3000000 u-boot-payload.efi
901 489787 bytes read in 138 ms (3.4 MiB/s)
903 Scanning disk ide.blk#0...
905 WARNING: booting without device tree
906 ## Starting EFI application at 03000000 ...
910 U-Boot 2018.07-rc2 (Jun 23 2018 - 17:12:58 +0800)
912 CPU: x86_64, vendor AMD, device 663h
916 Model: EFI x86 Payload
917 Net: e1000: 52:54:00:12:34:56
919 Warning: e1000#0 using MAC address from ROM
922 Hit any key to stop autoboot: 0
924 See README.u-boot_on_efi and README.uefi for details of EFI support in U-Boot.
929 - Chrome OS verified boot
933 [1] http://www.coreboot.org
934 [2] http://www.qemu.org
935 [3] http://www.coreboot.org/~stepan/pci8086,0166.rom
936 [4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
937 [5] http://www.intel.com/fsp
938 [6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html
939 [7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/
940 [8] http://en.wikipedia.org/wiki/Microcode
941 [9] http://simplefirmware.org
942 [10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm
943 [11] https://en.wikipedia.org/wiki/GUID_Partition_Table
944 [12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf
945 [13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
946 [14] http://www.seabios.org/SeaBIOS
947 [15] doc/device-tree-bindings/misc/intel,irq-router.txt
948 [16] http://www.acpi.info
949 [17] https://www.acpica.org/downloads