1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
14 #include <clock_legacy.h>
20 #include <env_internal.h>
36 #include <status_led.h>
42 #ifdef CONFIG_MACH_TYPE
43 #include <asm/mach-types.h>
45 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
49 #include <asm/sections.h>
51 #include <linux/errno.h>
54 * Pointer to initial global data area
56 * Here we initialize it if needed.
58 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
59 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
60 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
61 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
63 DECLARE_GLOBAL_DATA_PTR;
67 * TODO(sjg@chromium.org): IMO this code should be
68 * refactored to a single function, something like:
70 * void led_set_state(enum led_colour_t colour, int on);
72 /************************************************************************
73 * Coloured LED functionality
74 ************************************************************************
75 * May be supplied by boards if desired
77 __weak void coloured_LED_init(void) {}
78 __weak void red_led_on(void) {}
79 __weak void red_led_off(void) {}
80 __weak void green_led_on(void) {}
81 __weak void green_led_off(void) {}
82 __weak void yellow_led_on(void) {}
83 __weak void yellow_led_off(void) {}
84 __weak void blue_led_on(void) {}
85 __weak void blue_led_off(void) {}
88 * Why is gd allocated a register? Prior to reloc it might be better to
89 * just pass it around to each function in this file?
91 * After reloc one could argue that it is hardly used and doesn't need
92 * to be in a register. Or if it is it should perhaps hold pointers to all
93 * global data for all modules, so that post-reloc we can avoid the massive
94 * literal pool we get on ARM. Or perhaps just encourage each module to use
98 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
99 static int init_func_watchdog_init(void)
101 # if defined(CONFIG_HW_WATCHDOG) && \
102 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
103 defined(CONFIG_SH) || \
104 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
105 defined(CONFIG_IMX_WATCHDOG))
107 puts(" Watchdog enabled\n");
114 int init_func_watchdog_reset(void)
120 #endif /* CONFIG_WATCHDOG */
122 __weak void board_add_ram_info(int use_default)
124 /* please define platform specific board_add_ram_info() */
127 static int init_baud_rate(void)
129 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
133 static int display_text_info(void)
135 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
136 ulong bss_start, bss_end, text_base;
138 bss_start = (ulong)&__bss_start;
139 bss_end = (ulong)&__bss_end;
141 #ifdef CONFIG_SYS_TEXT_BASE
142 text_base = CONFIG_SYS_TEXT_BASE;
144 text_base = CONFIG_SYS_MONITOR_BASE;
147 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
148 text_base, bss_start, bss_end);
154 #ifdef CONFIG_SYSRESET
155 static int print_resetinfo(void)
161 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
163 debug("%s: No sysreset device found (error: %d)\n",
165 /* Not all boards have sysreset drivers available during early
166 * boot, so don't fail if one can't be found.
171 if (!sysreset_get_status(dev, status, sizeof(status)))
172 printf("%s", status);
178 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
179 static int print_cpuinfo(void)
185 ret = uclass_first_device_err(UCLASS_CPU, &dev);
187 debug("%s: Could not get CPU device (err = %d)\n",
192 ret = cpu_get_desc(dev, desc, sizeof(desc));
194 debug("%s: Could not get CPU description (err = %d)\n",
199 printf("CPU: %s\n", desc);
205 static int announce_dram_init(void)
211 static int show_dram_config(void)
213 unsigned long long size;
215 #ifdef CONFIG_NR_DRAM_BANKS
218 debug("\nRAM Configuration:\n");
219 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
220 size += gd->bd->bi_dram[i].size;
221 debug("Bank #%d: %llx ", i,
222 (unsigned long long)(gd->bd->bi_dram[i].start));
224 print_size(gd->bd->bi_dram[i].size, "\n");
232 print_size(size, "");
233 board_add_ram_info(0);
239 __weak int dram_init_banksize(void)
241 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
242 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
243 gd->bd->bi_dram[0].size = get_effective_memsize();
249 #if defined(CONFIG_SYS_I2C)
250 static int init_func_i2c(void)
253 #ifdef CONFIG_SYS_I2C
256 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
263 #if defined(CONFIG_VID)
264 __weak int init_func_vid(void)
270 static int setup_mon_len(void)
272 #if defined(__ARM__) || defined(__MICROBLAZE__)
273 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
274 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
275 gd->mon_len = (ulong)&_end - (ulong)_init;
276 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
277 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
278 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
279 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
280 #elif defined(CONFIG_SYS_MONITOR_BASE)
281 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
282 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
287 static int setup_spl_handoff(void)
289 #if CONFIG_IS_ENABLED(HANDOFF)
290 gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
291 sizeof(struct spl_handoff));
292 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
298 __weak int arch_cpu_init(void)
303 __weak int mach_cpu_init(void)
308 /* Get the top of usable RAM */
309 __weak ulong board_get_usable_ram_top(ulong total_size)
311 #ifdef CONFIG_SYS_SDRAM_BASE
313 * Detect whether we have so much RAM that it goes past the end of our
314 * 32-bit address space. If so, clip the usable RAM so it doesn't.
316 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
318 * Will wrap back to top of 32-bit space when reservations
326 static int setup_dest_addr(void)
328 debug("Monitor len: %08lX\n", gd->mon_len);
330 * Ram is setup, size stored in gd !!
332 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
333 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
335 * Subtract specified amount of memory to hide so that it won't
336 * get "touched" at all by U-Boot. By fixing up gd->ram_size
337 * the Linux kernel should now get passed the now "corrected"
338 * memory size and won't touch it either. This should work
339 * for arch/ppc and arch/powerpc. Only Linux board ports in
340 * arch/powerpc with bootwrapper support, that recalculate the
341 * memory size from the SDRAM controller setup will have to
344 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
346 #ifdef CONFIG_SYS_SDRAM_BASE
347 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
349 gd->ram_top = gd->ram_base + get_effective_memsize();
350 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
351 gd->relocaddr = gd->ram_top;
352 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
353 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
355 * We need to make sure the location we intend to put secondary core
356 * boot code is reserved and not used by any part of u-boot
358 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
359 gd->relocaddr = determine_mp_bootpg(NULL);
360 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
367 /* reserve protected RAM */
368 static int reserve_pram(void)
372 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
373 gd->relocaddr -= (reg << 10); /* size is in kB */
374 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
378 #endif /* CONFIG_PRAM */
380 /* Round memory pointer down to next 4 kB limit */
381 static int reserve_round_4k(void)
383 gd->relocaddr &= ~(4096 - 1);
388 __weak int reserve_mmu(void)
390 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
391 /* reserve TLB table */
392 gd->arch.tlb_size = PGTABLE_SIZE;
393 gd->relocaddr -= gd->arch.tlb_size;
395 /* round down to next 64 kB limit */
396 gd->relocaddr &= ~(0x10000 - 1);
398 gd->arch.tlb_addr = gd->relocaddr;
399 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
400 gd->arch.tlb_addr + gd->arch.tlb_size);
402 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
404 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
405 * with location within secure ram.
407 gd->arch.tlb_allocated = gd->arch.tlb_addr;
415 static int reserve_video(void)
417 #ifdef CONFIG_DM_VIDEO
421 addr = gd->relocaddr;
422 ret = video_reserve(&addr);
425 gd->relocaddr = addr;
426 #elif defined(CONFIG_LCD)
427 # ifdef CONFIG_FB_ADDR
428 gd->fb_base = CONFIG_FB_ADDR;
430 /* reserve memory for LCD display (always full pages) */
431 gd->relocaddr = lcd_setmem(gd->relocaddr);
432 gd->fb_base = gd->relocaddr;
433 # endif /* CONFIG_FB_ADDR */
439 static int reserve_trace(void)
442 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
443 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
444 debug("Reserving %luk for trace data at: %08lx\n",
445 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
451 static int reserve_uboot(void)
453 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
455 * reserve memory for U-Boot code, data & bss
456 * round down to next 4 kB limit
458 gd->relocaddr -= gd->mon_len;
459 gd->relocaddr &= ~(4096 - 1);
460 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
461 /* round down to next 64 kB limit so that IVPR stays aligned */
462 gd->relocaddr &= ~(65536 - 1);
465 debug("Reserving %ldk for U-Boot at: %08lx\n",
466 gd->mon_len >> 10, gd->relocaddr);
469 gd->start_addr_sp = gd->relocaddr;
474 #ifdef CONFIG_SYS_NONCACHED_MEMORY
475 static int reserve_noncached(void)
478 * The value of gd->start_addr_sp must match the value of malloc_start
479 * calculated in boatrd_f.c:initr_malloc(), which is passed to
480 * board_r.c:mem_malloc_init() and then used by
481 * cache.c:noncached_init()
483 * These calculations must match the code in cache.c:noncached_init()
485 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
487 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
489 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
490 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
496 /* reserve memory for malloc() area */
497 static int reserve_malloc(void)
499 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
500 debug("Reserving %dk for malloc() at: %08lx\n",
501 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
502 #ifdef CONFIG_SYS_NONCACHED_MEMORY
509 /* (permanently) allocate a Board Info struct */
510 static int reserve_board(void)
513 gd->start_addr_sp -= sizeof(bd_t);
514 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
515 memset(gd->bd, '\0', sizeof(bd_t));
516 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
517 sizeof(bd_t), gd->start_addr_sp);
522 static int setup_machine(void)
524 #ifdef CONFIG_MACH_TYPE
525 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
530 static int reserve_global_data(void)
532 gd->start_addr_sp -= sizeof(gd_t);
533 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
534 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
535 sizeof(gd_t), gd->start_addr_sp);
539 static int reserve_fdt(void)
541 #ifndef CONFIG_OF_EMBED
543 * If the device tree is sitting immediately above our image then we
544 * must relocate it. If it is embedded in the data section, then it
545 * will be relocated with other data.
548 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
550 gd->start_addr_sp -= gd->fdt_size;
551 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
552 debug("Reserving %lu Bytes for FDT at: %08lx\n",
553 gd->fdt_size, gd->start_addr_sp);
560 static int reserve_bootstage(void)
562 #ifdef CONFIG_BOOTSTAGE
563 int size = bootstage_get_size();
565 gd->start_addr_sp -= size;
566 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
567 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
574 __weak int arch_reserve_stacks(void)
579 static int reserve_stacks(void)
581 /* make stack pointer 16-byte aligned */
582 gd->start_addr_sp -= 16;
583 gd->start_addr_sp &= ~0xf;
586 * let the architecture-specific code tailor gd->start_addr_sp and
589 return arch_reserve_stacks();
592 static int reserve_bloblist(void)
594 #ifdef CONFIG_BLOBLIST
595 gd->start_addr_sp &= ~0xf;
596 gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE;
597 gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
603 static int display_new_sp(void)
605 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
610 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
612 static int setup_board_part1(void)
617 * Save local variables to board info struct
619 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
620 bd->bi_memsize = gd->ram_size; /* size in bytes */
622 #ifdef CONFIG_SYS_SRAM_BASE
623 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
624 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
627 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
628 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
630 #if defined(CONFIG_M68K)
631 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
633 #if defined(CONFIG_MPC83xx)
634 bd->bi_immrbar = CONFIG_SYS_IMMR;
641 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
642 static int setup_board_part2(void)
646 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
647 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
648 #if defined(CONFIG_CPM2)
649 bd->bi_cpmfreq = gd->arch.cpm_clk;
650 bd->bi_brgfreq = gd->arch.brg_clk;
651 bd->bi_sccfreq = gd->arch.scc_clk;
652 bd->bi_vco = gd->arch.vco_out;
653 #endif /* CONFIG_CPM2 */
654 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
655 bd->bi_pcifreq = gd->pci_clk;
657 #if defined(CONFIG_EXTRA_CLOCK)
658 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
659 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
660 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
668 static int init_post(void)
670 post_bootmode_init();
671 post_run(NULL, POST_ROM | post_bootmode_get(0));
677 static int reloc_fdt(void)
679 #ifndef CONFIG_OF_EMBED
680 if (gd->flags & GD_FLG_SKIP_RELOC)
683 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
684 gd->fdt_blob = gd->new_fdt;
691 static int reloc_bootstage(void)
693 #ifdef CONFIG_BOOTSTAGE
694 if (gd->flags & GD_FLG_SKIP_RELOC)
696 if (gd->new_bootstage) {
697 int size = bootstage_get_size();
699 debug("Copying bootstage from %p to %p, size %x\n",
700 gd->bootstage, gd->new_bootstage, size);
701 memcpy(gd->new_bootstage, gd->bootstage, size);
702 gd->bootstage = gd->new_bootstage;
703 bootstage_relocate();
710 static int reloc_bloblist(void)
712 #ifdef CONFIG_BLOBLIST
713 if (gd->flags & GD_FLG_SKIP_RELOC)
715 if (gd->new_bloblist) {
716 int size = CONFIG_BLOBLIST_SIZE;
718 debug("Copying bloblist from %p to %p, size %x\n",
719 gd->bloblist, gd->new_bloblist, size);
720 memcpy(gd->new_bloblist, gd->bloblist, size);
721 gd->bloblist = gd->new_bloblist;
728 static int setup_reloc(void)
730 if (gd->flags & GD_FLG_SKIP_RELOC) {
731 debug("Skipping relocation due to flag\n");
735 #ifdef CONFIG_SYS_TEXT_BASE
737 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
738 #elif defined(CONFIG_M68K)
740 * On all ColdFire arch cpu, monitor code starts always
741 * just after the default vector table location, so at 0x400
743 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
744 #elif !defined(CONFIG_SANDBOX)
745 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
748 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
750 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
751 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
752 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
758 #ifdef CONFIG_OF_BOARD_FIXUP
759 static int fix_fdt(void)
761 return board_fix_fdt((void *)gd->fdt_blob);
765 /* ARM calls relocate_code from its crt0.S */
766 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
767 !CONFIG_IS_ENABLED(X86_64)
769 static int jump_to_copy(void)
771 if (gd->flags & GD_FLG_SKIP_RELOC)
774 * x86 is special, but in a nice way. It uses a trampoline which
775 * enables the dcache if possible.
777 * For now, other archs use relocate_code(), which is implemented
778 * similarly for all archs. When we do generic relocation, hopefully
779 * we can make all archs enable the dcache prior to relocation.
781 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
783 * SDRAM and console are now initialised. The final stack can now
784 * be setup in SDRAM. Code execution will continue in Flash, but
785 * with the stack in SDRAM and Global Data in temporary memory
788 arch_setup_gd(gd->new_gd);
789 board_init_f_r_trampoline(gd->start_addr_sp);
791 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
798 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
799 static int initf_bootstage(void)
801 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
802 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
805 ret = bootstage_init(!from_spl);
809 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
810 CONFIG_BOOTSTAGE_STASH_SIZE);
812 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
813 if (ret && ret != -ENOENT) {
814 debug("Failed to unstash bootstage: err=%d\n", ret);
819 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
824 static int initf_console_record(void)
826 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
827 return console_record_init();
833 static int initf_dm(void)
835 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
838 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
839 ret = dm_init_and_scan(true);
840 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
844 #ifdef CONFIG_TIMER_EARLY
845 ret = dm_timer_init();
853 /* Architecture-specific memory reservation */
854 __weak int reserve_arch(void)
859 __weak int arch_cpu_init_dm(void)
864 static const init_fnc_t init_sequence_f[] = {
866 #ifdef CONFIG_OF_CONTROL
869 #ifdef CONFIG_TRACE_EARLY
874 initf_bootstage, /* uses its own timer, so does not need DM */
875 #ifdef CONFIG_BLOBLIST
879 initf_console_record,
880 #if defined(CONFIG_HAVE_FSP)
883 arch_cpu_init, /* basic arch cpu dependent setup */
884 mach_cpu_init, /* SoC/machine dependent CPU setup */
887 #if defined(CONFIG_BOARD_EARLY_INIT_F)
890 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
891 /* get CPU and bus clocks according to the environment variable */
892 get_clocks, /* get CPU and bus clocks (etc.) */
894 #if !defined(CONFIG_M68K)
895 timer_init, /* initialize timer */
897 #if defined(CONFIG_BOARD_POSTCLK_INIT)
900 env_init, /* initialize environment */
901 init_baud_rate, /* initialze baudrate settings */
902 serial_init, /* serial communications setup */
903 console_init_f, /* stage 1 init of console */
904 display_options, /* say that we are here */
905 display_text_info, /* show debugging info if required */
906 #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
909 #if defined(CONFIG_SYSRESET)
912 #if defined(CONFIG_DISPLAY_CPUINFO)
913 print_cpuinfo, /* display cpu info (and speed) */
915 #if defined(CONFIG_DTB_RESELECT)
918 #if defined(CONFIG_DISPLAY_BOARDINFO)
921 INIT_FUNC_WATCHDOG_INIT
922 #if defined(CONFIG_MISC_INIT_F)
925 INIT_FUNC_WATCHDOG_RESET
926 #if defined(CONFIG_SYS_I2C)
929 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
933 dram_init, /* configure available RAM banks */
937 INIT_FUNC_WATCHDOG_RESET
938 #if defined(CONFIG_SYS_DRAM_TEST)
940 #endif /* CONFIG_SYS_DRAM_TEST */
941 INIT_FUNC_WATCHDOG_RESET
946 INIT_FUNC_WATCHDOG_RESET
948 * Now that we have DRAM mapped and working, we can
949 * relocate the code and continue running from DRAM.
951 * Reserve memory at end of RAM for (top down in that order):
952 * - area that won't get touched by U-Boot and Linux (optional)
953 * - kernel log buffer
957 * - board info struct
981 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
985 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
986 INIT_FUNC_WATCHDOG_RESET
990 #ifdef CONFIG_OF_BOARD_FIXUP
993 INIT_FUNC_WATCHDOG_RESET
998 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1000 do_elf_reloc_fixups,
1003 #if defined(CONFIG_XTENSA)
1006 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1007 !CONFIG_IS_ENABLED(X86_64)
1013 void board_init_f(ulong boot_flags)
1015 gd->flags = boot_flags;
1016 gd->have_console = 0;
1018 if (initcall_run_list(init_sequence_f))
1021 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1022 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1023 !defined(CONFIG_ARC)
1024 /* NOTREACHED - jump_to_copy() does not return */
1029 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1031 * For now this code is only used on x86.
1033 * init_sequence_f_r is the list of init functions which are run when
1034 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1035 * The following limitations must be considered when implementing an
1037 * - 'static' variables are read-only
1038 * - Global Data (gd->xxx) is read/write
1040 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1041 * supported). It _should_, if possible, copy global data to RAM and
1042 * initialise the CPU caches (to speed up the relocation process)
1044 * NOTE: At present only x86 uses this route, but it is intended that
1045 * all archs will move to this when generic relocation is implemented.
1047 static const init_fnc_t init_sequence_f_r[] = {
1048 #if !CONFIG_IS_ENABLED(X86_64)
1055 void board_init_f_r(void)
1057 if (initcall_run_list(init_sequence_f_r))
1061 * The pre-relocation drivers may be using memory that has now gone
1062 * away. Mark serial as unavailable - this will fall back to the debug
1063 * UART if available.
1065 * Do the same with log drivers since the memory may not be available.
1067 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1073 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1074 * Transfer execution from Flash to RAM by calculating the address
1075 * of the in-RAM copy of board_init_r() and calling it
1077 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1079 /* NOTREACHED - board_init_r() does not return */
1082 #endif /* CONFIG_X86 */