2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
17 #include <environment.h>
21 #if defined(CONFIG_CMD_IDE)
30 /* TODO: Can we move these into arch/ headers? */
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
47 #include <status_led.h>
52 #include <linux/errno.h>
54 #include <asm/sections.h>
55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
56 #include <asm/init_helpers.h>
58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
59 #include <asm/relocate.h>
62 #include <asm/state.h>
65 #include <linux/compiler.h>
68 * Pointer to initial global data area
70 * Here we initialize it if needed.
72 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
73 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
74 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
75 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
77 DECLARE_GLOBAL_DATA_PTR;
81 * TODO(sjg@chromium.org): IMO this code should be
82 * refactored to a single function, something like:
84 * void led_set_state(enum led_colour_t colour, int on);
86 /************************************************************************
87 * Coloured LED functionality
88 ************************************************************************
89 * May be supplied by boards if desired
91 __weak void coloured_LED_init(void) {}
92 __weak void red_led_on(void) {}
93 __weak void red_led_off(void) {}
94 __weak void green_led_on(void) {}
95 __weak void green_led_off(void) {}
96 __weak void yellow_led_on(void) {}
97 __weak void yellow_led_off(void) {}
98 __weak void blue_led_on(void) {}
99 __weak void blue_led_off(void) {}
102 * Why is gd allocated a register? Prior to reloc it might be better to
103 * just pass it around to each function in this file?
105 * After reloc one could argue that it is hardly used and doesn't need
106 * to be in a register. Or if it is it should perhaps hold pointers to all
107 * global data for all modules, so that post-reloc we can avoid the massive
108 * literal pool we get on ARM. Or perhaps just encourage each module to use
113 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
116 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
117 static int init_func_watchdog_init(void)
119 # if defined(CONFIG_HW_WATCHDOG) && \
120 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
121 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
122 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
123 defined(CONFIG_IMX_WATCHDOG))
125 puts(" Watchdog enabled\n");
132 int init_func_watchdog_reset(void)
138 #endif /* CONFIG_WATCHDOG */
140 __weak void board_add_ram_info(int use_default)
142 /* please define platform specific board_add_ram_info() */
145 static int init_baud_rate(void)
147 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
151 static int display_text_info(void)
153 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
154 ulong bss_start, bss_end, text_base;
156 bss_start = (ulong)&__bss_start;
157 bss_end = (ulong)&__bss_end;
159 #ifdef CONFIG_SYS_TEXT_BASE
160 text_base = CONFIG_SYS_TEXT_BASE;
162 text_base = CONFIG_SYS_MONITOR_BASE;
165 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
166 text_base, bss_start, bss_end);
169 #ifdef CONFIG_USE_IRQ
170 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
171 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
177 static int announce_dram_init(void)
183 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
184 static int init_func_ram(void)
186 #ifdef CONFIG_BOARD_TYPES
187 int board_type = gd->board_type;
189 int board_type = 0; /* use dummy arg */
192 gd->ram_size = initdram(board_type);
194 if (gd->ram_size > 0)
197 puts("*** failed ***\n");
202 static int show_dram_config(void)
204 unsigned long long size;
206 #ifdef CONFIG_NR_DRAM_BANKS
209 debug("\nRAM Configuration:\n");
210 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
211 size += gd->bd->bi_dram[i].size;
212 debug("Bank #%d: %llx ", i,
213 (unsigned long long)(gd->bd->bi_dram[i].start));
215 print_size(gd->bd->bi_dram[i].size, "\n");
223 print_size(size, "");
224 board_add_ram_info(0);
230 __weak void dram_init_banksize(void)
232 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
233 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
234 gd->bd->bi_dram[0].size = get_effective_memsize();
238 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
239 static int init_func_i2c(void)
242 #ifdef CONFIG_SYS_I2C
245 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
252 #if defined(CONFIG_HARD_SPI)
253 static int init_func_spi(void)
263 static int zero_global_data(void)
265 memset((void *)gd, '\0', sizeof(gd_t));
270 static int setup_mon_len(void)
272 #if defined(__ARM__) || defined(__MICROBLAZE__)
273 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
274 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
275 gd->mon_len = (ulong)&_end - (ulong)_init;
276 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
277 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
278 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
279 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
280 #elif defined(CONFIG_SYS_MONITOR_BASE)
281 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
282 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
287 __weak int arch_cpu_init(void)
292 __weak int mach_cpu_init(void)
297 #ifdef CONFIG_SANDBOX
298 static int setup_ram_buf(void)
300 struct sandbox_state *state = state_get_current();
302 gd->arch.ram_buf = state->ram_buf;
303 gd->ram_size = state->ram_size;
309 /* Get the top of usable RAM */
310 __weak ulong board_get_usable_ram_top(ulong total_size)
312 #ifdef CONFIG_SYS_SDRAM_BASE
314 * Detect whether we have so much RAM that it goes past the end of our
315 * 32-bit address space. If so, clip the usable RAM so it doesn't.
317 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
319 * Will wrap back to top of 32-bit space when reservations
327 static int setup_dest_addr(void)
329 debug("Monitor len: %08lX\n", gd->mon_len);
331 * Ram is setup, size stored in gd !!
333 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
334 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
336 * Subtract specified amount of memory to hide so that it won't
337 * get "touched" at all by U-Boot. By fixing up gd->ram_size
338 * the Linux kernel should now get passed the now "corrected"
339 * memory size and won't touch it either. This should work
340 * for arch/ppc and arch/powerpc. Only Linux board ports in
341 * arch/powerpc with bootwrapper support, that recalculate the
342 * memory size from the SDRAM controller setup will have to
345 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
347 #ifdef CONFIG_SYS_SDRAM_BASE
348 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
350 gd->ram_top += get_effective_memsize();
351 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
352 gd->relocaddr = gd->ram_top;
353 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
354 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
356 * We need to make sure the location we intend to put secondary core
357 * boot code is reserved and not used by any part of u-boot
359 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
360 gd->relocaddr = determine_mp_bootpg(NULL);
361 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
367 #if defined(CONFIG_SPARC)
368 static int reserve_prom(void)
370 /* defined in arch/sparc/cpu/leon?/prom.c */
371 extern void *__prom_start_reloc;
372 int size = 8192; /* page table = 2k, prom = 6k */
373 gd->relocaddr -= size;
374 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
375 debug("Reserving %dk for PROM and page table at %08lx\n", size,
381 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
382 static int reserve_logbuffer(void)
384 /* reserve kernel log buffer */
385 gd->relocaddr -= LOGBUFF_RESERVE;
386 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
393 /* reserve protected RAM */
394 static int reserve_pram(void)
398 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
399 gd->relocaddr -= (reg << 10); /* size is in kB */
400 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
404 #endif /* CONFIG_PRAM */
406 /* Round memory pointer down to next 4 kB limit */
407 static int reserve_round_4k(void)
409 gd->relocaddr &= ~(4096 - 1);
413 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
415 static int reserve_mmu(void)
417 /* reserve TLB table */
418 gd->arch.tlb_size = PGTABLE_SIZE;
419 gd->relocaddr -= gd->arch.tlb_size;
421 /* round down to next 64 kB limit */
422 gd->relocaddr &= ~(0x10000 - 1);
424 gd->arch.tlb_addr = gd->relocaddr;
425 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
426 gd->arch.tlb_addr + gd->arch.tlb_size);
428 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
430 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
431 * with location within secure ram.
433 gd->arch.tlb_allocated = gd->arch.tlb_addr;
440 #ifdef CONFIG_DM_VIDEO
441 static int reserve_video(void)
446 addr = gd->relocaddr;
447 ret = video_reserve(&addr);
450 gd->relocaddr = addr;
457 static int reserve_lcd(void)
459 # ifdef CONFIG_FB_ADDR
460 gd->fb_base = CONFIG_FB_ADDR;
462 /* reserve memory for LCD display (always full pages) */
463 gd->relocaddr = lcd_setmem(gd->relocaddr);
464 gd->fb_base = gd->relocaddr;
465 # endif /* CONFIG_FB_ADDR */
469 # endif /* CONFIG_LCD */
471 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
472 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
473 !defined(CONFIG_M68K)
474 static int reserve_legacy_video(void)
476 /* reserve memory for video display (always full pages) */
477 gd->relocaddr = video_setmem(gd->relocaddr);
478 gd->fb_base = gd->relocaddr;
483 #endif /* !CONFIG_DM_VIDEO */
485 static int reserve_trace(void)
488 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
489 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
490 debug("Reserving %dk for trace data at: %08lx\n",
491 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
497 static int reserve_uboot(void)
500 * reserve memory for U-Boot code, data & bss
501 * round down to next 4 kB limit
503 gd->relocaddr -= gd->mon_len;
504 gd->relocaddr &= ~(4096 - 1);
506 /* round down to next 64 kB limit so that IVPR stays aligned */
507 gd->relocaddr &= ~(65536 - 1);
510 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
513 gd->start_addr_sp = gd->relocaddr;
518 #ifndef CONFIG_SPL_BUILD
519 /* reserve memory for malloc() area */
520 static int reserve_malloc(void)
522 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
523 debug("Reserving %dk for malloc() at: %08lx\n",
524 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
528 /* (permanently) allocate a Board Info struct */
529 static int reserve_board(void)
532 gd->start_addr_sp -= sizeof(bd_t);
533 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
534 memset(gd->bd, '\0', sizeof(bd_t));
535 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
536 sizeof(bd_t), gd->start_addr_sp);
542 static int setup_machine(void)
544 #ifdef CONFIG_MACH_TYPE
545 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
550 static int reserve_global_data(void)
552 gd->start_addr_sp -= sizeof(gd_t);
553 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
554 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
555 sizeof(gd_t), gd->start_addr_sp);
559 static int reserve_fdt(void)
561 #ifndef CONFIG_OF_EMBED
563 * If the device tree is sitting immediately above our image then we
564 * must relocate it. If it is embedded in the data section, then it
565 * will be relocated with other data.
568 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
570 gd->start_addr_sp -= gd->fdt_size;
571 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
572 debug("Reserving %lu Bytes for FDT at: %08lx\n",
573 gd->fdt_size, gd->start_addr_sp);
580 int arch_reserve_stacks(void)
585 static int reserve_stacks(void)
587 /* make stack pointer 16-byte aligned */
588 gd->start_addr_sp -= 16;
589 gd->start_addr_sp &= ~0xf;
592 * let the architecture-specific code tailor gd->start_addr_sp and
595 return arch_reserve_stacks();
598 static int display_new_sp(void)
600 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
605 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
607 static int setup_board_part1(void)
612 * Save local variables to board info struct
614 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
615 bd->bi_memsize = gd->ram_size; /* size in bytes */
617 #ifdef CONFIG_SYS_SRAM_BASE
618 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
619 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
622 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
623 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
624 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
626 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
627 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
629 #if defined(CONFIG_MPC83xx)
630 bd->bi_immrbar = CONFIG_SYS_IMMR;
637 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
638 static int setup_board_part2(void)
642 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
643 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
644 #if defined(CONFIG_CPM2)
645 bd->bi_cpmfreq = gd->arch.cpm_clk;
646 bd->bi_brgfreq = gd->arch.brg_clk;
647 bd->bi_sccfreq = gd->arch.scc_clk;
648 bd->bi_vco = gd->arch.vco_out;
649 #endif /* CONFIG_CPM2 */
650 #if defined(CONFIG_MPC512X)
651 bd->bi_ipsfreq = gd->arch.ips_clk;
652 #endif /* CONFIG_MPC512X */
653 #if defined(CONFIG_MPC5xxx)
654 bd->bi_ipbfreq = gd->arch.ipb_clk;
655 bd->bi_pcifreq = gd->pci_clk;
656 #endif /* CONFIG_MPC5xxx */
657 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
658 bd->bi_pcifreq = gd->pci_clk;
660 #if defined(CONFIG_EXTRA_CLOCK)
661 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
662 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
663 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
670 #ifdef CONFIG_SYS_EXTBDINFO
671 static int setup_board_extra(void)
675 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
676 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
677 sizeof(bd->bi_r_version));
679 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
680 bd->bi_plb_busfreq = gd->bus_clk;
681 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
682 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
683 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
684 bd->bi_pci_busfreq = get_PCI_freq();
685 bd->bi_opbfreq = get_OPB_freq();
686 #elif defined(CONFIG_XILINX_405)
687 bd->bi_pci_busfreq = get_PCI_freq();
695 static int init_post(void)
697 post_bootmode_init();
698 post_run(NULL, POST_ROM | post_bootmode_get(0));
704 static int setup_dram_config(void)
706 /* Ram is board specific, so move it to board code ... */
707 dram_init_banksize();
712 static int reloc_fdt(void)
714 #ifndef CONFIG_OF_EMBED
715 if (gd->flags & GD_FLG_SKIP_RELOC)
718 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
719 gd->fdt_blob = gd->new_fdt;
726 static int setup_reloc(void)
728 if (gd->flags & GD_FLG_SKIP_RELOC) {
729 debug("Skipping relocation due to flag\n");
733 #ifdef CONFIG_SYS_TEXT_BASE
734 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
737 * On all ColdFire arch cpu, monitor code starts always
738 * just after the default vector table location, so at 0x400
740 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
743 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
745 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
746 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
747 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
753 #ifdef CONFIG_OF_BOARD_FIXUP
754 static int fix_fdt(void)
756 return board_fix_fdt((void *)gd->fdt_blob);
760 /* ARM calls relocate_code from its crt0.S */
761 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
762 !CONFIG_IS_ENABLED(X86_64)
764 static int jump_to_copy(void)
766 if (gd->flags & GD_FLG_SKIP_RELOC)
769 * x86 is special, but in a nice way. It uses a trampoline which
770 * enables the dcache if possible.
772 * For now, other archs use relocate_code(), which is implemented
773 * similarly for all archs. When we do generic relocation, hopefully
774 * we can make all archs enable the dcache prior to relocation.
776 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
778 * SDRAM and console are now initialised. The final stack can now
779 * be setup in SDRAM. Code execution will continue in Flash, but
780 * with the stack in SDRAM and Global Data in temporary memory
783 arch_setup_gd(gd->new_gd);
784 board_init_f_r_trampoline(gd->start_addr_sp);
786 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
793 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
794 static int mark_bootstage(void)
796 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
801 static int initf_console_record(void)
803 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
804 return console_record_init();
810 static int initf_dm(void)
812 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
815 ret = dm_init_and_scan(true);
819 #ifdef CONFIG_TIMER_EARLY
820 ret = dm_timer_init();
828 /* Architecture-specific memory reservation */
829 __weak int reserve_arch(void)
834 __weak int arch_cpu_init_dm(void)
839 static const init_fnc_t init_sequence_f[] = {
840 #ifdef CONFIG_SANDBOX
844 #ifdef CONFIG_OF_CONTROL
851 initf_console_record,
852 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
855 arch_cpu_init, /* basic arch cpu dependent setup */
856 mach_cpu_init, /* SoC/machine dependent CPU setup */
859 mark_bootstage, /* need timer, go after init dm */
860 #if defined(CONFIG_BOARD_EARLY_INIT_F)
863 /* TODO: can any of this go into arch_cpu_init()? */
864 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
865 get_clocks, /* get CPU and bus clocks (etc.) */
866 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
867 && !defined(CONFIG_TQM885D)
868 adjust_sdram_tbs_8xx,
870 /* TODO: can we rename this to timer_init()? */
873 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
874 defined(CONFIG_NDS32) || defined(CONFIG_SH) || \
875 defined(CONFIG_SPARC)
876 timer_init, /* initialize timer */
878 #if defined(CONFIG_BOARD_POSTCLK_INIT)
881 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
884 env_init, /* initialize environment */
885 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
886 /* get CPU and bus clocks according to the environment variable */
888 /* adjust sdram refresh rate according to the new clock */
892 init_baud_rate, /* initialze baudrate settings */
893 serial_init, /* serial communications setup */
894 console_init_f, /* stage 1 init of console */
895 #ifdef CONFIG_SANDBOX
896 sandbox_early_getopt_check,
898 display_options, /* say that we are here */
899 display_text_info, /* show debugging info if required */
900 #if defined(CONFIG_MPC8260)
903 #endif /* CONFIG_MPC8260 */
904 #if defined(CONFIG_MPC83xx)
907 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH)
910 #if defined(CONFIG_DISPLAY_CPUINFO)
911 print_cpuinfo, /* display cpu info (and speed) */
913 #if defined(CONFIG_DISPLAY_BOARDINFO)
916 INIT_FUNC_WATCHDOG_INIT
917 #if defined(CONFIG_MISC_INIT_F)
920 INIT_FUNC_WATCHDOG_RESET
921 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
924 #if defined(CONFIG_HARD_SPI)
928 /* TODO: unify all these dram functions? */
929 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
930 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
932 dram_init, /* configure available RAM banks */
934 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
940 INIT_FUNC_WATCHDOG_RESET
941 #if defined(CONFIG_SYS_DRAM_TEST)
943 #endif /* CONFIG_SYS_DRAM_TEST */
944 INIT_FUNC_WATCHDOG_RESET
949 INIT_FUNC_WATCHDOG_RESET
951 * Now that we have DRAM mapped and working, we can
952 * relocate the code and continue running from DRAM.
954 * Reserve memory at end of RAM for (top down in that order):
955 * - area that won't get touched by U-Boot and Linux (optional)
956 * - kernel log buffer
960 * - board info struct
963 #if defined(CONFIG_XTENSA)
964 /* Blackfin u-boot monitor should be on top of the ram */
967 #if defined(CONFIG_SPARC)
970 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
977 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
981 #ifdef CONFIG_DM_VIDEO
987 /* TODO: Why the dependency on CONFIG_8xx? */
988 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
989 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
990 !defined(CONFIG_M68K)
991 reserve_legacy_video,
993 #endif /* CONFIG_DM_VIDEO */
995 #if !defined(CONFIG_XTENSA)
998 #ifndef CONFIG_SPL_BUILD
1003 reserve_global_data,
1009 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
1013 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
1014 INIT_FUNC_WATCHDOG_RESET
1018 #ifdef CONFIG_SYS_EXTBDINFO
1021 #ifdef CONFIG_OF_BOARD_FIXUP
1024 INIT_FUNC_WATCHDOG_RESET
1027 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1029 do_elf_reloc_fixups,
1032 #if defined(CONFIG_XTENSA)
1035 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1036 !CONFIG_IS_ENABLED(X86_64)
1042 void board_init_f(ulong boot_flags)
1044 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1046 * For some architectures, global data is initialized and used before
1047 * calling this function. The data should be preserved. For others,
1048 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1049 * here to host global data until relocation.
1056 * Clear global data before it is accessed at debug print
1057 * in initcall_run_list. Otherwise the debug print probably
1058 * get the wrong value of gd->have_console.
1063 gd->flags = boot_flags;
1064 gd->have_console = 0;
1066 if (initcall_run_list(init_sequence_f))
1069 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1070 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
1071 /* NOTREACHED - jump_to_copy() does not return */
1076 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1078 * For now this code is only used on x86.
1080 * init_sequence_f_r is the list of init functions which are run when
1081 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1082 * The following limitations must be considered when implementing an
1084 * - 'static' variables are read-only
1085 * - Global Data (gd->xxx) is read/write
1087 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1088 * supported). It _should_, if possible, copy global data to RAM and
1089 * initialise the CPU caches (to speed up the relocation process)
1091 * NOTE: At present only x86 uses this route, but it is intended that
1092 * all archs will move to this when generic relocation is implemented.
1094 static const init_fnc_t init_sequence_f_r[] = {
1095 #if !CONFIG_IS_ENABLED(X86_64)
1102 void board_init_f_r(void)
1104 if (initcall_run_list(init_sequence_f_r))
1108 * The pre-relocation drivers may be using memory that has now gone
1109 * away. Mark serial as unavailable - this will fall back to the debug
1110 * UART if available.
1112 gd->flags &= ~GD_FLG_SERIAL_READY;
1115 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1116 * Transfer execution from Flash to RAM by calculating the address
1117 * of the in-RAM copy of board_init_r() and calling it
1119 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1121 /* NOTREACHED - board_init_r() does not return */
1124 #endif /* CONFIG_X86 */