2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
17 #include <environment.h>
21 #if defined(CONFIG_CMD_IDE)
30 /* TODO: Can we move these into arch/ headers? */
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
47 #include <status_led.h>
52 #include <linux/errno.h>
54 #include <asm/sections.h>
55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
56 #include <asm/init_helpers.h>
58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
59 #include <asm/relocate.h>
62 #include <linux/compiler.h>
65 * Pointer to initial global data area
67 * Here we initialize it if needed.
69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
74 DECLARE_GLOBAL_DATA_PTR;
78 * TODO(sjg@chromium.org): IMO this code should be
79 * refactored to a single function, something like:
81 * void led_set_state(enum led_colour_t colour, int on);
83 /************************************************************************
84 * Coloured LED functionality
85 ************************************************************************
86 * May be supplied by boards if desired
88 __weak void coloured_LED_init(void) {}
89 __weak void red_led_on(void) {}
90 __weak void red_led_off(void) {}
91 __weak void green_led_on(void) {}
92 __weak void green_led_off(void) {}
93 __weak void yellow_led_on(void) {}
94 __weak void yellow_led_off(void) {}
95 __weak void blue_led_on(void) {}
96 __weak void blue_led_off(void) {}
99 * Why is gd allocated a register? Prior to reloc it might be better to
100 * just pass it around to each function in this file?
102 * After reloc one could argue that it is hardly used and doesn't need
103 * to be in a register. Or if it is it should perhaps hold pointers to all
104 * global data for all modules, so that post-reloc we can avoid the massive
105 * literal pool we get on ARM. Or perhaps just encourage each module to use
109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
110 static int init_func_watchdog_init(void)
112 # if defined(CONFIG_HW_WATCHDOG) && \
113 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
114 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
115 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
116 defined(CONFIG_IMX_WATCHDOG))
118 puts(" Watchdog enabled\n");
125 int init_func_watchdog_reset(void)
131 #endif /* CONFIG_WATCHDOG */
133 __weak void board_add_ram_info(int use_default)
135 /* please define platform specific board_add_ram_info() */
138 static int init_baud_rate(void)
140 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
144 static int display_text_info(void)
146 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
147 ulong bss_start, bss_end, text_base;
149 bss_start = (ulong)&__bss_start;
150 bss_end = (ulong)&__bss_end;
152 #ifdef CONFIG_SYS_TEXT_BASE
153 text_base = CONFIG_SYS_TEXT_BASE;
155 text_base = CONFIG_SYS_MONITOR_BASE;
158 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
159 text_base, bss_start, bss_end);
162 #ifdef CONFIG_USE_IRQ
163 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
164 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
170 static int announce_dram_init(void)
176 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
177 static int init_func_ram(void)
183 static int show_dram_config(void)
185 unsigned long long size;
187 #ifdef CONFIG_NR_DRAM_BANKS
190 debug("\nRAM Configuration:\n");
191 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
192 size += gd->bd->bi_dram[i].size;
193 debug("Bank #%d: %llx ", i,
194 (unsigned long long)(gd->bd->bi_dram[i].start));
196 print_size(gd->bd->bi_dram[i].size, "\n");
204 print_size(size, "");
205 board_add_ram_info(0);
211 __weak int dram_init_banksize(void)
213 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
214 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
215 gd->bd->bi_dram[0].size = get_effective_memsize();
221 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
222 static int init_func_i2c(void)
225 #ifdef CONFIG_SYS_I2C
228 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
235 #if defined(CONFIG_HARD_SPI)
236 static int init_func_spi(void)
246 static int zero_global_data(void)
248 memset((void *)gd, '\0', sizeof(gd_t));
253 static int setup_mon_len(void)
255 #if defined(__ARM__) || defined(__MICROBLAZE__)
256 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
257 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
258 gd->mon_len = (ulong)&_end - (ulong)_init;
259 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
260 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
261 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
262 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
263 #elif defined(CONFIG_SYS_MONITOR_BASE)
264 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
265 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
270 __weak int arch_cpu_init(void)
275 __weak int mach_cpu_init(void)
280 /* Get the top of usable RAM */
281 __weak ulong board_get_usable_ram_top(ulong total_size)
283 #ifdef CONFIG_SYS_SDRAM_BASE
285 * Detect whether we have so much RAM that it goes past the end of our
286 * 32-bit address space. If so, clip the usable RAM so it doesn't.
288 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
290 * Will wrap back to top of 32-bit space when reservations
298 static int setup_dest_addr(void)
300 debug("Monitor len: %08lX\n", gd->mon_len);
302 * Ram is setup, size stored in gd !!
304 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
305 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
307 * Subtract specified amount of memory to hide so that it won't
308 * get "touched" at all by U-Boot. By fixing up gd->ram_size
309 * the Linux kernel should now get passed the now "corrected"
310 * memory size and won't touch it either. This should work
311 * for arch/ppc and arch/powerpc. Only Linux board ports in
312 * arch/powerpc with bootwrapper support, that recalculate the
313 * memory size from the SDRAM controller setup will have to
316 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
318 #ifdef CONFIG_SYS_SDRAM_BASE
319 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
321 gd->ram_top += get_effective_memsize();
322 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
323 gd->relocaddr = gd->ram_top;
324 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
325 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
327 * We need to make sure the location we intend to put secondary core
328 * boot code is reserved and not used by any part of u-boot
330 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
331 gd->relocaddr = determine_mp_bootpg(NULL);
332 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
338 #if defined(CONFIG_LOGBUFFER)
339 static int reserve_logbuffer(void)
341 #ifndef CONFIG_ALT_LB_ADDR
342 /* reserve kernel log buffer */
343 gd->relocaddr -= LOGBUFF_RESERVE;
344 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
353 /* reserve protected RAM */
354 static int reserve_pram(void)
358 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
359 gd->relocaddr -= (reg << 10); /* size is in kB */
360 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
364 #endif /* CONFIG_PRAM */
366 /* Round memory pointer down to next 4 kB limit */
367 static int reserve_round_4k(void)
369 gd->relocaddr &= ~(4096 - 1);
374 static int reserve_mmu(void)
376 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
377 /* reserve TLB table */
378 gd->arch.tlb_size = PGTABLE_SIZE;
379 gd->relocaddr -= gd->arch.tlb_size;
381 /* round down to next 64 kB limit */
382 gd->relocaddr &= ~(0x10000 - 1);
384 gd->arch.tlb_addr = gd->relocaddr;
385 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
386 gd->arch.tlb_addr + gd->arch.tlb_size);
388 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
390 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
391 * with location within secure ram.
393 gd->arch.tlb_allocated = gd->arch.tlb_addr;
401 static int reserve_video(void)
403 #ifdef CONFIG_DM_VIDEO
407 addr = gd->relocaddr;
408 ret = video_reserve(&addr);
411 gd->relocaddr = addr;
412 #elif defined(CONFIG_LCD)
413 # ifdef CONFIG_FB_ADDR
414 gd->fb_base = CONFIG_FB_ADDR;
416 /* reserve memory for LCD display (always full pages) */
417 gd->relocaddr = lcd_setmem(gd->relocaddr);
418 gd->fb_base = gd->relocaddr;
419 # endif /* CONFIG_FB_ADDR */
420 #elif defined(CONFIG_VIDEO) && \
421 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
422 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
423 !defined(CONFIG_M68K)
424 /* reserve memory for video display (always full pages) */
425 gd->relocaddr = video_setmem(gd->relocaddr);
426 gd->fb_base = gd->relocaddr;
432 static int reserve_trace(void)
435 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
436 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
437 debug("Reserving %dk for trace data at: %08lx\n",
438 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
444 static int reserve_uboot(void)
447 * reserve memory for U-Boot code, data & bss
448 * round down to next 4 kB limit
450 gd->relocaddr -= gd->mon_len;
451 gd->relocaddr &= ~(4096 - 1);
453 /* round down to next 64 kB limit so that IVPR stays aligned */
454 gd->relocaddr &= ~(65536 - 1);
457 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
460 gd->start_addr_sp = gd->relocaddr;
465 /* reserve memory for malloc() area */
466 static int reserve_malloc(void)
468 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
469 debug("Reserving %dk for malloc() at: %08lx\n",
470 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
474 /* (permanently) allocate a Board Info struct */
475 static int reserve_board(void)
478 gd->start_addr_sp -= sizeof(bd_t);
479 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
480 memset(gd->bd, '\0', sizeof(bd_t));
481 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
482 sizeof(bd_t), gd->start_addr_sp);
487 static int setup_machine(void)
489 #ifdef CONFIG_MACH_TYPE
490 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
495 static int reserve_global_data(void)
497 gd->start_addr_sp -= sizeof(gd_t);
498 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
499 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
500 sizeof(gd_t), gd->start_addr_sp);
504 static int reserve_fdt(void)
506 #ifndef CONFIG_OF_EMBED
508 * If the device tree is sitting immediately above our image then we
509 * must relocate it. If it is embedded in the data section, then it
510 * will be relocated with other data.
513 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
515 gd->start_addr_sp -= gd->fdt_size;
516 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
517 debug("Reserving %lu Bytes for FDT at: %08lx\n",
518 gd->fdt_size, gd->start_addr_sp);
525 int arch_reserve_stacks(void)
530 static int reserve_stacks(void)
532 /* make stack pointer 16-byte aligned */
533 gd->start_addr_sp -= 16;
534 gd->start_addr_sp &= ~0xf;
537 * let the architecture-specific code tailor gd->start_addr_sp and
540 return arch_reserve_stacks();
543 static int display_new_sp(void)
545 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
550 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
552 static int setup_board_part1(void)
557 * Save local variables to board info struct
559 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
560 bd->bi_memsize = gd->ram_size; /* size in bytes */
562 #ifdef CONFIG_SYS_SRAM_BASE
563 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
564 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
567 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
568 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
569 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
571 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
572 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
574 #if defined(CONFIG_MPC83xx)
575 bd->bi_immrbar = CONFIG_SYS_IMMR;
582 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
583 static int setup_board_part2(void)
587 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
588 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
589 #if defined(CONFIG_CPM2)
590 bd->bi_cpmfreq = gd->arch.cpm_clk;
591 bd->bi_brgfreq = gd->arch.brg_clk;
592 bd->bi_sccfreq = gd->arch.scc_clk;
593 bd->bi_vco = gd->arch.vco_out;
594 #endif /* CONFIG_CPM2 */
595 #if defined(CONFIG_MPC512X)
596 bd->bi_ipsfreq = gd->arch.ips_clk;
597 #endif /* CONFIG_MPC512X */
598 #if defined(CONFIG_MPC5xxx)
599 bd->bi_ipbfreq = gd->arch.ipb_clk;
600 bd->bi_pcifreq = gd->pci_clk;
601 #endif /* CONFIG_MPC5xxx */
602 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
603 bd->bi_pcifreq = gd->pci_clk;
605 #if defined(CONFIG_EXTRA_CLOCK)
606 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
607 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
608 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
615 #ifdef CONFIG_SYS_EXTBDINFO
616 static int setup_board_extra(void)
620 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
621 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
622 sizeof(bd->bi_r_version));
624 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
625 bd->bi_plb_busfreq = gd->bus_clk;
626 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
627 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
628 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
629 bd->bi_pci_busfreq = get_PCI_freq();
630 bd->bi_opbfreq = get_OPB_freq();
631 #elif defined(CONFIG_XILINX_405)
632 bd->bi_pci_busfreq = get_PCI_freq();
640 static int init_post(void)
642 post_bootmode_init();
643 post_run(NULL, POST_ROM | post_bootmode_get(0));
649 static int reloc_fdt(void)
651 #ifndef CONFIG_OF_EMBED
652 if (gd->flags & GD_FLG_SKIP_RELOC)
655 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
656 gd->fdt_blob = gd->new_fdt;
663 static int setup_reloc(void)
665 if (gd->flags & GD_FLG_SKIP_RELOC) {
666 debug("Skipping relocation due to flag\n");
670 #ifdef CONFIG_SYS_TEXT_BASE
671 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
674 * On all ColdFire arch cpu, monitor code starts always
675 * just after the default vector table location, so at 0x400
677 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
680 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
682 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
683 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
684 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
690 #ifdef CONFIG_OF_BOARD_FIXUP
691 static int fix_fdt(void)
693 return board_fix_fdt((void *)gd->fdt_blob);
697 /* ARM calls relocate_code from its crt0.S */
698 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
699 !CONFIG_IS_ENABLED(X86_64)
701 static int jump_to_copy(void)
703 if (gd->flags & GD_FLG_SKIP_RELOC)
706 * x86 is special, but in a nice way. It uses a trampoline which
707 * enables the dcache if possible.
709 * For now, other archs use relocate_code(), which is implemented
710 * similarly for all archs. When we do generic relocation, hopefully
711 * we can make all archs enable the dcache prior to relocation.
713 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
715 * SDRAM and console are now initialised. The final stack can now
716 * be setup in SDRAM. Code execution will continue in Flash, but
717 * with the stack in SDRAM and Global Data in temporary memory
720 arch_setup_gd(gd->new_gd);
721 board_init_f_r_trampoline(gd->start_addr_sp);
723 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
730 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
731 static int mark_bootstage(void)
733 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
738 static int initf_console_record(void)
740 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
741 return console_record_init();
747 static int initf_dm(void)
749 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
752 ret = dm_init_and_scan(true);
756 #ifdef CONFIG_TIMER_EARLY
757 ret = dm_timer_init();
765 /* Architecture-specific memory reservation */
766 __weak int reserve_arch(void)
771 __weak int arch_cpu_init_dm(void)
776 static const init_fnc_t init_sequence_f[] = {
778 #ifdef CONFIG_OF_CONTROL
785 initf_console_record,
786 #if defined(CONFIG_HAVE_FSP)
789 arch_cpu_init, /* basic arch cpu dependent setup */
790 mach_cpu_init, /* SoC/machine dependent CPU setup */
793 mark_bootstage, /* need timer, go after init dm */
794 #if defined(CONFIG_BOARD_EARLY_INIT_F)
797 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
798 /* get CPU and bus clocks according to the environment variable */
799 get_clocks, /* get CPU and bus clocks (etc.) */
801 timer_init, /* initialize timer */
802 #if defined(CONFIG_BOARD_POSTCLK_INIT)
805 env_init, /* initialize environment */
806 init_baud_rate, /* initialze baudrate settings */
807 serial_init, /* serial communications setup */
808 console_init_f, /* stage 1 init of console */
809 display_options, /* say that we are here */
810 display_text_info, /* show debugging info if required */
811 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
815 #if defined(CONFIG_DISPLAY_CPUINFO)
816 print_cpuinfo, /* display cpu info (and speed) */
818 #if defined(CONFIG_DISPLAY_BOARDINFO)
821 INIT_FUNC_WATCHDOG_INIT
822 #if defined(CONFIG_MISC_INIT_F)
825 INIT_FUNC_WATCHDOG_RESET
826 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
829 #if defined(CONFIG_HARD_SPI)
833 /* TODO: unify all these dram functions? */
834 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
835 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
837 dram_init, /* configure available RAM banks */
839 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
845 INIT_FUNC_WATCHDOG_RESET
846 #if defined(CONFIG_SYS_DRAM_TEST)
848 #endif /* CONFIG_SYS_DRAM_TEST */
849 INIT_FUNC_WATCHDOG_RESET
854 INIT_FUNC_WATCHDOG_RESET
856 * Now that we have DRAM mapped and working, we can
857 * relocate the code and continue running from DRAM.
859 * Reserve memory at end of RAM for (top down in that order):
860 * - area that won't get touched by U-Boot and Linux (optional)
861 * - kernel log buffer
865 * - board info struct
868 #if defined(CONFIG_LOGBUFFER)
890 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
894 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
895 INIT_FUNC_WATCHDOG_RESET
899 #ifdef CONFIG_SYS_EXTBDINFO
902 #ifdef CONFIG_OF_BOARD_FIXUP
905 INIT_FUNC_WATCHDOG_RESET
908 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
913 #if defined(CONFIG_XTENSA)
916 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
917 !CONFIG_IS_ENABLED(X86_64)
923 void board_init_f(ulong boot_flags)
925 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
927 * For some architectures, global data is initialized and used before
928 * calling this function. The data should be preserved. For others,
929 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
930 * here to host global data until relocation.
937 * Clear global data before it is accessed at debug print
938 * in initcall_run_list. Otherwise the debug print probably
939 * get the wrong value of gd->have_console.
944 gd->flags = boot_flags;
945 gd->have_console = 0;
947 if (initcall_run_list(init_sequence_f))
950 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
951 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
952 /* NOTREACHED - jump_to_copy() does not return */
957 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
959 * For now this code is only used on x86.
961 * init_sequence_f_r is the list of init functions which are run when
962 * U-Boot is executing from Flash with a semi-limited 'C' environment.
963 * The following limitations must be considered when implementing an
965 * - 'static' variables are read-only
966 * - Global Data (gd->xxx) is read/write
968 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
969 * supported). It _should_, if possible, copy global data to RAM and
970 * initialise the CPU caches (to speed up the relocation process)
972 * NOTE: At present only x86 uses this route, but it is intended that
973 * all archs will move to this when generic relocation is implemented.
975 static const init_fnc_t init_sequence_f_r[] = {
976 #if !CONFIG_IS_ENABLED(X86_64)
983 void board_init_f_r(void)
985 if (initcall_run_list(init_sequence_f_r))
989 * The pre-relocation drivers may be using memory that has now gone
990 * away. Mark serial as unavailable - this will fall back to the debug
993 gd->flags &= ~GD_FLG_SERIAL_READY;
996 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
997 * Transfer execution from Flash to RAM by calculating the address
998 * of the in-RAM copy of board_init_r() and calling it
1000 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1002 /* NOTREACHED - board_init_r() does not return */
1005 #endif /* CONFIG_X86 */