1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018-2019 Toradex AG
7 #include <asm/arch/clock.h>
8 #include <asm/arch/crm_regs.h>
9 #include <asm/arch/imx-regs.h>
10 #include <asm/arch-mx6/clock.h>
11 #include <asm/arch-mx6/imx-regs.h>
12 #include <asm/arch-mx6/mx6ull_pins.h>
13 #include <asm/arch/sys_proto.h>
15 #include <asm/mach-imx/boot_mode.h>
16 #include <asm/mach-imx/iomux-v3.h>
19 #include <dm/platform_data/serial_mxc.h>
21 #include <fdt_support.h>
22 #include <imx_thermal.h>
23 #include <jffs2/load_kernel.h>
24 #include <linux/sizes.h>
29 #include "../common/tdx-common.h"
30 #include "../common/tdx-cfg-block.h"
32 DECLARE_GLOBAL_DATA_PTR;
34 #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
37 #define MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR 0x2290040
39 #define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
41 #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP)
45 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
50 #ifdef CONFIG_NAND_MXS
51 static void setup_gpmi_nand(void)
53 setup_gpmi_io_clk((3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) |
54 (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET));
56 #endif /* CONFIG_NAND_MXS */
58 #ifdef CONFIG_VIDEO_MXS
59 static iomux_v3_cfg_t const lcd_pads[] = {
60 MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
61 MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
62 MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
63 MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
64 MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
65 MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
66 MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
67 MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
68 MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
69 MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
70 MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
71 MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
72 MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
73 MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
74 MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
75 MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
76 MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
77 MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
78 MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
79 MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
80 MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
81 MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
84 static iomux_v3_cfg_t const backlight_pads[] = {
86 MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
87 /* Backlight PWM<A> (multiplexed pin) */
88 MX6_PAD_NAND_WP_B__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
91 #define GPIO_BL_ON IMX_GPIO_NR(1, 11)
92 #define GPIO_PWM_A IMX_GPIO_NR(4, 11)
94 static int setup_lcd(void)
96 imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
98 imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads));
101 gpio_request(GPIO_BL_ON, "BL_ON");
102 gpio_direction_output(GPIO_BL_ON, 1);
104 /* Set PWM<A> to full brightness (assuming inversed polarity) */
105 gpio_request(GPIO_PWM_A, "PWM<A>");
106 gpio_direction_output(GPIO_PWM_A, 0);
112 #ifdef CONFIG_FEC_MXC
113 static int setup_fec(void)
115 struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
118 /* provide the PHY clock from the i.MX 6 */
119 ret = enable_fec_anatop_clock(1, ENET_50MHZ);
123 /* Use 50M anatop REF_CLK and output it on ENET2_TX_CLK */
124 clrsetbits_le32(&iomuxc_regs->gpr[1],
125 IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK,
126 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
128 /* give new Ethernet PHY power save mode circuitry time to settle */
134 int board_phy_config(struct phy_device *phydev)
136 if (phydev->drv->config)
137 phydev->drv->config(phydev);
140 #endif /* CONFIG_FEC_MXC */
144 /* address of boot parameters */
145 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
147 #ifdef CONFIG_FEC_MXC
151 #ifdef CONFIG_NAND_MXS
155 #ifdef CONFIG_VIDEO_MXS
162 #ifdef CONFIG_CMD_BMODE
164 static const struct boot_mode board_boot_modes[] = {
165 /* 4 bit bus width */
166 {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)},
167 {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)},
172 int board_late_init(void)
174 #ifdef CONFIG_TDX_CFG_BLOCK
176 * If we have a valid config block and it says we are a module with
177 * Wi-Fi/Bluetooth make sure we use the -wifi device tree.
179 if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT ||
180 tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT)
181 env_set("variant", "-wifi");
185 * Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the
186 * SOC to request for a lower voltage during sleep. This is necessary
187 * because the voltage is changing too slow for the SOC to wake up
190 __raw_writel(0x8080, MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR);
192 #ifdef CONFIG_CMD_BMODE
193 add_board_boot_modes(board_boot_modes);
196 #ifdef CONFIG_CMD_USB_SDP
197 if (is_boot_from_usb()) {
198 printf("Serial Downloader recovery mode, using sdp command\n");
199 env_set("bootdelay", "0");
200 env_set("bootcmd", "sdp 0");
202 #endif /* CONFIG_CMD_USB_SDP */
209 printf("Model: Toradex Colibri iMX6ULL\n");
214 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
215 int ft_board_setup(void *blob, bd_t *bd)
217 #if defined(CONFIG_FDT_FIXUP_PARTITIONS)
218 static struct node_info nodes[] = {
219 { "fsl,imx6ull-gpmi-nand", MTD_DEV_TYPE_NAND, },
220 { "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, },
223 /* Update partition nodes using info from mtdparts env var */
224 puts(" Updating MTD partitions...\n");
225 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
228 return ft_common_board_setup(blob, bd);
232 static struct mxc_serial_platdata mxc_serial_plat = {
233 .reg = (struct mxc_uart *)UART1_BASE,
237 U_BOOT_DEVICE(mxc_serial) = {
238 .name = "serial_mxc",
239 .platdata = &mxc_serial_plat,