1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018-2019 Toradex AG
8 #include <asm/arch/clock.h>
9 #include <asm/arch/crm_regs.h>
10 #include <asm/arch/imx-regs.h>
11 #include <asm/arch-mx6/clock.h>
12 #include <asm/arch-mx6/imx-regs.h>
13 #include <asm/arch-mx6/mx6ull_pins.h>
14 #include <asm/arch/sys_proto.h>
16 #include <asm/mach-imx/boot_mode.h>
17 #include <asm/mach-imx/iomux-v3.h>
20 #include <dm/platform_data/serial_mxc.h>
22 #include <fdt_support.h>
23 #include <imx_thermal.h>
24 #include <jffs2/load_kernel.h>
25 #include <linux/sizes.h>
30 #include "../common/tdx-common.h"
31 #include "../common/tdx-cfg-block.h"
33 DECLARE_GLOBAL_DATA_PTR;
35 #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
38 #define MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR 0x2290040
40 #define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
42 #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP)
46 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
51 #ifdef CONFIG_NAND_MXS
52 static void setup_gpmi_nand(void)
54 setup_gpmi_io_clk((3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) |
55 (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET));
57 #endif /* CONFIG_NAND_MXS */
59 #ifdef CONFIG_VIDEO_MXS
60 static iomux_v3_cfg_t const lcd_pads[] = {
61 MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
62 MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
63 MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
64 MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
65 MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
66 MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
67 MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
68 MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
69 MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
70 MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
71 MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
72 MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
73 MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
74 MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
75 MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
76 MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
77 MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
78 MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
79 MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
80 MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
81 MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
82 MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
85 static iomux_v3_cfg_t const backlight_pads[] = {
87 MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
88 /* Backlight PWM<A> (multiplexed pin) */
89 MX6_PAD_NAND_WP_B__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
92 #define GPIO_BL_ON IMX_GPIO_NR(1, 11)
93 #define GPIO_PWM_A IMX_GPIO_NR(4, 11)
95 static int setup_lcd(void)
97 imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
99 imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads));
102 gpio_request(GPIO_BL_ON, "BL_ON");
103 gpio_direction_output(GPIO_BL_ON, 1);
105 /* Set PWM<A> to full brightness (assuming inversed polarity) */
106 gpio_request(GPIO_PWM_A, "PWM<A>");
107 gpio_direction_output(GPIO_PWM_A, 0);
113 #ifdef CONFIG_FEC_MXC
114 static int setup_fec(void)
116 struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
119 /* provide the PHY clock from the i.MX 6 */
120 ret = enable_fec_anatop_clock(1, ENET_50MHZ);
124 /* Use 50M anatop REF_CLK and output it on ENET2_TX_CLK */
125 clrsetbits_le32(&iomuxc_regs->gpr[1],
126 IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK,
127 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
129 /* give new Ethernet PHY power save mode circuitry time to settle */
135 int board_phy_config(struct phy_device *phydev)
137 if (phydev->drv->config)
138 phydev->drv->config(phydev);
141 #endif /* CONFIG_FEC_MXC */
145 /* address of boot parameters */
146 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
148 #ifdef CONFIG_FEC_MXC
152 #ifdef CONFIG_NAND_MXS
156 #ifdef CONFIG_VIDEO_MXS
163 #ifdef CONFIG_CMD_BMODE
165 static const struct boot_mode board_boot_modes[] = {
166 /* 4 bit bus width */
167 {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)},
168 {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)},
173 int board_late_init(void)
175 #ifdef CONFIG_TDX_CFG_BLOCK
177 * If we have a valid config block and it says we are a module with
178 * Wi-Fi/Bluetooth make sure we use the -wifi device tree.
180 if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT ||
181 tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT)
182 env_set("variant", "-wifi");
186 * Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the
187 * SOC to request for a lower voltage during sleep. This is necessary
188 * because the voltage is changing too slow for the SOC to wake up
191 __raw_writel(0x8080, MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR);
193 #ifdef CONFIG_CMD_BMODE
194 add_board_boot_modes(board_boot_modes);
197 #ifdef CONFIG_CMD_USB_SDP
198 if (is_boot_from_usb()) {
199 printf("Serial Downloader recovery mode, using sdp command\n");
200 env_set("bootdelay", "0");
201 env_set("bootcmd", "sdp 0");
203 #endif /* CONFIG_CMD_USB_SDP */
210 printf("Model: Toradex Colibri iMX6ULL\n");
215 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
216 int ft_board_setup(void *blob, bd_t *bd)
218 #if defined(CONFIG_FDT_FIXUP_PARTITIONS)
219 static struct node_info nodes[] = {
220 { "fsl,imx6ull-gpmi-nand", MTD_DEV_TYPE_NAND, },
221 { "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, },
224 /* Update partition nodes using info from mtdparts env var */
225 puts(" Updating MTD partitions...\n");
226 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
229 return ft_common_board_setup(blob, bd);
233 static struct mxc_serial_platdata mxc_serial_plat = {
234 .reg = (struct mxc_uart *)UART1_BASE,
238 U_BOOT_DEVICE(mxc_serial) = {
239 .name = "serial_mxc",
240 .platdata = &mxc_serial_plat,