1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2014-2018
4 * Marcel Ziswiler <marcel@ziswiler.com>
10 #include <asm/arch/gp_padctrl.h>
11 #include <asm/arch/pinmux.h>
12 #include <asm/arch-tegra/ap.h>
13 #include <asm/arch-tegra/tegra.h>
18 #include <pci_tegra.h>
19 #include <linux/delay.h>
20 #include "../common/tdx-common.h"
22 #include "pinmux-config-apalis_t30.h"
24 DECLARE_GLOBAL_DATA_PTR;
26 #define PMU_I2C_ADDRESS 0x2D
27 #define MAX_I2C_RETRY 3
29 #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
30 #define PEX_PERST_N TEGRA_GPIO(S, 7) /* Apalis GPIO7 */
31 #define RESET_MOCI_CTRL TEGRA_GPIO(I, 4)
33 static int pci_reset_status;
34 #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
36 int arch_misc_init(void)
38 if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
40 printf("USB recovery mode\n");
47 printf("Model: Toradex Apalis T30 %dGB\n",
48 (gd->ram_size == 0x40000000) ? 1 : 2);
53 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
54 int ft_board_setup(void *blob, bd_t *bd)
56 return ft_common_board_setup(blob, bd);
61 * Routine: pinmux_init
62 * Description: Do individual peripheral pinmux configs
64 void pinmux_init(void)
66 pinmux_config_pingrp_table(tegra3_pinmux_common,
67 ARRAY_SIZE(tegra3_pinmux_common));
69 pinmux_config_pingrp_table(unused_pins_lowpower,
70 ARRAY_SIZE(unused_pins_lowpower));
72 /* Initialize any non-default pad configs (APB_MISC_GP regs) */
73 pinmux_config_drvgrp_table(apalis_t30_padctrl,
74 ARRAY_SIZE(apalis_t30_padctrl));
77 #ifdef CONFIG_PCI_TEGRA
78 int tegra_pcie_board_init(void)
84 err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
86 debug("%s: Cannot find PMIC I2C chip\n", __func__);
90 /* TPS659110: VDD2_OP_REG = 1.05V */
94 err = dm_i2c_write(dev, addr, data, 1);
96 debug("failed to set VDD supply\n");
100 /* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */
104 err = dm_i2c_write(dev, addr, data, 1);
106 debug("failed to enable VDD supply\n");
110 /* TPS659110: LDO6_REG = 1.1V, ACTIVE */
114 err = dm_i2c_write(dev, addr, data, 1);
116 debug("failed to set AVDD supply\n");
120 #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
121 gpio_request(PEX_PERST_N, "PEX_PERST_N");
122 gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
123 #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
128 void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
130 int index = tegra_pcie_port_index_of_port(port);
132 if (index == 2) { /* I210 Gigabit Ethernet Controller (On-module) */
133 tegra_pcie_port_reset(port);
135 #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
137 * Apalis PCIe aka port 1 and Apalis Type Specific 4 Lane PCIe aka port
138 * 0 share the same RESET_MOCI therefore only assert it once for both
139 * ports to avoid losing the previously brought up port again.
141 else if ((index == 1) || (index == 0)) {
142 /* only do it once per init cycle */
143 if (pci_reset_status % 2 == 0) {
145 * Reset PLX PEX 8605 PCIe Switch plus PCIe devices on
146 * Apalis Evaluation Board
148 gpio_direction_output(PEX_PERST_N, 0);
149 gpio_direction_output(RESET_MOCI_CTRL, 0);
152 * Must be asserted for 100 ms after power and clocks
157 gpio_set_value(PEX_PERST_N, 1);
159 * Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not
160 * Guaranteed Until 900 us After PEX_PERST# De-assertion
163 gpio_set_value(RESET_MOCI_CTRL, 1);
167 #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
169 #endif /* CONFIG_PCI_TEGRA */
172 * Backlight off before OS handover
174 void board_preboot_os(void)
176 gpio_request(TEGRA_GPIO(V, 2), "BKL1_ON");
177 gpio_direction_output(TEGRA_GPIO(V, 2), 0);