1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2004-2008
4 * Texas Instruments, <www.ti.com>
7 * Sunil Kumar <sunilsaini05@gmail.com>
8 * Shashi Ranjan <shashiranjanmca05@gmail.com>
11 * Frederik Kriewitz <frederik@kriewitz.eu>
13 * Derived from Beagle Board and 3430 SDP code by
14 * Richard Woodruff <r-woodruff2@ti.com>
15 * Syed Mohammed Khasim <khasim@ti.com>
21 #include <environment.h>
25 #include <asm/arch/mmc_host_def.h>
26 #include <asm/arch/mux.h>
27 #include <asm/arch/sys_proto.h>
28 #include <asm/arch/mem.h>
29 #include <asm/mach-types.h>
30 #include "devkit8000.h"
32 #ifdef CONFIG_DRIVER_DM9000
37 DECLARE_GLOBAL_DATA_PTR;
39 static u32 gpmc_net_config[GPMC_MAX_REG] = {
49 static const struct ns16550_platdata devkit8000_serial = {
50 .base = OMAP34XX_UART3,
52 .clock = V_NS16550_CLK,
53 .fcr = UART_FCR_DEFVAL,
56 U_BOOT_DEVICE(devkit8000_uart) = {
63 * Description: Early hardware init.
67 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
68 /* board id for Linux */
69 gd->bd->bi_arch_number = MACH_TYPE_DEVKIT8000;
71 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
76 /* Configure GPMC registers for DM9000 */
77 static void gpmc_dm9000_config(void)
79 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
80 CONFIG_DM9000_BASE, GPMC_SIZE_16M);
84 * Routine: misc_init_r
85 * Description: Configure board specific parts
89 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
90 #ifdef CONFIG_DRIVER_DM9000
96 #ifdef CONFIG_TWL4030_LED
97 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
100 #ifdef CONFIG_DRIVER_DM9000
101 /* Configure GPMC registers for DM9000 */
102 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
103 CONFIG_DM9000_BASE, GPMC_SIZE_16M);
105 /* Use OMAP DIE_ID as MAC address */
106 if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
107 printf("ethaddr not set, using Die ID\n");
108 die_id_0 = readl(&id_base->die_id_0);
109 enetaddr[0] = 0x02; /* locally administered */
110 enetaddr[1] = readl(&id_base->die_id_1) & 0xff;
111 enetaddr[2] = (die_id_0 & 0xff000000) >> 24;
112 enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16;
113 enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8;
114 enetaddr[5] = (die_id_0 & 0x000000ff);
115 eth_env_set_enetaddr("ethaddr", enetaddr);
119 omap_die_id_display();
125 * Routine: set_muxconf_regs
126 * Description: Setting up the configuration Mux registers specific to the
127 * hardware. Many pins need to be moved from protect to primary
130 void set_muxconf_regs(void)
135 #if defined(CONFIG_MMC)
136 int board_mmc_init(bd_t *bis)
138 return omap_mmc_init(0, 0, 0, -1, -1);
142 #if defined(CONFIG_MMC)
143 void board_mmc_power_init(void)
145 twl4030_power_mmc_init(0);
149 #if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
151 * Routine: board_eth_init
152 * Description: Setting up the Ethernet hardware.
154 int board_eth_init(bd_t *bis)
156 return dm9000_initialize(bis);
160 #ifdef CONFIG_SPL_OS_BOOT
162 * Do board specific preparation before SPL
165 void spl_board_prepare_for_linux(void)
167 gpmc_dm9000_config();
171 * devkit8000 specific implementation of spl_start_uboot()
174 * 0 if the button is not pressed
175 * 1 if the button is pressed
177 int spl_start_uboot(void)
180 if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
181 gpio_direction_input(SPL_OS_BOOT_KEY);
182 val = gpio_get_value(SPL_OS_BOOT_KEY);
183 gpio_free(SPL_OS_BOOT_KEY);
190 * Routine: get_board_mem_timings
191 * Description: If we use SPL then there is no x-loader nor config header
192 * so we have to setup the DDR timings ourself on the first bank. This
193 * provides the timing values back to the function that configures
194 * the memory. We have either one or two banks of 128MB DDR.
196 void get_board_mem_timings(struct board_sdrc_timings *timings)
198 /* General SDRC config */
199 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
200 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
203 timings->ctrla = MICRON_V_ACTIMA_165;
204 timings->ctrlb = MICRON_V_ACTIMB_165;
206 timings->mr = MICRON_V_MR_165;