board/ti/omap5_uevm/evm.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2010
   4  * Texas Instruments Incorporated, <www.ti.com>
   5  * Aneesh V       <aneesh@ti.com>
   6  * Steve Sakoman  <steve@sakoman.com>
   7  */
   8 #include <common.h>
   9 #include <init.h>
  10 #include <net.h>
  11 #include <palmas.h>
  12 #include <asm/arch/omap.h>
  13 #include <asm/arch/sys_proto.h>
  14 #include <asm/arch/mmc_host_def.h>
  15 #include <tca642x.h>
  16 #include <usb.h>
  17 #include <linux/usb/gadget.h>
  18 #include <dwc3-uboot.h>
  19 #include <dwc3-omap-uboot.h>
  20 #include <ti-usb-phy-uboot.h>
  21
  22 #include "mux_data.h"
  23
  24 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
  25 #include <sata.h>
  26 #include <usb.h>
  27 #include <asm/gpio.h>
  28 #include <asm/mach-types.h>
  29 #include <asm/arch/clock.h>
  30 #include <asm/arch/ehci.h>
  31 #include <asm/ehci-omap.h>
  32 #include <asm/arch/sata.h>
  33
  34 #define DIE_ID_REG_BASE     (OMAP54XX_L4_CORE_BASE + 0x2000)
  35 #define DIE_ID_REG_OFFSET       0x200
  36
  37 #endif
  38
  39 DECLARE_GLOBAL_DATA_PTR;
  40
  41 const struct omap_sysinfo sysinfo = {
  42         "Board: OMAP5432 uEVM\n"
  43 };
  44
  45 /**
  46  * @brief tca642x_init - uEVM default values for the GPIO expander
  47  * input reg, output reg, polarity reg, configuration reg
  48  */
  49 struct tca642x_bank_info tca642x_init[] = {
  50         { .input_reg = 0x00,
  51           .output_reg = 0x04,
  52           .polarity_reg = 0x00,
  53           .configuration_reg = 0x80 },
  54         { .input_reg = 0x00,
  55           .output_reg = 0x00,
  56           .polarity_reg = 0x00,
  57           .configuration_reg = 0xff },
  58         { .input_reg = 0x00,
  59           .output_reg = 0x00,
  60           .polarity_reg = 0x00,
  61           .configuration_reg = 0x40 },
  62 };
  63
  64 #ifdef CONFIG_USB_DWC3
  65 static struct dwc3_device usb_otg_ss = {
  66         .maximum_speed = USB_SPEED_SUPER,
  67         .base = OMAP5XX_USB_OTG_SS_BASE,
  68         .tx_fifo_resize = false,
  69         .index = 0,
  70 };
  71
  72 static struct dwc3_omap_device usb_otg_ss_glue = {
  73         .base = (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE,
  74         .utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
  75         .index = 0,
  76 };
  77
  78 static struct ti_usb_phy_device usb_phy_device = {
  79         .pll_ctrl_base = (void *)OMAP5XX_USB3_PHY_PLL_CTRL,
  80         .usb2_phy_power = (void *)OMAP5XX_USB2_PHY_POWER,
  81         .usb3_phy_power = (void *)OMAP5XX_USB3_PHY_POWER,
  82         .index = 0,
  83 };
  84
  85 int board_usb_init(int index, enum usb_init_type init)
  86 {
  87         if (index) {
  88                 printf("Invalid Controller Index\n");
  89                 return -EINVAL;
  90         }
  91
  92         if (init == USB_INIT_DEVICE) {
  93                 usb_otg_ss.dr_mode = USB_DR_MODE_PERIPHERAL;
  94                 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
  95         } else {
  96                 usb_otg_ss.dr_mode = USB_DR_MODE_HOST;
  97                 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
  98         }
  99
 100         enable_usb_clocks(index);
 101         ti_usb_phy_uboot_init(&usb_phy_device);
 102         dwc3_omap_uboot_init(&usb_otg_ss_glue);
 103         dwc3_uboot_init(&usb_otg_ss);
 104
 105         return 0;
 106 }
 107
 108 int board_usb_cleanup(int index, enum usb_init_type init)
 109 {
 110         if (index) {
 111                 printf("Invalid Controller Index\n");
 112                 return -EINVAL;
 113         }
 114
 115         ti_usb_phy_uboot_exit(index);
 116         dwc3_uboot_exit(index);
 117         dwc3_omap_uboot_exit(index);
 118         disable_usb_clocks(index);
 119
 120         return 0;
 121 }
 122
 123 int usb_gadget_handle_interrupts(int index)
 124 {
 125         u32 status;
 126
 127         status = dwc3_omap_uboot_interrupt_status(index);
 128         if (status)
 129                 dwc3_uboot_handle_interrupt(index);
 130
 131         return 0;
 132 }
 133 #endif
 134
 135 /**
 136  * @brief board_init
 137  *
 138  * @return 0
 139  */
 140 int board_init(void)
 141 {
 142         gpmc_init();
 143         gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
 144         gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
 145
 146         tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
 147
 148         return 0;
 149 }
 150
 151 int board_eth_init(bd_t *bis)
 152 {
 153         return 0;
 154 }
 155
 156 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
 157 static void enable_host_clocks(void)
 158 {
 159         int auxclk;
 160         int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
 161                                 OPTFCLKEN_HSIC480M_P3_CLK |
 162                                 OPTFCLKEN_HSIC60M_P2_CLK |
 163                                 OPTFCLKEN_HSIC480M_P2_CLK |
 164                                 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
 165
 166         /* Enable port 2 and 3 clocks*/
 167         setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
 168
 169         /* Enable port 2 and 3 usb host ports tll clocks*/
 170         setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
 171                         (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
 172 #ifdef CONFIG_USB_XHCI_OMAP
 173         /* Enable the USB OTG Super speed clocks */
 174         setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
 175                         (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
 176 #endif
 177
 178         auxclk = readl((*prcm)->scrm_auxclk1);
 179         /* Request auxilary clock */
 180         auxclk |= AUXCLK_ENABLE_MASK;
 181         writel(auxclk, (*prcm)->scrm_auxclk1);
 182 }
 183 #endif
 184
 185 /**
 186  * @brief misc_init_r - Configure EVM board specific configurations
 187  * such as power configurations, ethernet initialization as phase2 of
 188  * boot sequence
 189  *
 190  * @return 0
 191  */
 192 int misc_init_r(void)
 193 {
 194 #ifdef CONFIG_PALMAS_POWER
 195         palmas_init_settings();
 196 #endif
 197
 198         omap_die_id_usbethaddr();
 199
 200         return 0;
 201 }
 202
 203 void set_muxconf_regs(void)
 204 {
 205         do_set_mux((*ctrl)->control_padconf_core_base,
 206                    core_padconf_array_essential,
 207                    sizeof(core_padconf_array_essential) /
 208                    sizeof(struct pad_conf_entry));
 209
 210         do_set_mux((*ctrl)->control_padconf_wkup_base,
 211                    wkup_padconf_array_essential,
 212                    sizeof(wkup_padconf_array_essential) /
 213                    sizeof(struct pad_conf_entry));
 214 }
 215
 216 #if defined(CONFIG_MMC)
 217 int board_mmc_init(bd_t *bis)
 218 {
 219         omap_mmc_init(0, 0, 0, -1, -1);
 220         omap_mmc_init(1, 0, 0, -1, -1);
 221         return 0;
 222 }
 223 #endif
 224
 225 #ifdef CONFIG_USB_EHCI_HCD
 226 static struct omap_usbhs_board_data usbhs_bdata = {
 227         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
 228         .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
 229         .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
 230 };
 231
 232 int ehci_hcd_init(int index, enum usb_init_type init,
 233                 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 234 {
 235         int ret;
 236
 237         enable_host_clocks();
 238
 239         ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
 240         if (ret < 0) {
 241                 puts("Failed to initialize ehci\n");
 242                 return ret;
 243         }
 244
 245         return 0;
 246 }
 247
 248 int ehci_hcd_stop(void)
 249 {
 250         return omap_ehci_hcd_stop();
 251 }
 252
 253 void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
 254 {
 255         /* The LAN9730 needs to be reset after the port power has been set. */
 256         if (port == 3) {
 257                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
 258                 udelay(10);
 259                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
 260         }
 261 }
 262 #endif
 263
 264 #ifdef CONFIG_USB_XHCI_OMAP
 265 /**
 266  * @brief board_usb_init - Configure EVM board specific configurations
 267  * for the LDO's and clocks for the USB blocks.
 268  *
 269  * @return 0
 270  */
 271 int board_usb_init(int index, enum usb_init_type init)
 272 {
 273         int ret;
 274 #ifdef CONFIG_PALMAS_USB_SS_PWR
 275         ret = palmas_enable_ss_ldo();
 276 #endif
 277
 278         enable_host_clocks();
 279
 280         return 0;
 281 }
 282 #endif