board/ti/omap5_uevm/evm.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2010
   4  * Texas Instruments Incorporated, <www.ti.com>
   5  * Aneesh V       <aneesh@ti.com>
   6  * Steve Sakoman  <steve@sakoman.com>
   7  */
   8 #include <common.h>
   9 #include <init.h>
  10 #include <net.h>
  11 #include <palmas.h>
  12 #include <asm/arch/omap.h>
  13 #include <asm/arch/sys_proto.h>
  14 #include <asm/arch/mmc_host_def.h>
  15 #include <tca642x.h>
  16 #include <usb.h>
  17 #include <linux/delay.h>
  18 #include <linux/usb/gadget.h>
  19 #include <dwc3-uboot.h>
  20 #include <dwc3-omap-uboot.h>
  21 #include <ti-usb-phy-uboot.h>
  22
  23 #include "mux_data.h"
  24
  25 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
  26 #include <sata.h>
  27 #include <usb.h>
  28 #include <asm/gpio.h>
  29 #include <asm/mach-types.h>
  30 #include <asm/arch/clock.h>
  31 #include <asm/arch/ehci.h>
  32 #include <asm/ehci-omap.h>
  33 #include <asm/arch/sata.h>
  34
  35 #define DIE_ID_REG_BASE     (OMAP54XX_L4_CORE_BASE + 0x2000)
  36 #define DIE_ID_REG_OFFSET       0x200
  37
  38 #endif
  39
  40 DECLARE_GLOBAL_DATA_PTR;
  41
  42 const struct omap_sysinfo sysinfo = {
  43         "Board: OMAP5432 uEVM\n"
  44 };
  45
  46 /**
  47  * @brief tca642x_init - uEVM default values for the GPIO expander
  48  * input reg, output reg, polarity reg, configuration reg
  49  */
  50 struct tca642x_bank_info tca642x_init[] = {
  51         { .input_reg = 0x00,
  52           .output_reg = 0x04,
  53           .polarity_reg = 0x00,
  54           .configuration_reg = 0x80 },
  55         { .input_reg = 0x00,
  56           .output_reg = 0x00,
  57           .polarity_reg = 0x00,
  58           .configuration_reg = 0xff },
  59         { .input_reg = 0x00,
  60           .output_reg = 0x00,
  61           .polarity_reg = 0x00,
  62           .configuration_reg = 0x40 },
  63 };
  64
  65 #ifdef CONFIG_USB_DWC3
  66 static struct dwc3_device usb_otg_ss = {
  67         .maximum_speed = USB_SPEED_SUPER,
  68         .base = OMAP5XX_USB_OTG_SS_BASE,
  69         .tx_fifo_resize = false,
  70         .index = 0,
  71 };
  72
  73 static struct dwc3_omap_device usb_otg_ss_glue = {
  74         .base = (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE,
  75         .utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
  76         .index = 0,
  77 };
  78
  79 static struct ti_usb_phy_device usb_phy_device = {
  80         .pll_ctrl_base = (void *)OMAP5XX_USB3_PHY_PLL_CTRL,
  81         .usb2_phy_power = (void *)OMAP5XX_USB2_PHY_POWER,
  82         .usb3_phy_power = (void *)OMAP5XX_USB3_PHY_POWER,
  83         .index = 0,
  84 };
  85
  86 int board_usb_init(int index, enum usb_init_type init)
  87 {
  88         if (index) {
  89                 printf("Invalid Controller Index\n");
  90                 return -EINVAL;
  91         }
  92
  93         if (init == USB_INIT_DEVICE) {
  94                 usb_otg_ss.dr_mode = USB_DR_MODE_PERIPHERAL;
  95                 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
  96         } else {
  97                 usb_otg_ss.dr_mode = USB_DR_MODE_HOST;
  98                 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
  99         }
 100
 101         enable_usb_clocks(index);
 102         ti_usb_phy_uboot_init(&usb_phy_device);
 103         dwc3_omap_uboot_init(&usb_otg_ss_glue);
 104         dwc3_uboot_init(&usb_otg_ss);
 105
 106         return 0;
 107 }
 108
 109 int board_usb_cleanup(int index, enum usb_init_type init)
 110 {
 111         if (index) {
 112                 printf("Invalid Controller Index\n");
 113                 return -EINVAL;
 114         }
 115
 116         ti_usb_phy_uboot_exit(index);
 117         dwc3_uboot_exit(index);
 118         dwc3_omap_uboot_exit(index);
 119         disable_usb_clocks(index);
 120
 121         return 0;
 122 }
 123
 124 int usb_gadget_handle_interrupts(int index)
 125 {
 126         u32 status;
 127
 128         status = dwc3_omap_uboot_interrupt_status(index);
 129         if (status)
 130                 dwc3_uboot_handle_interrupt(index);
 131
 132         return 0;
 133 }
 134 #endif
 135
 136 /**
 137  * @brief board_init
 138  *
 139  * @return 0
 140  */
 141 int board_init(void)
 142 {
 143         gpmc_init();
 144         gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
 145         gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
 146
 147         tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
 148
 149         return 0;
 150 }
 151
 152 int board_eth_init(bd_t *bis)
 153 {
 154         return 0;
 155 }
 156
 157 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
 158 static void enable_host_clocks(void)
 159 {
 160         int auxclk;
 161         int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
 162                                 OPTFCLKEN_HSIC480M_P3_CLK |
 163                                 OPTFCLKEN_HSIC60M_P2_CLK |
 164                                 OPTFCLKEN_HSIC480M_P2_CLK |
 165                                 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
 166
 167         /* Enable port 2 and 3 clocks*/
 168         setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
 169
 170         /* Enable port 2 and 3 usb host ports tll clocks*/
 171         setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
 172                         (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
 173 #ifdef CONFIG_USB_XHCI_OMAP
 174         /* Enable the USB OTG Super speed clocks */
 175         setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
 176                         (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
 177 #endif
 178
 179         auxclk = readl((*prcm)->scrm_auxclk1);
 180         /* Request auxilary clock */
 181         auxclk |= AUXCLK_ENABLE_MASK;
 182         writel(auxclk, (*prcm)->scrm_auxclk1);
 183 }
 184 #endif
 185
 186 /**
 187  * @brief misc_init_r - Configure EVM board specific configurations
 188  * such as power configurations, ethernet initialization as phase2 of
 189  * boot sequence
 190  *
 191  * @return 0
 192  */
 193 int misc_init_r(void)
 194 {
 195 #ifdef CONFIG_PALMAS_POWER
 196         palmas_init_settings();
 197 #endif
 198
 199         omap_die_id_usbethaddr();
 200
 201         return 0;
 202 }
 203
 204 void set_muxconf_regs(void)
 205 {
 206         do_set_mux((*ctrl)->control_padconf_core_base,
 207                    core_padconf_array_essential,
 208                    sizeof(core_padconf_array_essential) /
 209                    sizeof(struct pad_conf_entry));
 210
 211         do_set_mux((*ctrl)->control_padconf_wkup_base,
 212                    wkup_padconf_array_essential,
 213                    sizeof(wkup_padconf_array_essential) /
 214                    sizeof(struct pad_conf_entry));
 215 }
 216
 217 #if defined(CONFIG_MMC)
 218 int board_mmc_init(bd_t *bis)
 219 {
 220         omap_mmc_init(0, 0, 0, -1, -1);
 221         omap_mmc_init(1, 0, 0, -1, -1);
 222         return 0;
 223 }
 224 #endif
 225
 226 #ifdef CONFIG_USB_EHCI_HCD
 227 static struct omap_usbhs_board_data usbhs_bdata = {
 228         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
 229         .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
 230         .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
 231 };
 232
 233 int ehci_hcd_init(int index, enum usb_init_type init,
 234                 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 235 {
 236         int ret;
 237
 238         enable_host_clocks();
 239
 240         ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
 241         if (ret < 0) {
 242                 puts("Failed to initialize ehci\n");
 243                 return ret;
 244         }
 245
 246         return 0;
 247 }
 248
 249 int ehci_hcd_stop(void)
 250 {
 251         return omap_ehci_hcd_stop();
 252 }
 253
 254 void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
 255 {
 256         /* The LAN9730 needs to be reset after the port power has been set. */
 257         if (port == 3) {
 258                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
 259                 udelay(10);
 260                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
 261         }
 262 }
 263 #endif
 264
 265 #ifdef CONFIG_USB_XHCI_OMAP
 266 /**
 267  * @brief board_usb_init - Configure EVM board specific configurations
 268  * for the LDO's and clocks for the USB blocks.
 269  *
 270  * @return 0
 271  */
 272 int board_usb_init(int index, enum usb_init_type init)
 273 {
 274         int ret;
 275 #ifdef CONFIG_PALMAS_USB_SS_PWR
 276         ret = palmas_enable_ss_ldo();
 277 #endif
 278
 279         enable_host_clocks();
 280
 281         return 0;
 282 }
 283 #endif