1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2004-2011
4 * Texas Instruments, <www.ti.com>
7 * Manikandan Pillai <mani.pillai@ti.com>
9 * Derived from Beagle Board and 3430 SDP code by
10 * Richard Woodruff <r-woodruff2@ti.com>
11 * Syed Mohammed Khasim <khasim@ti.com>
19 #include <asm/arch/mem.h>
20 #include <asm/arch/mux.h>
21 #include <asm/arch/sys_proto.h>
22 #include <asm/arch/mmc_host_def.h>
26 #include <asm/mach-types.h>
27 #include <asm/omap_musb.h>
28 #include <linux/mtd/rawnand.h>
29 #include <linux/usb/ch9.h>
30 #include <linux/usb/gadget.h>
31 #include <linux/usb/musb.h>
34 #define OMAP3EVM_GPIO_ETH_RST_GEN1 64
35 #define OMAP3EVM_GPIO_ETH_RST_GEN2 7
37 DECLARE_GLOBAL_DATA_PTR;
39 static u32 omap3_evm_version;
41 u32 get_omap3_evm_rev(void)
43 return omap3_evm_version;
46 static void omap3_evm_get_revision(void)
48 #if defined(CONFIG_CMD_NET)
50 * Board revision can be ascertained only by identifying
51 * the Ethernet chipset.
55 /* Ethernet PHY ID is stored at ID_REV register */
56 smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000;
57 printf("Read back SMSC id 0x%x\n", smsc_id);
60 /* SMSC9115 chipset */
62 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
64 /* SMSC 9220 chipset */
67 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
69 #else /* !CONFIG_CMD_NET */
70 #if defined(CONFIG_STATIC_BOARD_REV)
71 /* Look for static defintion of the board revision */
72 omap3_evm_version = CONFIG_STATIC_BOARD_REV;
74 /* Fallback to the default above */
75 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
76 #endif /* CONFIG_STATIC_BOARD_REV */
77 #endif /* CONFIG_CMD_NET */
80 #if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)
81 /* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
82 u8 omap3_evm_need_extvbus(void)
86 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
91 #endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
95 * Description: Early hardware init.
99 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
100 /* board id for Linux */
101 gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;
102 /* boot param addr */
103 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
108 #if defined(CONFIG_SPL_OS_BOOT)
109 int spl_start_uboot(void)
111 /* break into full u-boot on 'c' */
112 if (serial_tstc() && serial_getc() == 'c')
117 #endif /* CONFIG_SPL_OS_BOOT */
119 #if defined(CONFIG_SPL_BUILD)
121 * Routine: get_board_mem_timings
122 * Description: If we use SPL then there is no x-loader nor config header
123 * so we have to setup the DDR timings ourself on the first bank. This
124 * provides the timing values back to the function that configures
127 void get_board_mem_timings(struct board_sdrc_timings *timings)
132 * We need to identify what PoP memory is on the board so that
133 * we know what timings to use. To map the ID values please see
136 identify_nand_chip(&pop_mfr, &pop_id);
138 if (pop_mfr == NAND_MFR_HYNIX && pop_id == 0xbc) {
140 timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
141 timings->ctrla = HYNIX_V_ACTIMA_200;
142 timings->ctrlb = HYNIX_V_ACTIMB_200;
145 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
146 timings->ctrla = MICRON_V_ACTIMA_165;
147 timings->ctrlb = MICRON_V_ACTIMB_165;
149 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
150 timings->mr = MICRON_V_MR_165;
152 #endif /* CONFIG_SPL_BUILD */
154 #if defined(CONFIG_USB_MUSB_OMAP2PLUS)
155 static struct musb_hdrc_config musb_config = {
162 static struct omap_musb_board_data musb_board_data = {
163 .interface_type = MUSB_INTERFACE_ULPI,
166 static struct musb_hdrc_platform_data musb_plat = {
167 #if defined(CONFIG_USB_MUSB_HOST)
169 #elif defined(CONFIG_USB_MUSB_GADGET)
170 .mode = MUSB_PERIPHERAL,
172 #error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
173 #endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
174 .config = &musb_config,
176 .platform_ops = &omap2430_ops,
177 .board_data = &musb_board_data,
179 #endif /* CONFIG_USB_MUSB_OMAP2PLUS */
182 * Routine: misc_init_r
183 * Description: Init ethernet (done here so udelay works)
185 int misc_init_r(void)
187 twl4030_power_init();
189 #ifdef CONFIG_SYS_I2C_OMAP24XX
190 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
193 #if defined(CONFIG_CMD_NET)
196 omap3_evm_get_revision();
198 #if defined(CONFIG_CMD_NET)
201 omap_die_id_display();
203 #if defined(CONFIG_USB_MUSB_OMAP2PLUS)
204 musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
207 #if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
208 omap_die_id_usbethaddr();
214 * Routine: set_muxconf_regs
215 * Description: Setting up the configuration Mux registers specific to the
216 * hardware. Many pins need to be moved from protect to primary
219 void set_muxconf_regs(void)
224 #if defined(CONFIG_CMD_NET)
226 * Routine: setup_net_chip
227 * Description: Setting up the configuration GPMC registers specific to the
230 static void setup_net_chip(void)
232 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
234 /* Configure GPMC registers */
235 writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
236 writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
237 writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
238 writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
239 writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
240 writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
241 writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
243 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
244 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
245 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
246 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
247 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
248 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
249 &ctrl_base->gpmc_nadv_ale);
253 * Reset the ethernet chip.
255 static void reset_net_chip(void)
260 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) {
261 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1;
263 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2;
266 ret = gpio_request(rst_gpio, "");
268 printf("Unable to get GPIO %d\n", rst_gpio);
272 /* Configure as output */
273 gpio_direction_output(rst_gpio, 0);
275 /* Send a pulse on the GPIO pin */
276 gpio_set_value(rst_gpio, 1);
278 gpio_set_value(rst_gpio, 0);
280 gpio_set_value(rst_gpio, 1);
283 int board_eth_init(bd_t *bis)
285 #if defined(CONFIG_SMC911X)
286 env_set("ethaddr", NULL);
287 return smc911x_initialize(0, CONFIG_SMC911X_BASE);
292 #endif /* CONFIG_CMD_NET */
294 #if defined(CONFIG_MMC)
295 int board_mmc_init(bd_t *bis)
297 return omap_mmc_init(0, 0, 0, -1, -1);
300 void board_mmc_power_init(void)
302 twl4030_power_mmc_init(0);
304 #endif /* CONFIG_MMC */
306 #if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
307 int board_eth_init(bd_t *bis)
309 return usb_eth_initialize(bis);
311 #endif /* CONFIG_USB_ETHER */