board/technologic/ts4800/ts4800.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2015 Savoir-faire Linux Inc.
   4  *
   5  * Derived from MX51EVK code by
   6  *   Freescale Semiconductor, Inc.
   7  */
   8
   9 #include <common.h>
  10 #include <init.h>
  11 #include <log.h>
  12 #include <net.h>
  13 #include <asm/io.h>
  14 #include <asm/gpio.h>
  15 #include <asm/arch/imx-regs.h>
  16 #include <asm/arch/iomux-mx51.h>
  17 #include <env.h>
  18 #include <linux/errno.h>
  19 #include <asm/arch/sys_proto.h>
  20 #include <asm/arch/crm_regs.h>
  21 #include <asm/arch/clock.h>
  22 #include <asm/mach-imx/mx5_video.h>
  23 #include <mmc.h>
  24 #include <input.h>
  25 #include <fsl_esdhc_imx.h>
  26 #include <mc13892.h>
  27
  28 #include <malloc.h>
  29 #include <netdev.h>
  30 #include <phy.h>
  31 #include "ts4800.h"
  32
  33 DECLARE_GLOBAL_DATA_PTR;
  34
  35 #ifdef CONFIG_FSL_ESDHC_IMX
  36 struct fsl_esdhc_cfg esdhc_cfg[2] = {
  37         {MMC_SDHC1_BASE_ADDR},
  38         {MMC_SDHC2_BASE_ADDR},
  39 };
  40 #endif
  41
  42 int dram_init(void)
  43 {
  44         /* dram_init must store complete ramsize in gd->ram_size */
  45         gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
  46                                 PHYS_SDRAM_1_SIZE);
  47         return 0;
  48 }
  49
  50 u32 get_board_rev(void)
  51 {
  52         u32 rev = get_cpu_rev();
  53         if (!gpio_get_value(IMX_GPIO_NR(1, 22)))
  54                 rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET;
  55         return rev;
  56 }
  57
  58 #define UART_PAD_CTRL   (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH)
  59
  60 static void setup_iomux_uart(void)
  61 {
  62         static const iomux_v3_cfg_t uart_pads[] = {
  63                 MX51_PAD_UART1_RXD__UART1_RXD,
  64                 MX51_PAD_UART1_TXD__UART1_TXD,
  65                 NEW_PAD_CTRL(MX51_PAD_UART1_RTS__UART1_RTS, UART_PAD_CTRL),
  66                 NEW_PAD_CTRL(MX51_PAD_UART1_CTS__UART1_CTS, UART_PAD_CTRL),
  67         };
  68
  69         imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
  70 }
  71
  72 static void setup_iomux_fec(void)
  73 {
  74         static const iomux_v3_cfg_t fec_pads[] = {
  75                 NEW_PAD_CTRL(MX51_PAD_EIM_EB2__FEC_MDIO,
  76                                 PAD_CTL_HYS |
  77                                 PAD_CTL_PUS_22K_UP |
  78                                 PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST),
  79                 MX51_PAD_EIM_EB3__FEC_RDATA1,
  80                 NEW_PAD_CTRL(MX51_PAD_EIM_CS2__FEC_RDATA2, PAD_CTL_HYS),
  81                 MX51_PAD_EIM_CS3__FEC_RDATA3,
  82                 MX51_PAD_NANDF_CS2__FEC_TX_ER,
  83                 MX51_PAD_EIM_CS5__FEC_CRS,
  84                 MX51_PAD_EIM_CS4__FEC_RX_ER,
  85                 /* PAD used on TS4800 */
  86                 MX51_PAD_DI2_PIN2__FEC_MDC,
  87                 MX51_PAD_DISP2_DAT14__FEC_RDAT0,
  88                 MX51_PAD_DISP2_DAT10__FEC_COL,
  89                 MX51_PAD_DISP2_DAT11__FEC_RXCLK,
  90                 MX51_PAD_DISP2_DAT15__FEC_TDAT0,
  91                 MX51_PAD_DISP2_DAT6__FEC_TDAT1,
  92                 MX51_PAD_DISP2_DAT7__FEC_TDAT2,
  93                 MX51_PAD_DISP2_DAT8__FEC_TDAT3,
  94                 MX51_PAD_DISP2_DAT9__FEC_TX_EN,
  95                 MX51_PAD_DISP2_DAT13__FEC_TX_CLK,
  96                 MX51_PAD_DISP2_DAT12__FEC_RX_DV,
  97         };
  98
  99         imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
 100 }
 101
 102 #ifdef CONFIG_FSL_ESDHC_IMX
 103 int board_mmc_getcd(struct mmc *mmc)
 104 {
 105         struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
 106         int ret;
 107
 108         imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_0__GPIO1_0,
 109                                                 NO_PAD_CTRL));
 110         gpio_direction_input(IMX_GPIO_NR(1, 0));
 111         imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_6__GPIO1_6,
 112                                                 NO_PAD_CTRL));
 113         gpio_direction_input(IMX_GPIO_NR(1, 6));
 114
 115         if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
 116                 ret = !gpio_get_value(IMX_GPIO_NR(1, 0));
 117         else
 118                 ret = !gpio_get_value(IMX_GPIO_NR(1, 6));
 119
 120         return ret;
 121 }
 122
 123 int board_mmc_init(bd_t *bis)
 124 {
 125         static const iomux_v3_cfg_t sd1_pads[] = {
 126                 NEW_PAD_CTRL(MX51_PAD_SD1_CMD__SD1_CMD, PAD_CTL_DSE_MAX |
 127                         PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
 128                 NEW_PAD_CTRL(MX51_PAD_SD1_CLK__SD1_CLK, PAD_CTL_DSE_MAX |
 129                         PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
 130                 NEW_PAD_CTRL(MX51_PAD_SD1_DATA0__SD1_DATA0, PAD_CTL_DSE_MAX |
 131                         PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
 132                 NEW_PAD_CTRL(MX51_PAD_SD1_DATA1__SD1_DATA1, PAD_CTL_DSE_MAX |
 133                         PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
 134                 NEW_PAD_CTRL(MX51_PAD_SD1_DATA2__SD1_DATA2, PAD_CTL_DSE_MAX |
 135                         PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
 136                 NEW_PAD_CTRL(MX51_PAD_SD1_DATA3__SD1_DATA3, PAD_CTL_DSE_MAX |
 137                         PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SRE_FAST),
 138                 NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_HYS),
 139                 NEW_PAD_CTRL(MX51_PAD_GPIO1_1__SD1_WP, PAD_CTL_HYS),
 140         };
 141
 142         esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
 143
 144         imx_iomux_v3_setup_multiple_pads(sd1_pads, ARRAY_SIZE(sd1_pads));
 145
 146         return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
 147 }
 148 #endif
 149
 150 int board_early_init_f(void)
 151 {
 152         setup_iomux_uart();
 153         setup_iomux_fec();
 154
 155         return 0;
 156 }
 157
 158 int board_init(void)
 159 {
 160         /* address of boot parameters */
 161         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 162
 163         return 0;
 164 }
 165
 166 /*
 167  * Read the MAC address from FEC's registers PALR PAUR.
 168  * User is supposed to configure these registers when MAC address is known
 169  * from another source (fuse), but on TS4800, MAC address is not fused and
 170  * the bootrom configure these registers on startup.
 171  */
 172 static int fec_get_mac_from_register(uint32_t base_addr)
 173 {
 174         unsigned char ethaddr[6];
 175         u32 reg_mac[2];
 176         int i;
 177
 178         reg_mac[0] = in_be32(base_addr + 0xE4);
 179         reg_mac[1] = in_be32(base_addr + 0xE8);
 180
 181         for(i = 0; i < 6; i++)
 182                 ethaddr[i] = (reg_mac[i / 4] >> ((i % 4) * 8)) & 0xFF;
 183
 184         if (is_valid_ethaddr(ethaddr)) {
 185                 eth_env_set_enetaddr("ethaddr", ethaddr);
 186                 return 0;
 187         }
 188
 189         return -1;
 190 }
 191
 192 #define TS4800_GPIO_FEC_PHY_RES         IMX_GPIO_NR(2, 14)
 193 int board_eth_init(bd_t *bd)
 194 {
 195         int dev_id = -1;
 196         int phy_id = 0xFF;
 197         uint32_t addr = IMX_FEC_BASE;
 198
 199         uint32_t base_mii;
 200         struct mii_dev *bus = NULL;
 201         struct phy_device *phydev = NULL;
 202         int ret;
 203
 204         /* reset FEC phy */
 205         imx_iomux_v3_setup_pad(MX51_PAD_EIM_A20__GPIO2_14);
 206         gpio_direction_output(TS4800_GPIO_FEC_PHY_RES, 0);
 207         mdelay(1);
 208         gpio_set_value(TS4800_GPIO_FEC_PHY_RES, 1);
 209         mdelay(1);
 210
 211         base_mii = addr;
 212         debug("eth_init: fec_probe(bd, %i, %i) @ %08x\n", dev_id, phy_id, addr);
 213         bus = fec_get_miibus(base_mii, dev_id);
 214         if (!bus)
 215                 return -ENOMEM;
 216
 217         phydev = phy_find_by_mask(bus, phy_id, PHY_INTERFACE_MODE_MII);
 218         if (!phydev) {
 219                 free(bus);
 220                 return -ENOMEM;
 221         }
 222
 223         if (fec_get_mac_from_register(addr))
 224                 printf("eth_init: failed to get MAC address\n");
 225
 226         ret = fec_probe(bd, dev_id, addr, bus, phydev);
 227         if (ret) {
 228                 free(phydev);
 229                 free(bus);
 230         }
 231
 232         return ret;
 233 }
 234
 235 /*
 236  * Do not overwrite the console
 237  * Use always serial for U-Boot console
 238  */
 239 int overwrite_console(void)
 240 {
 241         return 1;
 242 }
 243
 244 int checkboard(void)
 245 {
 246         puts("Board: TS4800\n");
 247
 248         return 0;
 249 }
 250
 251 void hw_watchdog_reset(void)
 252 {
 253         struct ts4800_wtd_regs *wtd = (struct ts4800_wtd_regs *) (TS4800_SYSCON_BASE + 0xE);
 254         /* feed the watchdog for another 10s */
 255         writew(0x2, &wtd->feed);
 256 }
 257
 258 void hw_watchdog_init(void)
 259 {
 260         return;
 261 }