board/technologic/ts4800/ts4800.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2015 Savoir-faire Linux Inc.
   4  *
   5  * Derived from MX51EVK code by
   6  *   Freescale Semiconductor, Inc.
   7  */
   8
   9 #include <common.h>
  10 #include <asm/io.h>
  11 #include <asm/gpio.h>
  12 #include <asm/arch/imx-regs.h>
  13 #include <asm/arch/iomux-mx51.h>
  14 #include <env.h>
  15 #include <linux/errno.h>
  16 #include <asm/arch/sys_proto.h>
  17 #include <asm/arch/crm_regs.h>
  18 #include <asm/arch/clock.h>
  19 #include <asm/mach-imx/mx5_video.h>
  20 #include <environment.h>
  21 #include <mmc.h>
  22 #include <input.h>
  23 #include <fsl_esdhc_imx.h>
  24 #include <mc13892.h>
  25
  26 #include <malloc.h>
  27 #include <netdev.h>
  28 #include <phy.h>
  29 #include "ts4800.h"
  30
  31 DECLARE_GLOBAL_DATA_PTR;
  32
  33 #ifdef CONFIG_FSL_ESDHC_IMX
  34 struct fsl_esdhc_cfg esdhc_cfg[2] = {
  35         {MMC_SDHC1_BASE_ADDR},
  36         {MMC_SDHC2_BASE_ADDR},
  37 };
  38 #endif
  39
  40 int dram_init(void)
  41 {
  42         /* dram_init must store complete ramsize in gd->ram_size */
  43         gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
  44                                 PHYS_SDRAM_1_SIZE);
  45         return 0;
  46 }
  47
  48 u32 get_board_rev(void)
  49 {
  50         u32 rev = get_cpu_rev();
  51         if (!gpio_get_value(IMX_GPIO_NR(1, 22)))
  52                 rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET;
  53         return rev;
  54 }
  55
  56 #define UART_PAD_CTRL   (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH)
  57
  58 static void setup_iomux_uart(void)
  59 {
  60         static const iomux_v3_cfg_t uart_pads[] = {
  61                 MX51_PAD_UART1_RXD__UART1_RXD,
  62                 MX51_PAD_UART1_TXD__UART1_TXD,
  63                 NEW_PAD_CTRL(MX51_PAD_UART1_RTS__UART1_RTS, UART_PAD_CTRL),
  64                 NEW_PAD_CTRL(MX51_PAD_UART1_CTS__UART1_CTS, UART_PAD_CTRL),
  65         };
  66
  67         imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
  68 }
  69
  70 static void setup_iomux_fec(void)
  71 {
  72         static const iomux_v3_cfg_t fec_pads[] = {
  73                 NEW_PAD_CTRL(MX51_PAD_EIM_EB2__FEC_MDIO,
  74                                 PAD_CTL_HYS |
  75                                 PAD_CTL_PUS_22K_UP |
  76                                 PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST),
  77                 MX51_PAD_EIM_EB3__FEC_RDATA1,
  78                 NEW_PAD_CTRL(MX51_PAD_EIM_CS2__FEC_RDATA2, PAD_CTL_HYS),
  79                 MX51_PAD_EIM_CS3__FEC_RDATA3,
  80                 MX51_PAD_NANDF_CS2__FEC_TX_ER,
  81                 MX51_PAD_EIM_CS5__FEC_CRS,
  82                 MX51_PAD_EIM_CS4__FEC_RX_ER,
  83                 /* PAD used on TS4800 */
  84                 MX51_PAD_DI2_PIN2__FEC_MDC,
  85                 MX51_PAD_DISP2_DAT14__FEC_RDAT0,
  86                 MX51_PAD_DISP2_DAT10__FEC_COL,
  87                 MX51_PAD_DISP2_DAT11__FEC_RXCLK,
  88                 MX51_PAD_DISP2_DAT15__FEC_TDAT0,
  89                 MX51_PAD_DISP2_DAT6__FEC_TDAT1,
  90                 MX51_PAD_DISP2_DAT7__FEC_TDAT2,
  91                 MX51_PAD_DISP2_DAT8__FEC_TDAT3,
  92                 MX51_PAD_DISP2_DAT9__FEC_TX_EN,
  93                 MX51_PAD_DISP2_DAT13__FEC_TX_CLK,
  94                 MX51_PAD_DISP2_DAT12__FEC_RX_DV,
  95         };
  96
  97         imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
  98 }
  99
 100 #ifdef CONFIG_FSL_ESDHC_IMX
 101 int board_mmc_getcd(struct mmc *mmc)
 102 {
 103         struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
 104         int ret;
 105
 106         imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_0__GPIO1_0,
 107                                                 NO_PAD_CTRL));
 108         gpio_direction_input(IMX_GPIO_NR(1, 0));
 109         imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_6__GPIO1_6,
 110                                                 NO_PAD_CTRL));
 111         gpio_direction_input(IMX_GPIO_NR(1, 6));
 112
 113         if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
 114                 ret = !gpio_get_value(IMX_GPIO_NR(1, 0));
 115         else
 116                 ret = !gpio_get_value(IMX_GPIO_NR(1, 6));
 117
 118         return ret;
 119 }
 120
 121 int board_mmc_init(bd_t *bis)
 122 {
 123         static const iomux_v3_cfg_t sd1_pads[] = {
 124                 NEW_PAD_CTRL(MX51_PAD_SD1_CMD__SD1_CMD, PAD_CTL_DSE_MAX |
 125                         PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
 126                 NEW_PAD_CTRL(MX51_PAD_SD1_CLK__SD1_CLK, PAD_CTL_DSE_MAX |
 127                         PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
 128                 NEW_PAD_CTRL(MX51_PAD_SD1_DATA0__SD1_DATA0, PAD_CTL_DSE_MAX |
 129                         PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
 130                 NEW_PAD_CTRL(MX51_PAD_SD1_DATA1__SD1_DATA1, PAD_CTL_DSE_MAX |
 131                         PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
 132                 NEW_PAD_CTRL(MX51_PAD_SD1_DATA2__SD1_DATA2, PAD_CTL_DSE_MAX |
 133                         PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
 134                 NEW_PAD_CTRL(MX51_PAD_SD1_DATA3__SD1_DATA3, PAD_CTL_DSE_MAX |
 135                         PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SRE_FAST),
 136                 NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_HYS),
 137                 NEW_PAD_CTRL(MX51_PAD_GPIO1_1__SD1_WP, PAD_CTL_HYS),
 138         };
 139
 140         esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
 141
 142         imx_iomux_v3_setup_multiple_pads(sd1_pads, ARRAY_SIZE(sd1_pads));
 143
 144         return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
 145 }
 146 #endif
 147
 148 int board_early_init_f(void)
 149 {
 150         setup_iomux_uart();
 151         setup_iomux_fec();
 152
 153         return 0;
 154 }
 155
 156 int board_init(void)
 157 {
 158         /* address of boot parameters */
 159         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 160
 161         return 0;
 162 }
 163
 164 /*
 165  * Read the MAC address from FEC's registers PALR PAUR.
 166  * User is supposed to configure these registers when MAC address is known
 167  * from another source (fuse), but on TS4800, MAC address is not fused and
 168  * the bootrom configure these registers on startup.
 169  */
 170 static int fec_get_mac_from_register(uint32_t base_addr)
 171 {
 172         unsigned char ethaddr[6];
 173         u32 reg_mac[2];
 174         int i;
 175
 176         reg_mac[0] = in_be32(base_addr + 0xE4);
 177         reg_mac[1] = in_be32(base_addr + 0xE8);
 178
 179         for(i = 0; i < 6; i++)
 180                 ethaddr[i] = (reg_mac[i / 4] >> ((i % 4) * 8)) & 0xFF;
 181
 182         if (is_valid_ethaddr(ethaddr)) {
 183                 eth_env_set_enetaddr("ethaddr", ethaddr);
 184                 return 0;
 185         }
 186
 187         return -1;
 188 }
 189
 190 #define TS4800_GPIO_FEC_PHY_RES         IMX_GPIO_NR(2, 14)
 191 int board_eth_init(bd_t *bd)
 192 {
 193         int dev_id = -1;
 194         int phy_id = 0xFF;
 195         uint32_t addr = IMX_FEC_BASE;
 196
 197         uint32_t base_mii;
 198         struct mii_dev *bus = NULL;
 199         struct phy_device *phydev = NULL;
 200         int ret;
 201
 202         /* reset FEC phy */
 203         imx_iomux_v3_setup_pad(MX51_PAD_EIM_A20__GPIO2_14);
 204         gpio_direction_output(TS4800_GPIO_FEC_PHY_RES, 0);
 205         mdelay(1);
 206         gpio_set_value(TS4800_GPIO_FEC_PHY_RES, 1);
 207         mdelay(1);
 208
 209         base_mii = addr;
 210         debug("eth_init: fec_probe(bd, %i, %i) @ %08x\n", dev_id, phy_id, addr);
 211         bus = fec_get_miibus(base_mii, dev_id);
 212         if (!bus)
 213                 return -ENOMEM;
 214
 215         phydev = phy_find_by_mask(bus, phy_id, PHY_INTERFACE_MODE_MII);
 216         if (!phydev) {
 217                 free(bus);
 218                 return -ENOMEM;
 219         }
 220
 221         if (fec_get_mac_from_register(addr))
 222                 printf("eth_init: failed to get MAC address\n");
 223
 224         ret = fec_probe(bd, dev_id, addr, bus, phydev);
 225         if (ret) {
 226                 free(phydev);
 227                 free(bus);
 228         }
 229
 230         return ret;
 231 }
 232
 233 /*
 234  * Do not overwrite the console
 235  * Use always serial for U-Boot console
 236  */
 237 int overwrite_console(void)
 238 {
 239         return 1;
 240 }
 241
 242 int checkboard(void)
 243 {
 244         puts("Board: TS4800\n");
 245
 246         return 0;
 247 }
 248
 249 void hw_watchdog_reset(void)
 250 {
 251         struct ts4800_wtd_regs *wtd = (struct ts4800_wtd_regs *) (TS4800_SYSCON_BASE + 0xE);
 252         /* feed the watchdog for another 10s */
 253         writew(0x2, &wtd->feed);
 254 }
 255
 256 void hw_watchdog_init(void)
 257 {
 258         return;
 259 }