1 // SPDX-License-Identifier: GPL-2.0+
3 * pci.c -- WindRiver SBC8349 PCI board support.
4 * Copyright (c) 2006 Wind River Systems, Inc.
5 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
7 * Based on MPC8349 PCI support but w/o PIB related code.
17 #include <asm/fsl_i2c.h>
18 #include <linux/delay.h>
20 static struct pci_region pci1_regions[] = {
22 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
23 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
24 size: CONFIG_SYS_PCI1_MEM_SIZE,
25 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
28 bus_start: CONFIG_SYS_PCI1_IO_BASE,
29 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
30 size: CONFIG_SYS_PCI1_IO_SIZE,
34 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
35 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
36 size: CONFIG_SYS_PCI1_MMIO_SIZE,
44 * NOTICE: PCI2 is not supported. There is only one
45 * physical PCI slot on the board.
51 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
52 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
53 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
54 struct pci_region *reg[] = { pci1_regions };
56 /* Enable all 8 PCI_CLK_OUTPUTS */
57 clk->occr = 0xff000000;
60 /* Configure PCI Local Access Windows */
61 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
62 pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
64 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
65 pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
69 mpc83xx_pci_init(1, reg);