1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010 Samsung Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 * Kyungmin Park <kyungmin.park@samsung.com>
15 #include <asm/arch/adc.h>
16 #include <asm/arch/pinmux.h>
17 #include <asm/arch/watchdog.h>
19 #include <power/pmic.h>
21 #include <usb/dwc2_udc.h>
22 #include <asm/arch/cpu.h>
23 #include <power/max8998_pmic.h>
25 #include <samsung/misc.h>
26 #include <usb_mass_storage.h>
27 #include <asm/mach-types.h>
29 DECLARE_GLOBAL_DATA_PTR;
31 unsigned int board_rev;
32 static int init_pmic_lcd(void);
34 u32 get_board_rev(void)
39 int exynos_power_init(void)
41 return init_pmic_lcd();
44 static int get_hwrev(void)
46 return board_rev & 0xFF;
49 static unsigned short get_adc_value(int channel)
51 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
52 unsigned short ret = 0;
54 unsigned int loop = 0;
56 writel(channel & 0xF, &adc->adcmux);
57 writel((1 << 14) | (49 << 6), &adc->adccon);
58 writel(1000 & 0xffff, &adc->adcdly);
59 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
61 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
66 reg = readl(&adc->adccon);
67 } while (!(reg & (1 << 15)) && (loop++ < 1000));
69 ret = readl(&adc->adcdat0) & 0xFFF;
74 static int adc_power_control(int on)
80 ret = pmic_get("max8998-pmic", &dev);
82 puts("Failed to get MAX8998!\n");
86 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
92 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
94 puts("MAX8998 LDO setting error\n");
101 static unsigned int get_hw_revision(void)
103 int hwrev, mode0, mode1;
105 adc_power_control(1);
107 mode0 = get_adc_value(1); /* HWREV_MODE0 */
108 mode1 = get_adc_value(2); /* HWREV_MODE1 */
111 * XXX Always set the default hwrev as the latest board
112 * ADC = (voltage) / 3.3 * 4096
116 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
117 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
118 hwrev = 0x0; /* 0.01V 0.01V */
119 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
120 hwrev = 0x1; /* 610mV 0.01V */
121 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
122 hwrev = 0x2; /* 1.16V 0.01V */
123 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
124 hwrev = 0x3; /* 1.79V 0.01V */
127 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
129 adc_power_control(0);
134 static void check_hw_revision(void)
138 hwrev = get_hw_revision();
143 #ifdef CONFIG_USB_GADGET
144 static int s5pc210_phy_control(int on)
150 ret = pmic_get("max8998-pmic", &dev);
152 puts("Failed to get MAX8998!\n");
157 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
158 reg |= MAX8998_SAFEOUT1;
159 ret |= pmic_reg_write(dev,
160 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
162 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
164 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
166 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
168 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
171 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
172 reg &= ~MAX8998_LDO8;
173 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
175 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
176 reg &= ~MAX8998_LDO3;
177 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
179 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
180 reg &= ~MAX8998_SAFEOUT1;
181 ret |= pmic_reg_write(dev,
182 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
186 puts("MAX8998 LDO setting error!\n");
193 struct dwc2_plat_otg_data s5pc210_otg_data = {
194 .phy_control = s5pc210_phy_control,
195 .regs_phy = EXYNOS4_USBPHY_BASE,
196 .regs_otg = EXYNOS4_USBOTG_BASE,
197 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
198 .usb_flags = PHY0_SLEEP,
202 int board_usb_init(int index, enum usb_init_type init)
204 debug("USB_udc_probe\n");
205 return dwc2_udc_probe(&s5pc210_otg_data);
208 int exynos_early_init_f(void)
215 static int init_pmic_lcd(void)
221 ret = pmic_get("max8998-pmic", &dev);
223 puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
228 val = 0x02; /* (1800 - 1600) / 100; */
229 ret |= pmic_reg_write(dev, MAX8998_REG_LDO7, val);
232 val = 0xe; /* (3000 - 1600) / 100; */
233 ret |= pmic_reg_write(dev, MAX8998_REG_LDO17, val);
235 /* Disable unneeded regulators */
238 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
239 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
242 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, val);
245 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
246 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
249 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, val);
252 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
253 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
256 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF3, val);
259 puts("LCD pmic initialisation error!\n");
266 void exynos_cfg_lcd_gpio(void)
268 unsigned int i, f3_end = 4;
270 for (i = 0; i < 8; i++) {
271 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
272 gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
273 gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
274 gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
275 /* pull-up/down disable */
276 gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
277 gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
278 gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
280 /* drive strength to max (24bit) */
281 gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
282 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
283 gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
284 gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
285 gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
286 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
289 for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
290 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
291 gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
292 /* pull-up/down disable */
293 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
294 /* drive strength to max (24bit) */
295 gpio_set_drv(i, S5P_GPIO_DRV_4X);
296 gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
299 /* gpio pad configuration for LCD reset. */
300 gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
301 gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
309 void exynos_reset_lcd(void)
311 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
313 gpio_set_value(EXYNOS4_GPIO_Y45, 0);
315 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
319 void exynos_lcd_power_on(void)
325 ret = pmic_get("max8998-pmic", &dev);
327 puts("Failed to get MAX8998!\n");
331 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
332 reg |= MAX8998_LDO17;
333 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
335 puts("MAX8998 LDO setting error\n");
339 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
341 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
343 puts("MAX8998 LDO setting error\n");
348 void exynos_cfg_ldo(void)
353 void exynos_enable_ldo(unsigned int onoff)
355 ld9040_enable_ldo(onoff);
358 int exynos_init(void)
360 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
362 switch (get_hwrev()) {
365 * Set the low to enable LDO_EN
366 * But when you use the test board for eMMC booting
367 * you should set it HIGH since it removes the inverter
369 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
370 gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
371 gpio_direction_output(EXYNOS4_GPIO_E36, 0);
375 * Default reset state is High and there's no inverter
376 * But set it as HIGH to ensure
378 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
379 gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
380 gpio_direction_output(EXYNOS4_GPIO_E13, 1);
385 printf("HW Revision:\t0x%x\n", board_rev);
391 void exynos_lcd_misc_init(vidinfo_t *vid)
394 get_tizen_logo_info(vid);
398 vid->pclk_name = 1; /* MPLL */
401 env_set("lcdinfo", "lcd=ld9040");