common: Drop image.h from common header
[oweals/u-boot.git] / board / renesas / ulcb / ulcb.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * board/renesas/ulcb/ulcb.c
4  *     This file is ULCB board support.
5  *
6  * Copyright (C) 2017 Renesas Electronics Corporation
7  */
8
9 #include <common.h>
10 #include <image.h>
11 #include <malloc.h>
12 #include <netdev.h>
13 #include <dm.h>
14 #include <dm/platform_data/serial_sh.h>
15 #include <asm/processor.h>
16 #include <asm/mach-types.h>
17 #include <asm/io.h>
18 #include <linux/errno.h>
19 #include <asm/arch/sys_proto.h>
20 #include <asm/gpio.h>
21 #include <asm/arch/gpio.h>
22 #include <asm/arch/rmobile.h>
23 #include <asm/arch/rcar-mstp.h>
24 #include <asm/arch/sh_sdhi.h>
25 #include <i2c.h>
26 #include <mmc.h>
27
28 DECLARE_GLOBAL_DATA_PTR;
29
30 void s_init(void)
31 {
32 }
33
34 #define DVFS_MSTP926            BIT(26)
35 #define HSUSB_MSTP704           BIT(4)  /* HSUSB */
36
37 int board_early_init_f(void)
38 {
39 #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
40         /* DVFS for reset */
41         mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
42 #endif
43         return 0;
44 }
45
46 /* HSUSB block registers */
47 #define HSUSB_REG_LPSTS                 0xE6590102
48 #define HSUSB_REG_LPSTS_SUSPM_NORMAL    BIT(14)
49 #define HSUSB_REG_UGCTRL2               0xE6590184
50 #define HSUSB_REG_UGCTRL2_USB0SEL       0x30
51 #define HSUSB_REG_UGCTRL2_USB0SEL_EHCI  0x10
52
53 int board_init(void)
54 {
55         /* adress of boot parameters */
56         gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
57
58         /* USB1 pull-up */
59         setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
60
61         /* Configure the HSUSB block */
62         mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
63         /* Choice USB0SEL */
64         clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
65                         HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
66         /* low power status */
67         setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);
68
69         return 0;
70 }
71
72 #ifdef CONFIG_MULTI_DTB_FIT
73 int board_fit_config_name_match(const char *name)
74 {
75         /* PRR driver is not available yet */
76         u32 cpu_type = rmobile_get_cpu_type();
77
78         if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
79             !strcmp(name, "r8a77950-ulcb-u-boot"))
80                 return 0;
81
82         if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
83             !strcmp(name, "r8a77960-ulcb-u-boot"))
84                 return 0;
85
86         if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
87             !strcmp(name, "r8a77965-ulcb-u-boot"))
88                 return 0;
89
90         return -1;
91 }
92 #endif