6464e86c4552de0efc7db464fb105f229e24f988
[oweals/u-boot.git] / board / nvidia / nyan-big / nyan-big.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2014
4  * NVIDIA Corporation <www.nvidia.com>
5  */
6
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <log.h>
11 #include <asm/gpio.h>
12 #include <asm/io.h>
13 #include <asm/arch/pinmux.h>
14 #include <asm/arch/clock.h>
15 #include <asm/arch/mc.h>
16 #include <asm/arch-tegra/clk_rst.h>
17 #include <asm/arch-tegra/pmc.h>
18 #include <power/as3722.h>
19 #include <power/pmic.h>
20 #include "pinmux-config-nyan-big.h"
21
22 /*
23  * Routine: pinmux_init
24  * Description: Do individual peripheral pinmux configs
25  */
26 void pinmux_init(void)
27 {
28         gpio_config_table(nyan_big_gpio_inits,
29                           ARRAY_SIZE(nyan_big_gpio_inits));
30
31         pinmux_config_pingrp_table(nyan_big_pingrps,
32                                    ARRAY_SIZE(nyan_big_pingrps));
33
34         pinmux_config_drvgrp_table(nyan_big_drvgrps,
35                                    ARRAY_SIZE(nyan_big_drvgrps));
36 }
37
38 int tegra_board_id(void)
39 {
40         static const int vector[] = {TEGRA_GPIO(Q, 3), TEGRA_GPIO(T, 1),
41                                         TEGRA_GPIO(X, 1), TEGRA_GPIO(X, 4),
42                                         -1};
43
44         gpio_claim_vector(vector, "board_id%d");
45         return gpio_get_values_as_int(vector);
46 }
47
48 int tegra_lcd_pmic_init(int board_id)
49 {
50         struct udevice *dev;
51         int ret;
52
53         ret = uclass_get_device_by_driver(UCLASS_PMIC,
54                                           DM_GET_DRIVER(pmic_as3722), &dev);
55         if (ret) {
56                 debug("%s: Failed to find PMIC\n", __func__);
57                 return ret;
58         }
59
60         if (board_id == 0)
61                 pmic_reg_write(dev, 0x00, 0x3c);
62         else
63                 pmic_reg_write(dev, 0x00, 0x50);
64         pmic_reg_write(dev, 0x12, 0x10);
65         pmic_reg_write(dev, 0x0c, 0x07);
66         pmic_reg_write(dev, 0x20, 0x10);
67
68         return 0;
69 }
70
71 /* Setup required information for Linux kernel */
72 static void setup_kernel_info(void)
73 {
74         struct mc_ctlr *mc = (void *)NV_PA_MC_BASE;
75
76         /* The kernel graphics driver needs this region locked down */
77         writel(0, &mc->mc_video_protect_bom);
78         writel(0, &mc->mc_video_protect_size_mb);
79         writel(1, &mc->mc_video_protect_reg_ctrl);
80 }
81
82 /*
83  * We need to take ALL audio devices conntected to AHUB (AUDIO, APBIF,
84  * I2S, DAM, AMX, ADX, SPDIF, AFC) out of reset and enable the clocks.
85  * Otherwise reading AHUB devices will hang when the kernel boots.
86  */
87 static void enable_required_clocks(void)
88 {
89         static enum periph_id ids[] = {
90                 PERIPH_ID_I2S0,
91                 PERIPH_ID_I2S1,
92                 PERIPH_ID_I2S2,
93                 PERIPH_ID_I2S3,
94                 PERIPH_ID_I2S4,
95                 PERIPH_ID_AUDIO,
96                 PERIPH_ID_APBIF,
97                 PERIPH_ID_DAM0,
98                 PERIPH_ID_DAM1,
99                 PERIPH_ID_DAM2,
100                 PERIPH_ID_AMX0,
101                 PERIPH_ID_AMX1,
102                 PERIPH_ID_ADX0,
103                 PERIPH_ID_ADX1,
104                 PERIPH_ID_SPDIF,
105                 PERIPH_ID_AFC0,
106                 PERIPH_ID_AFC1,
107                 PERIPH_ID_AFC2,
108                 PERIPH_ID_AFC3,
109                 PERIPH_ID_AFC4,
110                 PERIPH_ID_AFC5,
111                 PERIPH_ID_EXTPERIPH1
112         };
113         int i;
114
115         for (i = 0; i < ARRAY_SIZE(ids); i++)
116                 clock_enable(ids[i]);
117         udelay(2);
118         for (i = 0; i < ARRAY_SIZE(ids); i++)
119                 reset_set_enable(ids[i], 0);
120 }
121
122 int nvidia_board_init(void)
123 {
124         clock_start_periph_pll(PERIPH_ID_EXTPERIPH1, CLOCK_ID_OSC, 12000000);
125         clock_start_periph_pll(PERIPH_ID_I2S1, CLOCK_ID_CLK_M, 1500000);
126
127         /* For external MAX98090 audio codec */
128         clock_external_output(1);
129         setup_kernel_info();
130         enable_required_clocks();
131
132         return 0;
133 }